LXR linux/arch/blackfin/mach-bf537/boards/pnav10.c

   1/*
   2 * Copyright 2004-2009 Analog Devices Inc.
   3 *                2005 National ICT Australia (NICTA)
   4 *                      Aidan Williams <aidan@nicta.com.au>
   5 *
   6 * Licensed under the GPL-2 or later.
   7 */
   8
   9#include <linux/device.h>
  10#include <linux/etherdevice.h>
  11#include <linux/export.h>
  12#include <linux/platform_device.h>
  13#include <linux/mtd/mtd.h>
  14#include <linux/mtd/partitions.h>
  15#include <linux/spi/spi.h>
  16#include <linux/spi/flash.h>
  17#include <linux/irq.h>
  18#include <asm/dma.h>
  19#include <asm/bfin5xx_spi.h>
  20#include <asm/portmux.h>
  21
  22#include <linux/spi/ad7877.h>
  23
  24/*
  25 * Name the Board for the /proc/cpuinfo
  26 */
  27const char bfin_board_name[] = "ADI PNAV-1.0";
  28
  29/*
  30 *  Driver needs to know address, irq and flag pin.
  31 */
  32
  33#if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
  34static struct resource bfin_pcmcia_cf_resources[] = {
  35        {
  36                .start = 0x20310000, /* IO PORT */
  37                .end = 0x20312000,
  38                .flags = IORESOURCE_MEM,
  39        }, {
  40                .start = 0x20311000, /* Attribute Memory */
  41                .end = 0x20311FFF,
  42                .flags = IORESOURCE_MEM,
  43        }, {
  44                .start = IRQ_PF4,
  45                .end = IRQ_PF4,
  46                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  47        }, {
  48                .start = 6, /* Card Detect PF6 */
  49                .end = 6,
  50                .flags = IORESOURCE_IRQ,
  51        },
  52};
  53
  54static struct platform_device bfin_pcmcia_cf_device = {
  55        .name = "bfin_cf_pcmcia",
  56        .id = -1,
  57        .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  58        .resource = bfin_pcmcia_cf_resources,
  59};
  60#endif
  61
  62#if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  63static struct platform_device rtc_device = {
  64        .name = "rtc-bfin",
  65        .id   = -1,
  66};
  67#endif
  68
  69#if IS_ENABLED(CONFIG_SMC91X)
  70#include <linux/smc91x.h>
  71
  72static struct smc91x_platdata smc91x_info = {
  73        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  74        .leda = RPC_LED_100_10,
  75        .ledb = RPC_LED_TX_RX,
  76};
  77
  78static struct resource smc91x_resources[] = {
  79        {
  80                .name = "smc91x-regs",
  81                .start = 0x20300300,
  82                .end = 0x20300300 + 16,
  83                .flags = IORESOURCE_MEM,
  84        }, {
  85
  86                .start = IRQ_PF7,
  87                .end = IRQ_PF7,
  88                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  89        },
  90};
  91static struct platform_device smc91x_device = {
  92        .name = "smc91x",
  93        .id = 0,
  94        .num_resources = ARRAY_SIZE(smc91x_resources),
  95        .resource = smc91x_resources,
  96        .dev    = {
  97                .platform_data  = &smc91x_info,
  98        },
  99};
 100#endif
 101
 102#if IS_ENABLED(CONFIG_BFIN_MAC)
 103#include <linux/bfin_mac.h>
 104static const unsigned short bfin_mac_peripherals[] = P_RMII0;
 105
 106static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 107        {
 108                .addr = 1,
 109                .irq = IRQ_MAC_PHYINT,
 110        },
 111};
 112
 113static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 114        .phydev_number = 1,
 115        .phydev_data = bfin_phydev_data,
 116        .phy_mode = PHY_INTERFACE_MODE_RMII,
 117        .mac_peripherals = bfin_mac_peripherals,
 118};
 119
 120static struct platform_device bfin_mii_bus = {
 121        .name = "bfin_mii_bus",
 122        .dev = {
 123                .platform_data = &bfin_mii_bus_data,
 124        }
 125};
 126
 127static struct platform_device bfin_mac_device = {
 128        .name = "bfin_mac",
 129        .dev = {
 130                .platform_data = &bfin_mii_bus,
 131        }
 132};
 133#endif
 134
 135#if IS_ENABLED(CONFIG_USB_NET2272)
 136static struct resource net2272_bfin_resources[] = {
 137        {
 138                .start = 0x20300000,
 139                .end = 0x20300000 + 0x100,
 140                .flags = IORESOURCE_MEM,
 141        }, {
 142                .start = IRQ_PF7,
 143                .end = IRQ_PF7,
 144                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 145        },
 146};
 147
 148static struct platform_device net2272_bfin_device = {
 149        .name = "net2272",
 150        .id = -1,
 151        .num_resources = ARRAY_SIZE(net2272_bfin_resources),
 152        .resource = net2272_bfin_resources,
 153};
 154#endif
 155
 156#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
 157/* all SPI peripherals info goes here */
 158
 159#if IS_ENABLED(CONFIG_MTD_M25P80)
 160static struct mtd_partition bfin_spi_flash_partitions[] = {
 161        {
 162                .name = "bootloader(spi)",
 163                .size = 0x00020000,
 164                .offset = 0,
 165                .mask_flags = MTD_CAP_ROM
 166        }, {
 167                .name = "linux kernel(spi)",
 168                .size = 0xe0000,
 169                .offset = 0x20000
 170        }, {
 171                .name = "file system(spi)",
 172                .size = 0x700000,
 173                .offset = 0x00100000,
 174        }
 175};
 176
 177static struct flash_platform_data bfin_spi_flash_data = {
 178        .name = "m25p80",
 179        .parts = bfin_spi_flash_partitions,
 180        .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 181        .type = "m25p64",
 182};
 183
 184/* SPI flash chip (m25p64) */
 185static struct bfin5xx_spi_chip spi_flash_chip_info = {
 186        .enable_dma = 0,         /* use dma transfer with this chip*/
 187};
 188#endif
 189
 190#if IS_ENABLED(CONFIG_MMC_SPI)
 191static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 192        .enable_dma = 0,
 193};
 194#endif
 195
 196#if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
 197static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 198        .model                  = 7877,
 199        .vref_delay_usecs       = 50,   /* internal, no capacitor */
 200        .x_plate_ohms           = 419,
 201        .y_plate_ohms           = 486,
 202        .pressure_max           = 1000,
 203        .pressure_min           = 0,
 204        .stopacq_polarity       = 1,
 205        .first_conversion_delay = 3,
 206        .acquisition_time       = 1,
 207        .averaging              = 1,
 208        .pen_down_acc_interval  = 1,
 209};
 210#endif
 211
 212static struct spi_board_info bfin_spi_board_info[] __initdata = {
 213#if IS_ENABLED(CONFIG_MTD_M25P80)
 214        {
 215                /* the modalias must be the same as spi device driver name */
 216                .modalias = "m25p80", /* Name of spi_driver for this device */
 217                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 218                .bus_num = 0, /* Framework bus number */
 219                .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 220                .platform_data = &bfin_spi_flash_data,
 221                .controller_data = &spi_flash_chip_info,
 222                .mode = SPI_MODE_3,
 223        },
 224#endif
 225
 226#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
 227        {
 228                .modalias = "ad183x",
 229                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 230                .bus_num = 0,
 231                .chip_select = 4,
 232        },
 233#endif
 234#if IS_ENABLED(CONFIG_MMC_SPI)
 235        {
 236                .modalias = "mmc_spi",
 237                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 238                .bus_num = 0,
 239                .chip_select = 5,
 240                .controller_data = &mmc_spi_chip_info,
 241                .mode = SPI_MODE_3,
 242        },
 243#endif
 244#if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
 245{
 246        .modalias               = "ad7877",
 247        .platform_data          = &bfin_ad7877_ts_info,
 248        .irq                    = IRQ_PF2,
 249        .max_speed_hz           = 12500000,     /* max spi clock (SCK) speed in HZ */
 250        .bus_num                = 0,
 251        .chip_select            = 5,
 252},
 253#endif
 254
 255};
 256
 257/* SPI (0) */
 258static struct resource bfin_spi0_resource[] = {
 259        [0] = {
 260                .start = SPI0_REGBASE,
 261                .end   = SPI0_REGBASE + 0xFF,
 262                .flags = IORESOURCE_MEM,
 263                },
 264        [1] = {
 265                .start = CH_SPI,
 266                .end   = CH_SPI,
 267                .flags = IORESOURCE_DMA,
 268        },
 269        [2] = {
 270                .start = IRQ_SPI,
 271                .end   = IRQ_SPI,
 272                .flags = IORESOURCE_IRQ,
 273        },
 274};
 275
 276/* SPI controller data */
 277static struct bfin5xx_spi_master bfin_spi0_info = {
 278        .num_chipselect = 8,
 279        .enable_dma = 1,  /* master has the ability to do dma transfer */
 280        .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 281};
 282
 283static struct platform_device bfin_spi0_device = {
 284        .name = "bfin-spi",
 285        .id = 0, /* Bus number */
 286        .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 287        .resource = bfin_spi0_resource,
 288        .dev = {
 289                .platform_data = &bfin_spi0_info, /* Passed to driver */
 290        },
 291};
 292#endif  /* spi master and devices */
 293
 294#if IS_ENABLED(CONFIG_FB_BF537_LQ035)
 295static struct platform_device bfin_fb_device = {
 296        .name = "bf537-lq035",
 297};
 298#endif
 299
 300#if IS_ENABLED(CONFIG_SERIAL_BFIN)
 301#ifdef CONFIG_SERIAL_BFIN_UART0
 302static struct resource bfin_uart0_resources[] = {
 303        {
 304                .start = UART0_THR,
 305                .end = UART0_GCTL+2,
 306                .flags = IORESOURCE_MEM,
 307        },
 308        {
 309                .start = IRQ_UART0_TX,
 310                .end = IRQ_UART0_TX,
 311                .flags = IORESOURCE_IRQ,
 312        },
 313        {
 314                .start = IRQ_UART0_RX,
 315                .end = IRQ_UART0_RX,
 316                .flags = IORESOURCE_IRQ,
 317        },
 318        {
 319                .start = IRQ_UART0_ERROR,
 320                .end = IRQ_UART0_ERROR,
 321                .flags = IORESOURCE_IRQ,
 322        },
 323        {
 324                .start = CH_UART0_TX,
 325                .end = CH_UART0_TX,
 326                .flags = IORESOURCE_DMA,
 327        },
 328        {
 329                .start = CH_UART0_RX,
 330                .end = CH_UART0_RX,
 331                .flags = IORESOURCE_DMA,
 332        },
 333};
 334
 335static unsigned short bfin_uart0_peripherals[] = {
 336        P_UART0_TX, P_UART0_RX, 0
 337};
 338
 339static struct platform_device bfin_uart0_device = {
 340        .name = "bfin-uart",
 341        .id = 0,
 342        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 343        .resource = bfin_uart0_resources,
 344        .dev = {
 345                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 346        },
 347};
 348#endif
 349#ifdef CONFIG_SERIAL_BFIN_UART1
 350static struct resource bfin_uart1_resources[] = {
 351        {
 352                .start = UART1_THR,
 353                .end = UART1_GCTL+2,
 354                .flags = IORESOURCE_MEM,
 355        },
 356        {
 357                .start = IRQ_UART1_TX,
 358                .end = IRQ_UART1_TX,
 359                .flags = IORESOURCE_IRQ,
 360        },
 361        {
 362                .start = IRQ_UART1_RX,
 363                .end = IRQ_UART1_RX,
 364                .flags = IORESOURCE_IRQ,
 365        },
 366        {
 367                .start = IRQ_UART1_ERROR,
 368                .end = IRQ_UART1_ERROR,
 369                .flags = IORESOURCE_IRQ,
 370        },
 371        {
 372                .start = CH_UART1_TX,
 373                .end = CH_UART1_TX,
 374                .flags = IORESOURCE_DMA,
 375        },
 376        {
 377                .start = CH_UART1_RX,
 378                .end = CH_UART1_RX,
 379                .flags = IORESOURCE_DMA,
 380        },
 381};
 382
 383static unsigned short bfin_uart1_peripherals[] = {
 384        P_UART1_TX, P_UART1_RX, 0
 385};
 386
 387static struct platform_device bfin_uart1_device = {
 388        .name = "bfin-uart",
 389        .id = 1,
 390        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 391        .resource = bfin_uart1_resources,
 392        .dev = {
 393                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 394        },
 395};
 396#endif
 397#endif
 398
 399#if IS_ENABLED(CONFIG_BFIN_SIR)
 400#ifdef CONFIG_BFIN_SIR0
 401static struct resource bfin_sir0_resources[] = {
 402        {
 403                .start = 0xFFC00400,
 404                .end = 0xFFC004FF,
 405                .flags = IORESOURCE_MEM,
 406        },
 407        {
 408                .start = IRQ_UART0_RX,
 409                .end = IRQ_UART0_RX+1,
 410                .flags = IORESOURCE_IRQ,
 411        },
 412        {
 413                .start = CH_UART0_RX,
 414                .end = CH_UART0_RX+1,
 415                .flags = IORESOURCE_DMA,
 416        },
 417};
 418
 419static struct platform_device bfin_sir0_device = {
 420        .name = "bfin_sir",
 421        .id = 0,
 422        .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 423        .resource = bfin_sir0_resources,
 424};
 425#endif
 426#ifdef CONFIG_BFIN_SIR1
 427static struct resource bfin_sir1_resources[] = {
 428        {
 429                .start = 0xFFC02000,
 430                .end = 0xFFC020FF,
 431                .flags = IORESOURCE_MEM,
 432        },
 433        {
 434                .start = IRQ_UART1_RX,
 435                .end = IRQ_UART1_RX+1,
 436                .flags = IORESOURCE_IRQ,
 437        },
 438        {
 439                .start = CH_UART1_RX,
 440                .end = CH_UART1_RX+1,
 441                .flags = IORESOURCE_DMA,
 442        },
 443};
 444
 445static struct platform_device bfin_sir1_device = {
 446        .name = "bfin_sir",
 447        .id = 1,
 448        .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 449        .resource = bfin_sir1_resources,
 450};
 451#endif
 452#endif
 453
 454static struct platform_device *stamp_devices[] __initdata = {
 455#if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
 456        &bfin_pcmcia_cf_device,
 457#endif
 458
 459#if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
 460        &rtc_device,
 461#endif
 462
 463#if IS_ENABLED(CONFIG_SMC91X)
 464        &smc91x_device,
 465#endif
 466
 467#if IS_ENABLED(CONFIG_BFIN_MAC)
 468        &bfin_mii_bus,
 469        &bfin_mac_device,
 470#endif
 471
 472#if IS_ENABLED(CONFIG_USB_NET2272)
 473        &net2272_bfin_device,
 474#endif
 475
 476#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
 477        &bfin_spi0_device,
 478#endif
 479
 480#if IS_ENABLED(CONFIG_FB_BF537_LQ035)
 481        &bfin_fb_device,
 482#endif
 483
 484#if IS_ENABLED(CONFIG_SERIAL_BFIN)
 485#ifdef CONFIG_SERIAL_BFIN_UART0
 486        &bfin_uart0_device,
 487#endif
 488#ifdef CONFIG_SERIAL_BFIN_UART1
 489        &bfin_uart1_device,
 490#endif
 491#endif
 492
 493#if IS_ENABLED(CONFIG_BFIN_SIR)
 494#ifdef CONFIG_BFIN_SIR0
 495        &bfin_sir0_device,
 496#endif
 497#ifdef CONFIG_BFIN_SIR1
 498        &bfin_sir1_device,
 499#endif
 500#endif
 501};
 502
 503static int __init pnav_init(void)
 504{
 505        printk(KERN_INFO "%s(): registering device resources\n", __func__);
 506        platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 507#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
 508        spi_register_board_info(bfin_spi_board_info,
 509                                ARRAY_SIZE(bfin_spi_board_info));
 510#endif
 511        return 0;
 512}
 513
 514arch_initcall(pnav_init);
 515
 516static struct platform_device *stamp_early_devices[] __initdata = {
 517#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 518#ifdef CONFIG_SERIAL_BFIN_UART0
 519        &bfin_uart0_device,
 520#endif
 521#ifdef CONFIG_SERIAL_BFIN_UART1
 522        &bfin_uart1_device,
 523#endif
 524#endif
 525};
 526
 527void __init native_machine_early_platform_add_devices(void)
 528{
 529        printk(KERN_INFO "register early platform devices\n");
 530        early_platform_add_devices(stamp_early_devices,
 531                ARRAY_SIZE(stamp_early_devices));
 532}
 533
 534int bfin_get_ether_addr(char *addr)
 535{
 536        return 1;
 537}
 538EXPORT_SYMBOL(bfin_get_ether_addr);
 539