linux/arch/m68k/Kconfig.cpu
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   1comment "Processor Type"
   2
   3choice
   4        prompt "CPU family support"
   5        default M68KCLASSIC if MMU
   6        default COLDFIRE if !MMU
   7        help
   8          The Freescale (was Motorola) M68K family of processors implements
   9          the full 68000 processor instruction set.
  10          The Freescale ColdFire family of processors is a modern derivative
  11          of the 68000 processor family. They are mainly targeted at embedded
  12          applications, and are all System-On-Chip (SOC) devices, as opposed
  13          to stand alone CPUs. They implement a subset of the original 68000
  14          processor instruction set.
  15          If you anticipate running this kernel on a computer with a classic
  16          MC68xxx processor, select M68KCLASSIC.
  17          If you anticipate running this kernel on a computer with a ColdFire
  18          processor, select COLDFIRE.
  19
  20config M68KCLASSIC
  21        bool "Classic M68K CPU family support"
  22
  23config COLDFIRE
  24        bool "Coldfire CPU family support"
  25        select ARCH_HAVE_CUSTOM_GPIO_H
  26        select CPU_HAS_NO_BITFIELDS
  27        select CPU_HAS_NO_MULDIV64
  28        select GENERIC_CSUM
  29        select GPIOLIB
  30        select HAVE_CLK
  31
  32endchoice
  33
  34if M68KCLASSIC
  35
  36config M68000
  37        bool "MC68000"
  38        depends on !MMU
  39        select CPU_HAS_NO_BITFIELDS
  40        select CPU_HAS_NO_MULDIV64
  41        select CPU_HAS_NO_UNALIGNED
  42        select GENERIC_CSUM
  43        select CPU_NO_EFFICIENT_FFS
  44        select HAVE_ARCH_HASH
  45        help
  46          The Freescale (was Motorola) 68000 CPU is the first generation of
  47          the well known M68K family of processors. The CPU core as well as
  48          being available as a stand alone CPU was also used in many
  49          System-On-Chip devices (eg 68328, 68302, etc). It does not contain
  50          a paging MMU.
  51
  52config MCPU32
  53        bool
  54        select CPU_HAS_NO_BITFIELDS
  55        select CPU_HAS_NO_UNALIGNED
  56        select CPU_NO_EFFICIENT_FFS
  57        help
  58          The Freescale (was then Motorola) CPU32 is a CPU core that is
  59          based on the 68020 processor. For the most part it is used in
  60          System-On-Chip parts, and does not contain a paging MMU.
  61
  62config M68020
  63        bool "68020 support"
  64        depends on MMU
  65        select FPU
  66        select CPU_HAS_ADDRESS_SPACES
  67        help
  68          If you anticipate running this kernel on a computer with a MC68020
  69          processor, say Y. Otherwise, say N. Note that the 68020 requires a
  70          68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
  71          Sun 3, which provides its own version.
  72
  73config M68030
  74        bool "68030 support"
  75        depends on MMU && !MMU_SUN3
  76        select FPU
  77        select CPU_HAS_ADDRESS_SPACES
  78        help
  79          If you anticipate running this kernel on a computer with a MC68030
  80          processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
  81          work, as it does not include an MMU (Memory Management Unit).
  82
  83config M68040
  84        bool "68040 support"
  85        depends on MMU && !MMU_SUN3
  86        select FPU
  87        select CPU_HAS_ADDRESS_SPACES
  88        help
  89          If you anticipate running this kernel on a computer with a MC68LC040
  90          or MC68040 processor, say Y. Otherwise, say N. Note that an
  91          MC68EC040 will not work, as it does not include an MMU (Memory
  92          Management Unit).
  93
  94config M68060
  95        bool "68060 support"
  96        depends on MMU && !MMU_SUN3
  97        select FPU
  98        select CPU_HAS_ADDRESS_SPACES
  99        help
 100          If you anticipate running this kernel on a computer with a MC68060
 101          processor, say Y. Otherwise, say N.
 102
 103config M68328
 104        bool "MC68328"
 105        depends on !MMU
 106        select M68000
 107        help
 108          Motorola 68328 processor support.
 109
 110config M68EZ328
 111        bool "MC68EZ328"
 112        depends on !MMU
 113        select M68000
 114        help
 115          Motorola 68EX328 processor support.
 116
 117config M68VZ328
 118        bool "MC68VZ328"
 119        depends on !MMU
 120        select M68000
 121        help
 122          Motorola 68VZ328 processor support.
 123
 124endif # M68KCLASSIC
 125
 126if COLDFIRE
 127
 128choice
 129        prompt "ColdFire SoC type"
 130        default M520x
 131        help
 132          Select the type of ColdFire System-on-Chip (SoC) that you want
 133          to build for.
 134
 135config M5206
 136        bool "MCF5206"
 137        depends on !MMU
 138        select COLDFIRE_SW_A7
 139        select HAVE_MBAR
 140        select CPU_NO_EFFICIENT_FFS
 141        help
 142          Motorola ColdFire 5206 processor support.
 143
 144config M5206e
 145        bool "MCF5206e"
 146        depends on !MMU
 147        select COLDFIRE_SW_A7
 148        select HAVE_MBAR
 149        select CPU_NO_EFFICIENT_FFS
 150        help
 151          Motorola ColdFire 5206e processor support.
 152
 153config M520x
 154        bool "MCF520x"
 155        depends on !MMU
 156        select GENERIC_CLOCKEVENTS
 157        select HAVE_CACHE_SPLIT
 158        help
 159           Freescale Coldfire 5207/5208 processor support.
 160
 161config M523x
 162        bool "MCF523x"
 163        depends on !MMU
 164        select GENERIC_CLOCKEVENTS
 165        select HAVE_CACHE_SPLIT
 166        select HAVE_IPSBAR
 167        help
 168          Freescale Coldfire 5230/1/2/4/5 processor support
 169
 170config M5249
 171        bool "MCF5249"
 172        depends on !MMU
 173        select COLDFIRE_SW_A7
 174        select HAVE_MBAR
 175        select CPU_NO_EFFICIENT_FFS
 176        help
 177          Motorola ColdFire 5249 processor support.
 178
 179config M525x
 180        bool "MCF525x"
 181        depends on !MMU
 182        select COLDFIRE_SW_A7
 183        select HAVE_MBAR
 184        select CPU_NO_EFFICIENT_FFS
 185        help
 186          Freescale (Motorola) Coldfire 5251/5253 processor support.
 187
 188config M5271
 189        bool "MCF5271"
 190        depends on !MMU
 191        select M527x
 192        select HAVE_CACHE_SPLIT
 193        select HAVE_IPSBAR
 194        select GENERIC_CLOCKEVENTS
 195        help
 196          Freescale (Motorola) ColdFire 5270/5271 processor support.
 197
 198config M5272
 199        bool "MCF5272"
 200        depends on !MMU
 201        select COLDFIRE_SW_A7
 202        select HAVE_MBAR
 203        select CPU_NO_EFFICIENT_FFS
 204        help
 205          Motorola ColdFire 5272 processor support.
 206
 207config M5275
 208        bool "MCF5275"
 209        depends on !MMU
 210        select M527x
 211        select HAVE_CACHE_SPLIT
 212        select HAVE_IPSBAR
 213        select GENERIC_CLOCKEVENTS
 214        help
 215          Freescale (Motorola) ColdFire 5274/5275 processor support.
 216
 217config M528x
 218        bool "MCF528x"
 219        depends on !MMU
 220        select GENERIC_CLOCKEVENTS
 221        select HAVE_CACHE_SPLIT
 222        select HAVE_IPSBAR
 223        help
 224          Motorola ColdFire 5280/5282 processor support.
 225
 226config M5307
 227        bool "MCF5307"
 228        depends on !MMU
 229        select COLDFIRE_SW_A7
 230        select HAVE_CACHE_CB
 231        select HAVE_MBAR
 232        select CPU_NO_EFFICIENT_FFS
 233        help
 234          Motorola ColdFire 5307 processor support.
 235
 236config M532x
 237        bool "MCF532x"
 238        depends on !MMU
 239        select M53xx
 240        select HAVE_CACHE_CB
 241        help
 242          Freescale (Motorola) ColdFire 532x processor support.
 243
 244config M537x
 245        bool "MCF537x"
 246        depends on !MMU
 247        select M53xx
 248        select HAVE_CACHE_CB
 249        help
 250          Freescale ColdFire 537x processor support.
 251
 252config M5407
 253        bool "MCF5407"
 254        depends on !MMU
 255        select COLDFIRE_SW_A7
 256        select HAVE_CACHE_CB
 257        select HAVE_MBAR
 258        select CPU_NO_EFFICIENT_FFS
 259        help
 260          Motorola ColdFire 5407 processor support.
 261
 262config M547x
 263        bool "MCF547x"
 264        select M54xx
 265        select MMU_COLDFIRE if MMU
 266        select FPU if MMU
 267        select HAVE_CACHE_CB
 268        select HAVE_MBAR
 269        select CPU_NO_EFFICIENT_FFS
 270        help
 271          Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
 272
 273config M548x
 274        bool "MCF548x"
 275        select MMU_COLDFIRE if MMU
 276        select FPU if MMU
 277        select M54xx
 278        select HAVE_CACHE_CB
 279        select HAVE_MBAR
 280        select CPU_NO_EFFICIENT_FFS
 281        help
 282          Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
 283
 284config M5441x
 285        bool "MCF5441x"
 286        depends on !MMU
 287        select GENERIC_CLOCKEVENTS
 288        select HAVE_CACHE_CB
 289        help
 290          Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
 291
 292endchoice
 293
 294config M527x
 295        bool
 296
 297config M53xx
 298        bool
 299
 300config M54xx
 301        bool
 302
 303endif # COLDFIRE
 304
 305
 306comment "Processor Specific Options"
 307
 308config M68KFPU_EMU
 309        bool "Math emulation support"
 310        depends on MMU
 311        help
 312          At some point in the future, this will cause floating-point math
 313          instructions to be emulated by the kernel on machines that lack a
 314          floating-point math coprocessor.  Thrill-seekers and chronically
 315          sleep-deprived psychotic hacker types can say Y now, everyone else
 316          should probably wait a while.
 317
 318config M68KFPU_EMU_EXTRAPREC
 319        bool "Math emulation extra precision"
 320        depends on M68KFPU_EMU
 321        help
 322          The fpu uses normally a few bit more during calculations for
 323          correct rounding, the emulator can (often) do the same but this
 324          extra calculation can cost quite some time, so you can disable
 325          it here. The emulator will then "only" calculate with a 64 bit
 326          mantissa and round slightly incorrect, what is more than enough
 327          for normal usage.
 328
 329config M68KFPU_EMU_ONLY
 330        bool "Math emulation only kernel"
 331        depends on M68KFPU_EMU
 332        help
 333          This option prevents any floating-point instructions from being
 334          compiled into the kernel, thereby the kernel doesn't save any
 335          floating point context anymore during task switches, so this
 336          kernel will only be usable on machines without a floating-point
 337          math coprocessor. This makes the kernel a bit faster as no tests
 338          needs to be executed whether a floating-point instruction in the
 339          kernel should be executed or not.
 340
 341config ADVANCED
 342        bool "Advanced configuration options"
 343        depends on MMU
 344        ---help---
 345          This gives you access to some advanced options for the CPU. The
 346          defaults should be fine for most users, but these options may make
 347          it possible for you to improve performance somewhat if you know what
 348          you are doing.
 349
 350          Note that the answer to this question won't directly affect the
 351          kernel: saying N will just cause the configurator to skip all
 352          the questions about these options.
 353
 354          Most users should say N to this question.
 355
 356config RMW_INSNS
 357        bool "Use read-modify-write instructions"
 358        depends on ADVANCED
 359        ---help---
 360          This allows to use certain instructions that work with indivisible
 361          read-modify-write bus cycles. While this is faster than the
 362          workaround of disabling interrupts, it can conflict with DMA
 363          ( = direct memory access) on many Amiga systems, and it is also said
 364          to destabilize other machines. It is very likely that this will
 365          cause serious problems on any Amiga or Atari Medusa if set. The only
 366          configuration where it should work are 68030-based Ataris, where it
 367          apparently improves performance. But you've been warned! Unless you
 368          really know what you are doing, say N. Try Y only if you're quite
 369          adventurous.
 370
 371config SINGLE_MEMORY_CHUNK
 372        bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
 373        depends on MMU
 374        default y if SUN3
 375        select NEED_MULTIPLE_NODES
 376        help
 377          Ignore all but the first contiguous chunk of physical memory for VM
 378          purposes.  This will save a few bytes kernel size and may speed up
 379          some operations.  Say N if not sure.
 380
 381config ARCH_DISCONTIGMEM_ENABLE
 382        def_bool MMU && !SINGLE_MEMORY_CHUNK
 383
 384config 060_WRITETHROUGH
 385        bool "Use write-through caching for 68060 supervisor accesses"
 386        depends on ADVANCED && M68060
 387        ---help---
 388          The 68060 generally uses copyback caching of recently accessed data.
 389          Copyback caching means that memory writes will be held in an on-chip
 390          cache and only written back to memory some time later.  Saying Y
 391          here will force supervisor (kernel) accesses to use writethrough
 392          caching.  Writethrough caching means that data is written to memory
 393          straight away, so that cache and memory data always agree.
 394          Writethrough caching is less efficient, but is needed for some
 395          drivers on 68060 based systems where the 68060 bus snooping signal
 396          is hardwired on.  The 53c710 SCSI driver is known to suffer from
 397          this problem.
 398
 399config M68K_L2_CACHE
 400        bool
 401        depends on MAC
 402        default y
 403
 404config NODES_SHIFT
 405        int
 406        default "3"
 407        depends on !SINGLE_MEMORY_CHUNK
 408
 409config CPU_HAS_NO_BITFIELDS
 410        bool
 411
 412config CPU_HAS_NO_MULDIV64
 413        bool
 414
 415config CPU_HAS_NO_UNALIGNED
 416        bool
 417
 418config CPU_HAS_ADDRESS_SPACES
 419        bool
 420
 421config FPU
 422        bool
 423
 424config COLDFIRE_SW_A7
 425        bool
 426
 427config HAVE_CACHE_SPLIT
 428        bool
 429
 430config HAVE_CACHE_CB
 431        bool
 432
 433config HAVE_MBAR
 434        bool
 435
 436config HAVE_IPSBAR
 437        bool
 438
 439config CLOCK_FREQ
 440        int "Set the core clock frequency"
 441        default "25000000" if M5206
 442        default "54000000" if M5206e
 443        default "166666666" if M520x
 444        default "140000000" if M5249
 445        default "150000000" if M527x || M523x
 446        default "90000000" if M5307
 447        default "50000000" if M5407
 448        default "266000000" if M54xx
 449        default "66666666"
 450        depends on COLDFIRE
 451        help
 452          Define the CPU clock frequency in use. This is the core clock
 453          frequency, it may or may not be the same as the external clock
 454          crystal fitted to your board. Some processors have an internal
 455          PLL and can have their frequency programmed at run time, others
 456          use internal dividers. In general the kernel won't setup a PLL
 457          if it is fitted (there are some exceptions). This value will be
 458          specific to the exact CPU that you are using.
 459
 460config OLDMASK
 461        bool "Old mask 5307 (1H55J) silicon"
 462        depends on M5307
 463        help
 464          Build support for the older revision ColdFire 5307 silicon.
 465          Specifically this is the 1H55J mask revision.
 466
 467if HAVE_CACHE_SPLIT
 468choice
 469        prompt "Split Cache Configuration"
 470        default CACHE_I
 471
 472config CACHE_I
 473        bool "Instruction"
 474        help
 475          Use all of the ColdFire CPU cache memory as an instruction cache.
 476
 477config CACHE_D
 478        bool "Data"
 479        help
 480          Use all of the ColdFire CPU cache memory as a data cache.
 481
 482config CACHE_BOTH
 483        bool "Both"
 484        help
 485          Split the ColdFire CPU cache, and use half as an instruction cache
 486          and half as a data cache.
 487endchoice
 488endif
 489
 490if HAVE_CACHE_CB
 491choice
 492        prompt "Data cache mode"
 493        default CACHE_WRITETHRU
 494
 495config CACHE_WRITETHRU
 496        bool "Write-through"
 497        help
 498          The ColdFire CPU cache is set into Write-through mode.
 499
 500config CACHE_COPYBACK
 501        bool "Copy-back"
 502        help
 503          The ColdFire CPU cache is set into Copy-back mode.
 504endchoice
 505endif
 506
 507