1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19#include <linux/kernel.h>
20#include <linux/sched.h>
21#include <linux/delay.h>
22#include <linux/interrupt.h>
23#include <linux/fb.h>
24#include <linux/module.h>
25#include <linux/mm.h>
26#include <linux/console.h>
27#include <linux/errno.h>
28#include <linux/string.h>
29#include <linux/bootmem.h>
30#include <linux/seq_file.h>
31#include <linux/init.h>
32#include <linux/initrd.h>
33#include <linux/root_dev.h>
34#include <linux/rtc.h>
35
36#include <asm/setup.h>
37#include <asm/bootinfo.h>
38#include <asm/irq.h>
39#include <asm/machdep.h>
40#include <asm/pgtable.h>
41#include <asm/sections.h>
42
43unsigned long memory_start;
44unsigned long memory_end;
45
46EXPORT_SYMBOL(memory_start);
47EXPORT_SYMBOL(memory_end);
48
49char __initdata command_line[COMMAND_LINE_SIZE];
50
51
52void (*mach_sched_init)(irq_handler_t handler) __initdata = NULL;
53int (*mach_set_clock_mmss)(unsigned long);
54int (*mach_hwclk) (int, struct rtc_time*);
55
56
57void (*mach_reset)(void);
58void (*mach_halt)(void);
59void (*mach_power_off)(void);
60
61#ifdef CONFIG_M68000
62#if defined(CONFIG_M68328)
63#define CPU_NAME "MC68328"
64#elif defined(CONFIG_M68EZ328)
65#define CPU_NAME "MC68EZ328"
66#elif defined(CONFIG_M68VZ328)
67#define CPU_NAME "MC68VZ328"
68#else
69#define CPU_NAME "MC68000"
70#endif
71#endif
72#ifndef CPU_NAME
73#define CPU_NAME "UNKNOWN"
74#endif
75
76
77
78
79
80
81
82#ifndef CPU_INSTR_PER_JIFFY
83#define CPU_INSTR_PER_JIFFY 16
84#endif
85
86void __init setup_arch(char **cmdline_p)
87{
88 int bootmap_size;
89
90 memory_start = PAGE_ALIGN(_ramstart);
91 memory_end = _ramend;
92
93 init_mm.start_code = (unsigned long) &_stext;
94 init_mm.end_code = (unsigned long) &_etext;
95 init_mm.end_data = (unsigned long) &_edata;
96 init_mm.brk = (unsigned long) 0;
97
98 config_BSP(&command_line[0], sizeof(command_line));
99
100#if defined(CONFIG_BOOTPARAM)
101 strncpy(&command_line[0], CONFIG_BOOTPARAM_STRING, sizeof(command_line));
102 command_line[sizeof(command_line) - 1] = 0;
103#endif
104
105 process_uboot_commandline(&command_line[0], sizeof(command_line));
106
107 pr_info("uClinux with CPU " CPU_NAME "\n");
108
109#ifdef CONFIG_UCDIMM
110 pr_info("uCdimm by Lineo, Inc. <www.lineo.com>\n");
111#endif
112#ifdef CONFIG_M68VZ328
113 pr_info("M68VZ328 support by Evan Stawnyczy <e@lineo.ca>\n");
114#endif
115#ifdef CONFIG_COLDFIRE
116 pr_info("COLDFIRE port done by Greg Ungerer, gerg@snapgear.com\n");
117#ifdef CONFIG_M5307
118 pr_info("Modified for M5307 by Dave Miller, dmiller@intellistor.com\n");
119#endif
120#ifdef CONFIG_ELITE
121 pr_info("Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n");
122#endif
123#endif
124 pr_info("Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n");
125
126#if defined( CONFIG_PILOT ) && defined( CONFIG_M68328 )
127 pr_info("TRG SuperPilot FLASH card support <info@trgnet.com>\n");
128#endif
129#if defined( CONFIG_PILOT ) && defined( CONFIG_M68EZ328 )
130 pr_info("PalmV support by Lineo Inc. <jeff@uclinux.com>\n");
131#endif
132#ifdef CONFIG_DRAGEN2
133 pr_info("DragonEngine II board support by Georges Menie\n");
134#endif
135#ifdef CONFIG_M5235EVB
136 pr_info("Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
137#endif
138
139 pr_debug("KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p BSS=0x%p-0x%p\n",
140 _stext, _etext, _sdata, _edata, __bss_start, __bss_stop);
141 pr_debug("MEMORY -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx\n ",
142 __bss_stop, memory_start, memory_start, memory_end);
143
144
145 *cmdline_p = &command_line[0];
146 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
147 boot_command_line[COMMAND_LINE_SIZE-1] = 0;
148
149#if defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_DUMMY_CONSOLE)
150 conswitchp = &dummy_con;
151#endif
152
153
154
155
156
157 min_low_pfn = PFN_DOWN(memory_start);
158 max_pfn = max_low_pfn = PFN_DOWN(memory_end);
159
160 bootmap_size = init_bootmem_node(
161 NODE_DATA(0),
162 min_low_pfn,
163 PFN_DOWN(PAGE_OFFSET),
164 max_pfn);
165
166
167
168
169 free_bootmem(memory_start, memory_end - memory_start);
170 reserve_bootmem(memory_start, bootmap_size, BOOTMEM_DEFAULT);
171
172#if defined(CONFIG_UBOOT) && defined(CONFIG_BLK_DEV_INITRD)
173 if ((initrd_start > 0) && (initrd_start < initrd_end) &&
174 (initrd_end < memory_end))
175 reserve_bootmem(initrd_start, initrd_end - initrd_start,
176 BOOTMEM_DEFAULT);
177#endif
178
179
180
181
182 paging_init();
183}
184
185
186
187
188static int show_cpuinfo(struct seq_file *m, void *v)
189{
190 char *cpu, *mmu, *fpu;
191 u_long clockfreq;
192
193 cpu = CPU_NAME;
194 mmu = "none";
195 fpu = "none";
196 clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
197
198 seq_printf(m, "CPU:\t\t%s\n"
199 "MMU:\t\t%s\n"
200 "FPU:\t\t%s\n"
201 "Clocking:\t%lu.%1luMHz\n"
202 "BogoMips:\t%lu.%02lu\n"
203 "Calibration:\t%lu loops\n",
204 cpu, mmu, fpu,
205 clockfreq / 1000000,
206 (clockfreq / 100000) % 10,
207 (loops_per_jiffy * HZ) / 500000,
208 ((loops_per_jiffy * HZ) / 5000) % 100,
209 (loops_per_jiffy * HZ));
210
211 return 0;
212}
213
214static void *c_start(struct seq_file *m, loff_t *pos)
215{
216 return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL;
217}
218
219static void *c_next(struct seq_file *m, void *v, loff_t *pos)
220{
221 ++*pos;
222 return c_start(m, pos);
223}
224
225static void c_stop(struct seq_file *m, void *v)
226{
227}
228
229const struct seq_operations cpuinfo_op = {
230 .start = c_start,
231 .next = c_next,
232 .stop = c_stop,
233 .show = show_cpuinfo,
234};
235
236
