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16#include <linux/interrupt.h>
17#include <linux/spinlock.h>
18#include <linux/init.h>
19#include <linux/jiffies.h>
20#include <linux/cpumask.h>
21#include <linux/err.h>
22#include <linux/kernel.h>
23#include <linux/delay.h>
24#include <linux/sched/mm.h>
25#include <linux/sched/task.h>
26#include <linux/profile.h>
27#include <linux/smp.h>
28#include <linux/cpu.h>
29#include <asm/tlbflush.h>
30#include <asm/bitops.h>
31#include <asm/processor.h>
32#include <asm/bug.h>
33#include <asm/exceptions.h>
34#include <asm/hardirq.h>
35#include <asm/fpu.h>
36#include <asm/mmu_context.h>
37#include <asm/thread_info.h>
38#include <asm/cpu-regs.h>
39#include <asm/intctl-regs.h>
40#include "internal.h"
41
42#ifdef CONFIG_HOTPLUG_CPU
43#include <asm/cacheflush.h>
44
45static unsigned long sleep_mode[NR_CPUS];
46
47static void run_sleep_cpu(unsigned int cpu);
48static void run_wakeup_cpu(unsigned int cpu);
49#endif
50
51
52
53
54
55#undef DEBUG_SMP
56#ifdef DEBUG_SMP
57#define Dprintk(fmt, ...) printk(KERN_DEBUG fmt, ##__VA_ARGS__)
58#else
59#define Dprintk(fmt, ...) no_printk(KERN_DEBUG fmt, ##__VA_ARGS__)
60#endif
61
62
63#define CALL_FUNCTION_NMI_IPI_TIMEOUT 0
64
65
66
67
68struct nmi_call_data_struct {
69 smp_call_func_t func;
70 void *info;
71 cpumask_t started;
72 cpumask_t finished;
73 int wait;
74 char size_alignment[0]
75 __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
76} __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
77
78static DEFINE_SPINLOCK(smp_nmi_call_lock);
79static struct nmi_call_data_struct *nmi_call_data;
80
81
82
83
84static cpumask_t cpu_callin_map;
85static cpumask_t cpu_callout_map;
86cpumask_t cpu_boot_map;
87unsigned long start_stack[NR_CPUS - 1];
88
89
90
91
92struct mn10300_cpuinfo cpu_data[NR_CPUS] __cacheline_aligned;
93
94static int cpucount;
95static cpumask_t smp_commenced_mask;
96cpumask_t cpu_initialized __initdata = CPU_MASK_NONE;
97
98
99
100
101static int do_boot_cpu(int);
102static void smp_show_cpu_info(int cpu_id);
103static void smp_callin(void);
104static void smp_online(void);
105static void smp_store_cpu_info(int);
106static void smp_cpu_init(void);
107static void smp_tune_scheduling(void);
108static void send_IPI_mask(const cpumask_t *cpumask, int irq);
109static void init_ipi(void);
110
111
112
113
114static void mn10300_ipi_disable(unsigned int irq);
115static void mn10300_ipi_enable(unsigned int irq);
116static void mn10300_ipi_chip_disable(struct irq_data *d);
117static void mn10300_ipi_chip_enable(struct irq_data *d);
118static void mn10300_ipi_ack(struct irq_data *d);
119static void mn10300_ipi_nop(struct irq_data *d);
120
121static struct irq_chip mn10300_ipi_type = {
122 .name = "cpu_ipi",
123 .irq_disable = mn10300_ipi_chip_disable,
124 .irq_enable = mn10300_ipi_chip_enable,
125 .irq_ack = mn10300_ipi_ack,
126 .irq_eoi = mn10300_ipi_nop
127};
128
129static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id);
130static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id);
131
132static struct irqaction reschedule_ipi = {
133 .handler = smp_reschedule_interrupt,
134 .flags = IRQF_NOBALANCING,
135 .name = "smp reschedule IPI"
136};
137static struct irqaction call_function_ipi = {
138 .handler = smp_call_function_interrupt,
139 .flags = IRQF_NOBALANCING,
140 .name = "smp call function IPI"
141};
142
143#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
144static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id);
145static struct irqaction local_timer_ipi = {
146 .handler = smp_ipi_timer_interrupt,
147 .flags = IRQF_NOBALANCING,
148 .name = "smp local timer IPI"
149};
150#endif
151
152
153
154
155static void init_ipi(void)
156{
157 unsigned long flags;
158 u16 tmp16;
159
160
161 irq_set_chip_and_handler(RESCHEDULE_IPI, &mn10300_ipi_type,
162 handle_percpu_irq);
163 setup_irq(RESCHEDULE_IPI, &reschedule_ipi);
164 set_intr_level(RESCHEDULE_IPI, RESCHEDULE_GxICR_LV);
165 mn10300_ipi_enable(RESCHEDULE_IPI);
166
167
168 irq_set_chip_and_handler(CALL_FUNC_SINGLE_IPI, &mn10300_ipi_type,
169 handle_percpu_irq);
170 setup_irq(CALL_FUNC_SINGLE_IPI, &call_function_ipi);
171 set_intr_level(CALL_FUNC_SINGLE_IPI, CALL_FUNCTION_GxICR_LV);
172 mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
173
174
175#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
176 defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
177 irq_set_chip_and_handler(LOCAL_TIMER_IPI, &mn10300_ipi_type,
178 handle_percpu_irq);
179 setup_irq(LOCAL_TIMER_IPI, &local_timer_ipi);
180 set_intr_level(LOCAL_TIMER_IPI, LOCAL_TIMER_GxICR_LV);
181 mn10300_ipi_enable(LOCAL_TIMER_IPI);
182#endif
183
184#ifdef CONFIG_MN10300_CACHE_ENABLED
185
186 irq_set_chip(FLUSH_CACHE_IPI, &mn10300_ipi_type);
187 flags = arch_local_cli_save();
188 __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(FLUSH_CACHE_GxICR_LV),
189 mn10300_low_ipi_handler);
190 GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
191 mn10300_ipi_enable(FLUSH_CACHE_IPI);
192 arch_local_irq_restore(flags);
193#endif
194
195
196 irq_set_chip(CALL_FUNCTION_NMI_IPI, &mn10300_ipi_type);
197 flags = arch_local_cli_save();
198 GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
199 tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
200 arch_local_irq_restore(flags);
201
202
203 flags = arch_local_cli_save();
204 __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(SMP_BOOT_GxICR_LV),
205 mn10300_low_ipi_handler);
206 arch_local_irq_restore(flags);
207
208#ifdef CONFIG_KERNEL_DEBUGGER
209 irq_set_chip(DEBUGGER_NMI_IPI, &mn10300_ipi_type);
210#endif
211}
212
213
214
215
216
217static void mn10300_ipi_shutdown(unsigned int irq)
218{
219 unsigned long flags;
220 u16 tmp;
221
222 flags = arch_local_cli_save();
223
224 tmp = GxICR(irq);
225 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
226 tmp = GxICR(irq);
227
228 arch_local_irq_restore(flags);
229}
230
231
232
233
234
235static void mn10300_ipi_enable(unsigned int irq)
236{
237 unsigned long flags;
238 u16 tmp;
239
240 flags = arch_local_cli_save();
241
242 tmp = GxICR(irq);
243 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
244 tmp = GxICR(irq);
245
246 arch_local_irq_restore(flags);
247}
248
249static void mn10300_ipi_chip_enable(struct irq_data *d)
250{
251 mn10300_ipi_enable(d->irq);
252}
253
254
255
256
257
258static void mn10300_ipi_disable(unsigned int irq)
259{
260 unsigned long flags;
261 u16 tmp;
262
263 flags = arch_local_cli_save();
264
265 tmp = GxICR(irq);
266 GxICR(irq) = tmp & GxICR_LEVEL;
267 tmp = GxICR(irq);
268
269 arch_local_irq_restore(flags);
270}
271
272static void mn10300_ipi_chip_disable(struct irq_data *d)
273{
274 mn10300_ipi_disable(d->irq);
275}
276
277
278
279
280
281
282
283
284
285static void mn10300_ipi_ack(struct irq_data *d)
286{
287 unsigned int irq = d->irq;
288 unsigned long flags;
289 u16 tmp;
290
291 flags = arch_local_cli_save();
292 GxICR_u8(irq) = GxICR_DETECT;
293 tmp = GxICR(irq);
294 arch_local_irq_restore(flags);
295}
296
297
298
299
300
301static void mn10300_ipi_nop(struct irq_data *d)
302{
303}
304
305
306
307
308
309
310
311
312
313
314static void send_IPI_mask(const cpumask_t *cpumask, int irq)
315{
316 int i;
317 u16 tmp;
318
319 for (i = 0; i < NR_CPUS; i++) {
320 if (cpumask_test_cpu(i, cpumask)) {
321
322 tmp = CROSS_GxICR(irq, i);
323 CROSS_GxICR(irq, i) =
324 tmp | GxICR_REQUEST | GxICR_DETECT;
325 tmp = CROSS_GxICR(irq, i);
326 }
327 }
328}
329
330
331
332
333
334
335
336void send_IPI_self(int irq)
337{
338 send_IPI_mask(cpumask_of(smp_processor_id()), irq);
339}
340
341
342
343
344
345
346
347
348
349void send_IPI_allbutself(int irq)
350{
351 cpumask_t cpumask;
352
353 cpumask_copy(&cpumask, cpu_online_mask);
354 cpumask_clear_cpu(smp_processor_id(), &cpumask);
355 send_IPI_mask(&cpumask, irq);
356}
357
358void arch_send_call_function_ipi_mask(const struct cpumask *mask)
359{
360 BUG();
361
362}
363
364void arch_send_call_function_single_ipi(int cpu)
365{
366 send_IPI_mask(cpumask_of(cpu), CALL_FUNC_SINGLE_IPI);
367}
368
369
370
371
372
373void smp_send_reschedule(int cpu)
374{
375 send_IPI_mask(cpumask_of(cpu), RESCHEDULE_IPI);
376}
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391int smp_nmi_call_function(smp_call_func_t func, void *info, int wait)
392{
393 struct nmi_call_data_struct data;
394 unsigned long flags;
395 unsigned int cnt;
396 int cpus, ret = 0;
397
398 cpus = num_online_cpus() - 1;
399 if (cpus < 1)
400 return 0;
401
402 data.func = func;
403 data.info = info;
404 cpumask_copy(&data.started, cpu_online_mask);
405 cpumask_clear_cpu(smp_processor_id(), &data.started);
406 data.wait = wait;
407 if (wait)
408 data.finished = data.started;
409
410 spin_lock_irqsave(&smp_nmi_call_lock, flags);
411 nmi_call_data = &data;
412 smp_mb();
413
414
415 send_IPI_allbutself(CALL_FUNCTION_NMI_IPI);
416
417
418 if (CALL_FUNCTION_NMI_IPI_TIMEOUT > 0) {
419 for (cnt = 0;
420 cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
421 !cpumask_empty(&data.started);
422 cnt++)
423 mdelay(1);
424
425 if (wait && cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT) {
426 for (cnt = 0;
427 cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
428 !cpumask_empty(&data.finished);
429 cnt++)
430 mdelay(1);
431 }
432
433 if (cnt >= CALL_FUNCTION_NMI_IPI_TIMEOUT)
434 ret = -ETIMEDOUT;
435
436 } else {
437
438
439 while (!cpumask_empty(&data.started))
440 barrier();
441 if (wait)
442 while (!cpumask_empty(&data.finished))
443 barrier();
444 }
445
446 spin_unlock_irqrestore(&smp_nmi_call_lock, flags);
447 return ret;
448}
449
450
451
452
453
454
455
456
457
458
459void smp_jump_to_debugger(void)
460{
461 if (num_online_cpus() > 1)
462
463 send_IPI_allbutself(DEBUGGER_NMI_IPI);
464}
465
466
467
468
469
470void stop_this_cpu(void *unused)
471{
472 static volatile int stopflag;
473 unsigned long flags;
474
475#ifdef CONFIG_GDBSTUB
476
477
478
479 atomic_set(&procindebug[smp_processor_id()], 0);
480#endif
481
482 flags = arch_local_cli_save();
483 set_cpu_online(smp_processor_id(), false);
484
485 while (!stopflag)
486 cpu_relax();
487
488 set_cpu_online(smp_processor_id(), true);
489 arch_local_irq_restore(flags);
490}
491
492
493
494
495void smp_send_stop(void)
496{
497 smp_nmi_call_function(stop_this_cpu, NULL, 0);
498}
499
500
501
502
503
504
505
506
507static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id)
508{
509 scheduler_ipi();
510 return IRQ_HANDLED;
511}
512
513
514
515
516
517
518
519
520static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id)
521{
522
523 generic_smp_call_function_single_interrupt();
524 return IRQ_HANDLED;
525}
526
527
528
529
530void smp_nmi_call_function_interrupt(void)
531{
532 smp_call_func_t func = nmi_call_data->func;
533 void *info = nmi_call_data->info;
534 int wait = nmi_call_data->wait;
535
536
537
538
539 smp_mb();
540 cpumask_clear_cpu(smp_processor_id(), &nmi_call_data->started);
541 (*func)(info);
542
543 if (wait) {
544 smp_mb();
545 cpumask_clear_cpu(smp_processor_id(),
546 &nmi_call_data->finished);
547 }
548}
549
550#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
551 defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
552
553
554
555
556
557
558
559static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id)
560{
561 return local_timer_interrupt();
562}
563#endif
564
565void __init smp_init_cpus(void)
566{
567 int i;
568 for (i = 0; i < NR_CPUS; i++) {
569 set_cpu_possible(i, true);
570 set_cpu_present(i, true);
571 }
572}
573
574
575
576
577
578
579
580static void __init smp_cpu_init(void)
581{
582 unsigned long flags;
583 int cpu_id = smp_processor_id();
584 u16 tmp16;
585
586 if (test_and_set_bit(cpu_id, &cpu_initialized)) {
587 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
588 for (;;)
589 local_irq_enable();
590 }
591 printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);
592
593 mmgrab(&init_mm);
594 current->active_mm = &init_mm;
595 BUG_ON(current->mm);
596
597 enter_lazy_tlb(&init_mm, current);
598
599
600 clear_using_fpu(current);
601
602 GxICR(CALL_FUNC_SINGLE_IPI) = CALL_FUNCTION_GxICR_LV | GxICR_DETECT;
603 mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
604
605 GxICR(LOCAL_TIMER_IPI) = LOCAL_TIMER_GxICR_LV | GxICR_DETECT;
606 mn10300_ipi_enable(LOCAL_TIMER_IPI);
607
608 GxICR(RESCHEDULE_IPI) = RESCHEDULE_GxICR_LV | GxICR_DETECT;
609 mn10300_ipi_enable(RESCHEDULE_IPI);
610
611#ifdef CONFIG_MN10300_CACHE_ENABLED
612 GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
613 mn10300_ipi_enable(FLUSH_CACHE_IPI);
614#endif
615
616 mn10300_ipi_shutdown(SMP_BOOT_IRQ);
617
618
619 flags = arch_local_cli_save();
620 GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
621 tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
622 arch_local_irq_restore(flags);
623}
624
625
626
627
628
629
630void smp_prepare_cpu_init(void)
631{
632 int loop;
633
634
635 IVAR0 = EXCEP_IRQ_LEVEL0;
636 IVAR1 = EXCEP_IRQ_LEVEL1;
637 IVAR2 = EXCEP_IRQ_LEVEL2;
638 IVAR3 = EXCEP_IRQ_LEVEL3;
639 IVAR4 = EXCEP_IRQ_LEVEL4;
640 IVAR5 = EXCEP_IRQ_LEVEL5;
641 IVAR6 = EXCEP_IRQ_LEVEL6;
642
643
644 for (loop = 0; loop < GxICR_NUM_IRQS; loop++)
645 GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
646
647#ifdef CONFIG_KERNEL_DEBUGGER
648
649 do {
650 unsigned long flags;
651 u16 tmp16;
652
653 flags = arch_local_cli_save();
654 GxICR(DEBUGGER_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
655 tmp16 = GxICR(DEBUGGER_NMI_IPI);
656 arch_local_irq_restore(flags);
657 } while (0);
658#endif
659}
660
661
662
663
664
665int __init start_secondary(void *unused)
666{
667 smp_cpu_init();
668 smp_callin();
669 while (!cpumask_test_cpu(smp_processor_id(), &smp_commenced_mask))
670 cpu_relax();
671
672 local_flush_tlb();
673 preempt_disable();
674 smp_online();
675
676#ifdef CONFIG_GENERIC_CLOCKEVENTS
677 init_clockevents();
678#endif
679 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
680 return 0;
681}
682
683
684
685
686
687
688
689void __init smp_prepare_cpus(unsigned int max_cpus)
690{
691 int phy_id;
692
693
694 smp_store_cpu_info(0);
695 smp_tune_scheduling();
696
697 init_ipi();
698
699
700 if (max_cpus == 0) {
701 printk(KERN_INFO "SMP mode deactivated.\n");
702 goto smp_done;
703 }
704
705
706 for (phy_id = 0; phy_id < NR_CPUS; phy_id++) {
707
708 if (max_cpus <= cpucount + 1)
709 continue;
710 if (phy_id != 0)
711 do_boot_cpu(phy_id);
712 set_cpu_possible(phy_id, true);
713 smp_show_cpu_info(phy_id);
714 }
715
716smp_done:
717 Dprintk("Boot done.\n");
718}
719
720
721
722
723
724
725
726static void __init smp_store_cpu_info(int cpu)
727{
728 struct mn10300_cpuinfo *ci = &cpu_data[cpu];
729
730 *ci = boot_cpu_data;
731 ci->loops_per_jiffy = loops_per_jiffy;
732 ci->type = CPUREV;
733}
734
735
736
737
738
739
740static void __init smp_tune_scheduling(void)
741{
742}
743
744
745
746
747
748
749
750
751static int __init do_boot_cpu(int phy_id)
752{
753 struct task_struct *idle;
754 unsigned long send_status, callin_status;
755 int timeout, cpu_id;
756
757 send_status = GxICR_REQUEST;
758 callin_status = 0;
759 timeout = 0;
760 cpu_id = phy_id;
761
762 cpucount++;
763
764
765 idle = fork_idle(cpu_id);
766 if (IS_ERR(idle))
767 panic("Failed fork for CPU#%d.", cpu_id);
768
769 idle->thread.pc = (unsigned long)start_secondary;
770
771 printk(KERN_NOTICE "Booting CPU#%d\n", cpu_id);
772 start_stack[cpu_id - 1] = idle->thread.sp;
773
774 task_thread_info(idle)->cpu = cpu_id;
775
776
777 send_IPI_mask(cpumask_of(phy_id), SMP_BOOT_IRQ);
778
779 Dprintk("Waiting for send to finish...\n");
780
781
782 do {
783 udelay(1000);
784 send_status =
785 CROSS_GxICR(SMP_BOOT_IRQ, phy_id) & GxICR_REQUEST;
786 } while (send_status == GxICR_REQUEST && timeout++ < 100);
787
788 Dprintk("Waiting for cpu_callin_map.\n");
789
790 if (send_status == 0) {
791
792 cpumask_set_cpu(cpu_id, &cpu_callout_map);
793
794
795 timeout = 0;
796 do {
797 udelay(1000);
798 callin_status = cpumask_test_cpu(cpu_id,
799 &cpu_callin_map);
800 } while (callin_status == 0 && timeout++ < 5000);
801
802 if (callin_status == 0)
803 Dprintk("Not responding.\n");
804 } else {
805 printk(KERN_WARNING "IPI not delivered.\n");
806 }
807
808 if (send_status == GxICR_REQUEST || callin_status == 0) {
809 cpumask_clear_cpu(cpu_id, &cpu_callout_map);
810 cpumask_clear_cpu(cpu_id, &cpu_callin_map);
811 cpumask_clear_cpu(cpu_id, &cpu_initialized);
812 cpucount--;
813 return 1;
814 }
815 return 0;
816}
817
818
819
820
821
822static void __init smp_show_cpu_info(int cpu)
823{
824 struct mn10300_cpuinfo *ci = &cpu_data[cpu];
825
826 printk(KERN_INFO
827 "CPU#%d : ioclk speed: %lu.%02luMHz : bogomips : %lu.%02lu\n",
828 cpu,
829 MN10300_IOCLK / 1000000,
830 (MN10300_IOCLK / 10000) % 100,
831 ci->loops_per_jiffy / (500000 / HZ),
832 (ci->loops_per_jiffy / (5000 / HZ)) % 100);
833}
834
835
836
837
838static void __init smp_callin(void)
839{
840 unsigned long timeout;
841 int cpu;
842
843 cpu = smp_processor_id();
844 timeout = jiffies + (2 * HZ);
845
846 if (cpumask_test_cpu(cpu, &cpu_callin_map)) {
847 printk(KERN_ERR "CPU#%d already present.\n", cpu);
848 BUG();
849 }
850 Dprintk("CPU#%d waiting for CALLOUT\n", cpu);
851
852
853 while (time_before(jiffies, timeout)) {
854 if (cpumask_test_cpu(cpu, &cpu_callout_map))
855 break;
856 cpu_relax();
857 }
858
859 if (!time_before(jiffies, timeout)) {
860 printk(KERN_ERR
861 "BUG: CPU#%d started up but did not get a callout!\n",
862 cpu);
863 BUG();
864 }
865
866#ifdef CONFIG_CALIBRATE_DELAY
867 calibrate_delay();
868#endif
869
870
871 smp_store_cpu_info(cpu);
872
873
874 cpumask_set_cpu(cpu, &cpu_callin_map);
875}
876
877
878
879
880static void __init smp_online(void)
881{
882 int cpu;
883
884 cpu = smp_processor_id();
885
886 notify_cpu_starting(cpu);
887
888 set_cpu_online(cpu, true);
889
890 local_irq_enable();
891}
892
893
894
895
896
897
898
899void __init smp_cpus_done(unsigned int max_cpus)
900{
901}
902
903
904
905
906
907
908
909void smp_prepare_boot_cpu(void)
910{
911 cpumask_set_cpu(0, &cpu_callout_map);
912 cpumask_set_cpu(0, &cpu_callin_map);
913 current_thread_info()->cpu = 0;
914}
915
916
917
918
919
920
921void initialize_secondary(void)
922{
923 asm volatile (
924 "mov %0,sp \n"
925 "jmp (%1) \n"
926 :
927 : "a"(current->thread.sp), "a"(current->thread.pc));
928}
929
930
931
932
933
934int __cpu_up(unsigned int cpu, struct task_struct *tidle)
935{
936 int timeout;
937
938#ifdef CONFIG_HOTPLUG_CPU
939 if (sleep_mode[cpu])
940 run_wakeup_cpu(cpu);
941#endif
942
943 cpumask_set_cpu(cpu, &smp_commenced_mask);
944
945
946 for (timeout = 0 ; timeout < 5000 ; timeout++) {
947 if (cpu_online(cpu))
948 break;
949 udelay(1000);
950 }
951
952 BUG_ON(!cpu_online(cpu));
953 return 0;
954}
955
956
957
958
959
960
961
962
963int setup_profiling_timer(unsigned int multiplier)
964{
965 return -EINVAL;
966}
967
968
969
970
971#ifdef CONFIG_HOTPLUG_CPU
972
973static DEFINE_PER_CPU(struct cpu, cpu_devices);
974
975static int __init topology_init(void)
976{
977 int cpu, ret;
978
979 for_each_cpu(cpu) {
980 ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL);
981 if (ret)
982 printk(KERN_WARNING
983 "topology_init: register_cpu %d failed (%d)\n",
984 cpu, ret);
985 }
986 return 0;
987}
988
989subsys_initcall(topology_init);
990
991int __cpu_disable(void)
992{
993 int cpu = smp_processor_id();
994 if (cpu == 0)
995 return -EBUSY;
996
997 migrate_irqs();
998 cpumask_clear_cpu(cpu, &mm_cpumask(current->active_mm));
999 return 0;
1000}
1001
1002void __cpu_die(unsigned int cpu)
1003{
1004 run_sleep_cpu(cpu);
1005}
1006
1007#ifdef CONFIG_MN10300_CACHE_ENABLED
1008static inline void hotplug_cpu_disable_cache(void)
1009{
1010 int tmp;
1011 asm volatile(
1012 " movhu (%1),%0 \n"
1013 " and %2,%0 \n"
1014 " movhu %0,(%1) \n"
1015 "1: movhu (%1),%0 \n"
1016 " btst %3,%0 \n"
1017 " bne 1b \n"
1018 : "=&r"(tmp)
1019 : "a"(&CHCTR),
1020 "i"(~(CHCTR_ICEN | CHCTR_DCEN)),
1021 "i"(CHCTR_ICBUSY | CHCTR_DCBUSY)
1022 : "memory", "cc");
1023}
1024
1025static inline void hotplug_cpu_enable_cache(void)
1026{
1027 int tmp;
1028 asm volatile(
1029 "movhu (%1),%0 \n"
1030 "or %2,%0 \n"
1031 "movhu %0,(%1) \n"
1032 : "=&r"(tmp)
1033 : "a"(&CHCTR),
1034 "i"(CHCTR_ICEN | CHCTR_DCEN)
1035 : "memory", "cc");
1036}
1037
1038static inline void hotplug_cpu_invalidate_cache(void)
1039{
1040 int tmp;
1041 asm volatile (
1042 "movhu (%1),%0 \n"
1043 "or %2,%0 \n"
1044 "movhu %0,(%1) \n"
1045 : "=&r"(tmp)
1046 : "a"(&CHCTR),
1047 "i"(CHCTR_ICINV | CHCTR_DCINV)
1048 : "cc");
1049}
1050
1051#else
1052#define hotplug_cpu_disable_cache() do {} while (0)
1053#define hotplug_cpu_enable_cache() do {} while (0)
1054#define hotplug_cpu_invalidate_cache() do {} while (0)
1055#endif
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068static int hotplug_cpu_nmi_call_function(cpumask_t cpumask,
1069 smp_call_func_t func, void *info,
1070 int wait)
1071{
1072
1073
1074
1075
1076 static struct nmi_call_data_struct nmi_call_func_mask_data
1077 __cacheline_aligned;
1078 unsigned long start, end;
1079
1080 start = (unsigned long)&nmi_call_func_mask_data;
1081 end = start + sizeof(struct nmi_call_data_struct);
1082
1083 nmi_call_func_mask_data.func = func;
1084 nmi_call_func_mask_data.info = info;
1085 nmi_call_func_mask_data.started = cpumask;
1086 nmi_call_func_mask_data.wait = wait;
1087 if (wait)
1088 nmi_call_func_mask_data.finished = cpumask;
1089
1090 spin_lock(&smp_nmi_call_lock);
1091 nmi_call_data = &nmi_call_func_mask_data;
1092 mn10300_local_dcache_flush_range(start, end);
1093 smp_wmb();
1094
1095 send_IPI_mask(cpumask, CALL_FUNCTION_NMI_IPI);
1096
1097 do {
1098 mn10300_local_dcache_inv_range(start, end);
1099 barrier();
1100 } while (!cpumask_empty(&nmi_call_func_mask_data.started));
1101
1102 if (wait) {
1103 do {
1104 mn10300_local_dcache_inv_range(start, end);
1105 barrier();
1106 } while (!cpumask_empty(&nmi_call_func_mask_data.finished));
1107 }
1108
1109 spin_unlock(&smp_nmi_call_lock);
1110 return 0;
1111}
1112
1113static void restart_wakeup_cpu(void)
1114{
1115 unsigned int cpu = smp_processor_id();
1116
1117 cpumask_set_cpu(cpu, &cpu_callin_map);
1118 local_flush_tlb();
1119 set_cpu_online(cpu, true);
1120 smp_wmb();
1121}
1122
1123static void prepare_sleep_cpu(void *unused)
1124{
1125 sleep_mode[smp_processor_id()] = 1;
1126 smp_mb();
1127 mn10300_local_dcache_flush_inv();
1128 hotplug_cpu_disable_cache();
1129 hotplug_cpu_invalidate_cache();
1130}
1131
1132
1133static void sleep_cpu(void *unused)
1134{
1135 unsigned int cpu_id = smp_processor_id();
1136
1137
1138
1139
1140 do {
1141 smp_mb();
1142 __sleep_cpu();
1143 } while (sleep_mode[cpu_id]);
1144 restart_wakeup_cpu();
1145}
1146
1147static void run_sleep_cpu(unsigned int cpu)
1148{
1149 unsigned long flags;
1150 cpumask_t cpumask;
1151
1152 cpumask_copy(&cpumask, &cpumask_of(cpu));
1153 flags = arch_local_cli_save();
1154 hotplug_cpu_nmi_call_function(cpumask, prepare_sleep_cpu, NULL, 1);
1155 hotplug_cpu_nmi_call_function(cpumask, sleep_cpu, NULL, 0);
1156 udelay(1);
1157 arch_local_irq_restore(flags);
1158}
1159
1160static void wakeup_cpu(void)
1161{
1162 hotplug_cpu_invalidate_cache();
1163 hotplug_cpu_enable_cache();
1164 smp_mb();
1165 sleep_mode[smp_processor_id()] = 0;
1166}
1167
1168static void run_wakeup_cpu(unsigned int cpu)
1169{
1170 unsigned long flags;
1171
1172 flags = arch_local_cli_save();
1173#if NR_CPUS == 2
1174 mn10300_local_dcache_flush_inv();
1175#else
1176
1177
1178
1179
1180#error not support NR_CPUS > 2, when CONFIG_HOTPLUG_CPU=y.
1181#endif
1182 hotplug_cpu_nmi_call_function(cpumask_of(cpu), wakeup_cpu, NULL, 1);
1183 arch_local_irq_restore(flags);
1184}
1185
1186#endif
1187