1
2
3
4
5
6#ifndef _S390_PTRACE_H
7#define _S390_PTRACE_H
8
9#include <linux/const.h>
10#include <uapi/asm/ptrace.h>
11
12#define PIF_SYSCALL 0
13#define PIF_PER_TRAP 1
14#define PIF_SYSCALL_RESTART 2
15
16#define _PIF_SYSCALL _BITUL(PIF_SYSCALL)
17#define _PIF_PER_TRAP _BITUL(PIF_PER_TRAP)
18#define _PIF_SYSCALL_RESTART _BITUL(PIF_SYSCALL_RESTART)
19
20#ifndef __ASSEMBLY__
21
22#define PSW_KERNEL_BITS (PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
23 PSW_MASK_EA | PSW_MASK_BA)
24#define PSW_USER_BITS (PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
25 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
26 PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
27
28struct psw_bits {
29 unsigned long : 1;
30 unsigned long per : 1;
31 unsigned long : 3;
32 unsigned long dat : 1;
33 unsigned long io : 1;
34 unsigned long ext : 1;
35 unsigned long key : 4;
36 unsigned long : 1;
37 unsigned long mcheck : 1;
38 unsigned long wait : 1;
39 unsigned long pstate : 1;
40 unsigned long as : 2;
41 unsigned long cc : 2;
42 unsigned long pm : 4;
43 unsigned long ri : 1;
44 unsigned long : 6;
45 unsigned long eaba : 2;
46 unsigned long : 31;
47 unsigned long ia : 64;
48};
49
50enum {
51 PSW_BITS_AMODE_24BIT = 0,
52 PSW_BITS_AMODE_31BIT = 1,
53 PSW_BITS_AMODE_64BIT = 3
54};
55
56enum {
57 PSW_BITS_AS_PRIMARY = 0,
58 PSW_BITS_AS_ACCREG = 1,
59 PSW_BITS_AS_SECONDARY = 2,
60 PSW_BITS_AS_HOME = 3
61};
62
63#define psw_bits(__psw) (*({ \
64 typecheck(psw_t, __psw); \
65 &(*(struct psw_bits *)(&(__psw))); \
66}))
67
68
69
70
71
72struct pt_regs
73{
74 unsigned long args[1];
75 psw_t psw;
76 unsigned long gprs[NUM_GPRS];
77 unsigned long orig_gpr2;
78 unsigned int int_code;
79 unsigned int int_parm;
80 unsigned long int_parm_long;
81 unsigned long flags;
82};
83
84
85
86
87struct per_regs {
88 unsigned long control;
89 unsigned long start;
90 unsigned long end;
91};
92
93
94
95
96struct per_event {
97 unsigned short cause;
98 unsigned long address;
99 unsigned char paid;
100};
101
102
103
104
105struct per_struct_kernel {
106 unsigned long cr9;
107 unsigned long cr10;
108 unsigned long cr11;
109 unsigned long bits;
110 unsigned long starting_addr;
111 unsigned long ending_addr;
112 unsigned short perc_atmid;
113 unsigned long address;
114 unsigned char access_id;
115};
116
117#define PER_EVENT_MASK 0xEB000000UL
118
119#define PER_EVENT_BRANCH 0x80000000UL
120#define PER_EVENT_IFETCH 0x40000000UL
121#define PER_EVENT_STORE 0x20000000UL
122#define PER_EVENT_STORE_REAL 0x08000000UL
123#define PER_EVENT_TRANSACTION_END 0x02000000UL
124#define PER_EVENT_NULLIFICATION 0x01000000UL
125
126#define PER_CONTROL_MASK 0x00e00000UL
127
128#define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
129#define PER_CONTROL_SUSPENSION 0x00400000UL
130#define PER_CONTROL_ALTERATION 0x00200000UL
131
132static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
133{
134 regs->flags |= (1UL << flag);
135}
136
137static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
138{
139 regs->flags &= ~(1UL << flag);
140}
141
142static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
143{
144 return !!(regs->flags & (1UL << flag));
145}
146
147
148
149
150#define arch_has_single_step() (1)
151#define arch_has_block_step() (1)
152
153#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
154#define instruction_pointer(regs) ((regs)->psw.addr)
155#define user_stack_pointer(regs)((regs)->gprs[15])
156#define profile_pc(regs) instruction_pointer(regs)
157
158static inline long regs_return_value(struct pt_regs *regs)
159{
160 return regs->gprs[2];
161}
162
163static inline void instruction_pointer_set(struct pt_regs *regs,
164 unsigned long val)
165{
166 regs->psw.addr = val;
167}
168
169int regs_query_register_offset(const char *name);
170const char *regs_query_register_name(unsigned int offset);
171unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
172unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
173
174static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
175{
176 return regs->gprs[15];
177}
178
179#endif
180#endif
181