LXR linux/arch/x86/include/asm/microcode.h

   1#ifndef _ASM_X86_MICROCODE_H
   2#define _ASM_X86_MICROCODE_H
   3
   4#include <asm/cpu.h>
   5#include <linux/earlycpio.h>
   6#include <linux/initrd.h>
   7
   8#define native_rdmsr(msr, val1, val2)                   \
   9do {                                                    \
  10        u64 __val = __rdmsr((msr));                     \
  11        (void)((val1) = (u32)__val);                    \
  12        (void)((val2) = (u32)(__val >> 32));            \
  13} while (0)
  14
  15#define native_wrmsr(msr, low, high)                    \
  16        __wrmsr(msr, low, high)
  17
  18#define native_wrmsrl(msr, val)                         \
  19        __wrmsr((msr), (u32)((u64)(val)),               \
  20                       (u32)((u64)(val) >> 32))
  21
  22struct ucode_patch {
  23        struct list_head plist;
  24        void *data;             /* Intel uses only this one */
  25        u32 patch_id;
  26        u16 equiv_cpu;
  27};
  28
  29extern struct list_head microcode_cache;
  30
  31struct cpu_signature {
  32        unsigned int sig;
  33        unsigned int pf;
  34        unsigned int rev;
  35};
  36
  37struct device;
  38
  39enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND };
  40
  41struct microcode_ops {
  42        enum ucode_state (*request_microcode_user) (int cpu,
  43                                const void __user *buf, size_t size);
  44
  45        enum ucode_state (*request_microcode_fw) (int cpu, struct device *,
  46                                                  bool refresh_fw);
  47
  48        void (*microcode_fini_cpu) (int cpu);
  49
  50        /*
  51         * The generic 'microcode_core' part guarantees that
  52         * the callbacks below run on a target cpu when they
  53         * are being called.
  54         * See also the "Synchronization" section in microcode_core.c.
  55         */
  56        int (*apply_microcode) (int cpu);
  57        int (*collect_cpu_info) (int cpu, struct cpu_signature *csig);
  58};
  59
  60struct ucode_cpu_info {
  61        struct cpu_signature    cpu_sig;
  62        int                     valid;
  63        void                    *mc;
  64};
  65extern struct ucode_cpu_info ucode_cpu_info[];
  66struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa);
  67
  68#ifdef CONFIG_MICROCODE_INTEL
  69extern struct microcode_ops * __init init_intel_microcode(void);
  70#else
  71static inline struct microcode_ops * __init init_intel_microcode(void)
  72{
  73        return NULL;
  74}
  75#endif /* CONFIG_MICROCODE_INTEL */
  76
  77#ifdef CONFIG_MICROCODE_AMD
  78extern struct microcode_ops * __init init_amd_microcode(void);
  79extern void __exit exit_amd_microcode(void);
  80#else
  81static inline struct microcode_ops * __init init_amd_microcode(void)
  82{
  83        return NULL;
  84}
  85static inline void __exit exit_amd_microcode(void) {}
  86#endif
  87
  88#define MAX_UCODE_COUNT 128
  89
  90#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
  91#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
  92#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
  93#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
  94#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
  95#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
  96#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
  97
  98#define CPUID_IS(a, b, c, ebx, ecx, edx)        \
  99                (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))
 100
 101/*
 102 * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
 103 * x86_cpuid_vendor() gets vendor id for BSP.
 104 *
 105 * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
 106 * coding, we still use x86_cpuid_vendor() to get vendor id for AP.
 107 *
 108 * x86_cpuid_vendor() gets vendor information directly from CPUID.
 109 */
 110static inline int x86_cpuid_vendor(void)
 111{
 112        u32 eax = 0x00000000;
 113        u32 ebx, ecx = 0, edx;
 114
 115        native_cpuid(&eax, &ebx, &ecx, &edx);
 116
 117        if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
 118                return X86_VENDOR_INTEL;
 119
 120        if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
 121                return X86_VENDOR_AMD;
 122
 123        return X86_VENDOR_UNKNOWN;
 124}
 125
 126static inline unsigned int x86_cpuid_family(void)
 127{
 128        u32 eax = 0x00000001;
 129        u32 ebx, ecx = 0, edx;
 130
 131        native_cpuid(&eax, &ebx, &ecx, &edx);
 132
 133        return x86_family(eax);
 134}
 135
 136#ifdef CONFIG_MICROCODE
 137int __init microcode_init(void);
 138extern void __init load_ucode_bsp(void);
 139extern void load_ucode_ap(void);
 140void reload_early_microcode(void);
 141extern bool get_builtin_firmware(struct cpio_data *cd, const char *name);
 142extern bool initrd_gone;
 143#else
 144static inline int __init microcode_init(void)                   { return 0; };
 145static inline void __init load_ucode_bsp(void)                  { }
 146static inline void load_ucode_ap(void)                          { }
 147static inline void reload_early_microcode(void)                 { }
 148static inline bool
 149get_builtin_firmware(struct cpio_data *cd, const char *name)    { return false; }
 150#endif
 151
 152#endif /* _ASM_X86_MICROCODE_H */
 153