LXR linux/arch/x86/include/asm/spinlock.h

   1#ifndef _ASM_X86_SPINLOCK_H
   2#define _ASM_X86_SPINLOCK_H
   3
   4#include <linux/jump_label.h>
   5#include <linux/atomic.h>
   6#include <asm/page.h>
   7#include <asm/processor.h>
   8#include <linux/compiler.h>
   9#include <asm/paravirt.h>
  10#include <asm/bitops.h>
  11
  12/*
  13 * Your basic SMP spinlocks, allowing only a single CPU anywhere
  14 *
  15 * Simple spin lock operations.  There are two variants, one clears IRQ's
  16 * on the local processor, one does not.
  17 *
  18 * These are fair FIFO ticket locks, which support up to 2^16 CPUs.
  19 *
  20 * (the type definitions are in asm/spinlock_types.h)
  21 */
  22
  23/* How long a lock should spin before we consider blocking */
  24#define SPIN_THRESHOLD  (1 << 15)
  25
  26#include <asm/qspinlock.h>
  27
  28/*
  29 * Read-write spinlocks, allowing multiple readers
  30 * but only one writer.
  31 *
  32 * NOTE! it is quite common to have readers in interrupts
  33 * but no interrupt writers. For those circumstances we
  34 * can "mix" irq-safe locks - any writer needs to get a
  35 * irq-safe write-lock, but readers can get non-irqsafe
  36 * read-locks.
  37 *
  38 * On x86, we implement read-write locks using the generic qrwlock with
  39 * x86 specific optimization.
  40 */
  41
  42#include <asm/qrwlock.h>
  43
  44#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
  45#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
  46
  47#define arch_spin_relax(lock)   cpu_relax()
  48#define arch_read_relax(lock)   cpu_relax()
  49#define arch_write_relax(lock)  cpu_relax()
  50
  51#endif /* _ASM_X86_SPINLOCK_H */
  52