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16#include <linux/ata.h>
17#include <linux/clk.h>
18#include <linux/libata.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21
22#define DRV_NAME "pata_imx"
23
24#define PATA_IMX_ATA_TIME_OFF 0x00
25#define PATA_IMX_ATA_TIME_ON 0x01
26#define PATA_IMX_ATA_TIME_1 0x02
27#define PATA_IMX_ATA_TIME_2W 0x03
28#define PATA_IMX_ATA_TIME_2R 0x04
29#define PATA_IMX_ATA_TIME_AX 0x05
30#define PATA_IMX_ATA_TIME_PIO_RDX 0x06
31#define PATA_IMX_ATA_TIME_4 0x07
32#define PATA_IMX_ATA_TIME_9 0x08
33
34#define PATA_IMX_ATA_CONTROL 0x24
35#define PATA_IMX_ATA_CTRL_FIFO_RST_B (1<<7)
36#define PATA_IMX_ATA_CTRL_ATA_RST_B (1<<6)
37#define PATA_IMX_ATA_CTRL_IORDY_EN (1<<0)
38#define PATA_IMX_ATA_INT_EN 0x2C
39#define PATA_IMX_ATA_INTR_ATA_INTRQ2 (1<<3)
40#define PATA_IMX_DRIVE_DATA 0xA0
41#define PATA_IMX_DRIVE_CONTROL 0xD8
42
43static u32 pio_t4[] = { 30, 20, 15, 10, 10 };
44static u32 pio_t9[] = { 20, 15, 10, 10, 10 };
45static u32 pio_tA[] = { 35, 35, 35, 35, 35 };
46
47struct pata_imx_priv {
48 struct clk *clk;
49
50 void __iomem *host_regs;
51 u32 ata_ctl;
52};
53
54static void pata_imx_set_timing(struct ata_device *adev,
55 struct pata_imx_priv *priv)
56{
57 struct ata_timing timing;
58 unsigned long clkrate;
59 u32 T, mode;
60
61 clkrate = clk_get_rate(priv->clk);
62
63 if (adev->pio_mode < XFER_PIO_0 || adev->pio_mode > XFER_PIO_4 ||
64 !clkrate)
65 return;
66
67 T = 1000000000 / clkrate;
68 ata_timing_compute(adev, adev->pio_mode, &timing, T * 1000, 0);
69
70 mode = adev->pio_mode - XFER_PIO_0;
71
72 writeb(3, priv->host_regs + PATA_IMX_ATA_TIME_OFF);
73 writeb(3, priv->host_regs + PATA_IMX_ATA_TIME_ON);
74 writeb(timing.setup, priv->host_regs + PATA_IMX_ATA_TIME_1);
75 writeb(timing.act8b, priv->host_regs + PATA_IMX_ATA_TIME_2W);
76 writeb(timing.act8b, priv->host_regs + PATA_IMX_ATA_TIME_2R);
77 writeb(1, priv->host_regs + PATA_IMX_ATA_TIME_PIO_RDX);
78
79 writeb(pio_t4[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_4);
80 writeb(pio_t9[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_9);
81 writeb(pio_tA[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_AX);
82}
83
84static void pata_imx_set_piomode(struct ata_port *ap, struct ata_device *adev)
85{
86 struct pata_imx_priv *priv = ap->host->private_data;
87 u32 val;
88
89 pata_imx_set_timing(adev, priv);
90
91 val = __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL);
92 if (ata_pio_need_iordy(adev))
93 val |= PATA_IMX_ATA_CTRL_IORDY_EN;
94 else
95 val &= ~PATA_IMX_ATA_CTRL_IORDY_EN;
96 __raw_writel(val, priv->host_regs + PATA_IMX_ATA_CONTROL);
97}
98
99static struct scsi_host_template pata_imx_sht = {
100 ATA_PIO_SHT(DRV_NAME),
101};
102
103static struct ata_port_operations pata_imx_port_ops = {
104 .inherits = &ata_sff_port_ops,
105 .sff_data_xfer = ata_sff_data_xfer_noirq,
106 .cable_detect = ata_cable_unknown,
107 .set_piomode = pata_imx_set_piomode,
108};
109
110static void pata_imx_setup_port(struct ata_ioports *ioaddr)
111{
112
113 ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << 2);
114 ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << 2);
115 ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << 2);
116 ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << 2);
117 ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << 2);
118 ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << 2);
119 ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << 2);
120 ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << 2);
121 ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << 2);
122 ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << 2);
123}
124
125static int pata_imx_probe(struct platform_device *pdev)
126{
127 struct ata_host *host;
128 struct ata_port *ap;
129 struct pata_imx_priv *priv;
130 int irq = 0;
131 struct resource *io_res;
132 int ret;
133
134 irq = platform_get_irq(pdev, 0);
135 if (irq < 0)
136 return irq;
137
138 priv = devm_kzalloc(&pdev->dev,
139 sizeof(struct pata_imx_priv), GFP_KERNEL);
140 if (!priv)
141 return -ENOMEM;
142
143 priv->clk = devm_clk_get(&pdev->dev, NULL);
144 if (IS_ERR(priv->clk)) {
145 dev_err(&pdev->dev, "Failed to get clock\n");
146 return PTR_ERR(priv->clk);
147 }
148
149 ret = clk_prepare_enable(priv->clk);
150 if (ret)
151 return ret;
152
153 host = ata_host_alloc(&pdev->dev, 1);
154 if (!host) {
155 ret = -ENOMEM;
156 goto err;
157 }
158
159 host->private_data = priv;
160 ap = host->ports[0];
161
162 ap->ops = &pata_imx_port_ops;
163 ap->pio_mask = ATA_PIO4;
164 ap->flags |= ATA_FLAG_SLAVE_POSS;
165
166 io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
167 priv->host_regs = devm_ioremap_resource(&pdev->dev, io_res);
168 if (IS_ERR(priv->host_regs)) {
169 ret = PTR_ERR(priv->host_regs);
170 goto err;
171 }
172
173 ap->ioaddr.cmd_addr = priv->host_regs + PATA_IMX_DRIVE_DATA;
174 ap->ioaddr.ctl_addr = priv->host_regs + PATA_IMX_DRIVE_CONTROL;
175
176 ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
177
178 pata_imx_setup_port(&ap->ioaddr);
179
180 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
181 (unsigned long long)io_res->start + PATA_IMX_DRIVE_DATA,
182 (unsigned long long)io_res->start + PATA_IMX_DRIVE_CONTROL);
183
184
185 __raw_writel(PATA_IMX_ATA_CTRL_FIFO_RST_B |
186 PATA_IMX_ATA_CTRL_ATA_RST_B,
187 priv->host_regs + PATA_IMX_ATA_CONTROL);
188
189 __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2,
190 priv->host_regs + PATA_IMX_ATA_INT_EN);
191
192
193 ret = ata_host_activate(host, irq, ata_sff_interrupt, 0,
194 &pata_imx_sht);
195
196 if (ret)
197 goto err;
198
199 return 0;
200err:
201 clk_disable_unprepare(priv->clk);
202
203 return ret;
204}
205
206static int pata_imx_remove(struct platform_device *pdev)
207{
208 struct ata_host *host = platform_get_drvdata(pdev);
209 struct pata_imx_priv *priv = host->private_data;
210
211 ata_host_detach(host);
212
213 __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN);
214
215 clk_disable_unprepare(priv->clk);
216
217 return 0;
218}
219
220#ifdef CONFIG_PM_SLEEP
221static int pata_imx_suspend(struct device *dev)
222{
223 struct ata_host *host = dev_get_drvdata(dev);
224 struct pata_imx_priv *priv = host->private_data;
225 int ret;
226
227 ret = ata_host_suspend(host, PMSG_SUSPEND);
228 if (!ret) {
229 __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN);
230 priv->ata_ctl =
231 __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL);
232 clk_disable_unprepare(priv->clk);
233 }
234
235 return ret;
236}
237
238static int pata_imx_resume(struct device *dev)
239{
240 struct ata_host *host = dev_get_drvdata(dev);
241 struct pata_imx_priv *priv = host->private_data;
242
243 int ret = clk_prepare_enable(priv->clk);
244 if (ret)
245 return ret;
246
247 __raw_writel(priv->ata_ctl, priv->host_regs + PATA_IMX_ATA_CONTROL);
248
249 __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2,
250 priv->host_regs + PATA_IMX_ATA_INT_EN);
251
252 ata_host_resume(host);
253
254 return 0;
255}
256#endif
257
258static SIMPLE_DEV_PM_OPS(pata_imx_pm_ops, pata_imx_suspend, pata_imx_resume);
259
260static const struct of_device_id imx_pata_dt_ids[] = {
261 {
262 .compatible = "fsl,imx27-pata",
263 }, {
264
265 }
266};
267MODULE_DEVICE_TABLE(of, imx_pata_dt_ids);
268
269static struct platform_driver pata_imx_driver = {
270 .probe = pata_imx_probe,
271 .remove = pata_imx_remove,
272 .driver = {
273 .name = DRV_NAME,
274 .of_match_table = imx_pata_dt_ids,
275 .pm = &pata_imx_pm_ops,
276 },
277};
278
279module_platform_driver(pata_imx_driver);
280
281MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
282MODULE_DESCRIPTION("low-level driver for iMX PATA");
283MODULE_LICENSE("GPL");
284MODULE_ALIAS("platform:" DRV_NAME);
285
