1/* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24#ifndef __AMDGPU_GDS_H__ 25#define __AMDGPU_GDS_H__ 26 27/* Because TTM request that alloacted buffer should be PAGE_SIZE aligned, 28 * we should report GDS/GWS/OA size as PAGE_SIZE aligned 29 * */ 30#define AMDGPU_GDS_SHIFT 2 31#define AMDGPU_GWS_SHIFT PAGE_SHIFT 32#define AMDGPU_OA_SHIFT PAGE_SHIFT 33 34struct amdgpu_ring; 35struct amdgpu_bo; 36 37struct amdgpu_gds_asic_info { 38 uint32_t total_size; 39 uint32_t gfx_partition_size; 40 uint32_t cs_partition_size; 41}; 42 43struct amdgpu_gds { 44 struct amdgpu_gds_asic_info mem; 45 struct amdgpu_gds_asic_info gws; 46 struct amdgpu_gds_asic_info oa; 47 /* At present, GDS, GWS and OA resources for gfx (graphics) 48 * is always pre-allocated and available for graphics operation. 49 * Such resource is shared between all gfx clients. 50 * TODO: move this operation to user space 51 * */ 52 struct amdgpu_bo* gds_gfx_bo; 53 struct amdgpu_bo* gws_gfx_bo; 54 struct amdgpu_bo* oa_gfx_bo; 55}; 56 57struct amdgpu_gds_reg_offset { 58 uint32_t mem_base; 59 uint32_t mem_size; 60 uint32_t gws; 61 uint32_t oa; 62}; 63 64#endif /* __AMDGPU_GDS_H__ */ 65