1#if !defined(_AMDGPU_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
2#define _AMDGPU_TRACE_H_
3
4#include <linux/stringify.h>
5#include <linux/types.h>
6#include <linux/tracepoint.h>
7
8#include <drm/drmP.h>
9
10#undef TRACE_SYSTEM
11#define TRACE_SYSTEM amdgpu
12#define TRACE_INCLUDE_FILE amdgpu_trace
13
14#define AMDGPU_JOB_GET_TIMELINE_NAME(job) \
15 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished)
16
17TRACE_EVENT(amdgpu_mm_rreg,
18 TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
19 TP_ARGS(did, reg, value),
20 TP_STRUCT__entry(
21 __field(unsigned, did)
22 __field(uint32_t, reg)
23 __field(uint32_t, value)
24 ),
25 TP_fast_assign(
26 __entry->did = did;
27 __entry->reg = reg;
28 __entry->value = value;
29 ),
30 TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
31 (unsigned long)__entry->did,
32 (unsigned long)__entry->reg,
33 (unsigned long)__entry->value)
34);
35
36TRACE_EVENT(amdgpu_mm_wreg,
37 TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
38 TP_ARGS(did, reg, value),
39 TP_STRUCT__entry(
40 __field(unsigned, did)
41 __field(uint32_t, reg)
42 __field(uint32_t, value)
43 ),
44 TP_fast_assign(
45 __entry->did = did;
46 __entry->reg = reg;
47 __entry->value = value;
48 ),
49 TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
50 (unsigned long)__entry->did,
51 (unsigned long)__entry->reg,
52 (unsigned long)__entry->value)
53);
54
55TRACE_EVENT(amdgpu_iv,
56 TP_PROTO(struct amdgpu_iv_entry *iv),
57 TP_ARGS(iv),
58 TP_STRUCT__entry(
59 __field(unsigned, client_id)
60 __field(unsigned, src_id)
61 __field(unsigned, ring_id)
62 __field(unsigned, vm_id)
63 __field(unsigned, vm_id_src)
64 __field(uint64_t, timestamp)
65 __field(unsigned, timestamp_src)
66 __field(unsigned, pas_id)
67 __array(unsigned, src_data, 4)
68 ),
69 TP_fast_assign(
70 __entry->client_id = iv->client_id;
71 __entry->src_id = iv->src_id;
72 __entry->ring_id = iv->ring_id;
73 __entry->vm_id = iv->vm_id;
74 __entry->vm_id_src = iv->vm_id_src;
75 __entry->timestamp = iv->timestamp;
76 __entry->timestamp_src = iv->timestamp_src;
77 __entry->pas_id = iv->pas_id;
78 __entry->src_data[0] = iv->src_data[0];
79 __entry->src_data[1] = iv->src_data[1];
80 __entry->src_data[2] = iv->src_data[2];
81 __entry->src_data[3] = iv->src_data[3];
82 ),
83 TP_printk("client_id:%u src_id:%u ring:%u vm_id:%u timestamp: %llu pas_id:%u src_data: %08x %08x %08x %08x\n",
84 __entry->client_id, __entry->src_id,
85 __entry->ring_id, __entry->vm_id,
86 __entry->timestamp, __entry->pas_id,
87 __entry->src_data[0], __entry->src_data[1],
88 __entry->src_data[2], __entry->src_data[3])
89);
90
91
92TRACE_EVENT(amdgpu_bo_create,
93 TP_PROTO(struct amdgpu_bo *bo),
94 TP_ARGS(bo),
95 TP_STRUCT__entry(
96 __field(struct amdgpu_bo *, bo)
97 __field(u32, pages)
98 __field(u32, type)
99 __field(u32, prefer)
100 __field(u32, allow)
101 __field(u32, visible)
102 ),
103
104 TP_fast_assign(
105 __entry->bo = bo;
106 __entry->pages = bo->tbo.num_pages;
107 __entry->type = bo->tbo.mem.mem_type;
108 __entry->prefer = bo->prefered_domains;
109 __entry->allow = bo->allowed_domains;
110 __entry->visible = bo->flags;
111 ),
112
113 TP_printk("bo=%p, pages=%u, type=%d, prefered=%d, allowed=%d, visible=%d",
114 __entry->bo, __entry->pages, __entry->type,
115 __entry->prefer, __entry->allow, __entry->visible)
116);
117
118TRACE_EVENT(amdgpu_cs,
119 TP_PROTO(struct amdgpu_cs_parser *p, int i),
120 TP_ARGS(p, i),
121 TP_STRUCT__entry(
122 __field(struct amdgpu_bo_list *, bo_list)
123 __field(u32, ring)
124 __field(u32, dw)
125 __field(u32, fences)
126 ),
127
128 TP_fast_assign(
129 __entry->bo_list = p->bo_list;
130 __entry->ring = p->job->ring->idx;
131 __entry->dw = p->job->ibs[i].length_dw;
132 __entry->fences = amdgpu_fence_count_emitted(
133 p->job->ring);
134 ),
135 TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u",
136 __entry->bo_list, __entry->ring, __entry->dw,
137 __entry->fences)
138);
139
140TRACE_EVENT(amdgpu_cs_ioctl,
141 TP_PROTO(struct amdgpu_job *job),
142 TP_ARGS(job),
143 TP_STRUCT__entry(
144 __field(uint64_t, sched_job_id)
145 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
146 __field(unsigned int, context)
147 __field(unsigned int, seqno)
148 __field(struct dma_fence *, fence)
149 __field(char *, ring_name)
150 __field(u32, num_ibs)
151 ),
152
153 TP_fast_assign(
154 __entry->sched_job_id = job->base.id;
155 __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
156 __entry->context = job->base.s_fence->finished.context;
157 __entry->seqno = job->base.s_fence->finished.seqno;
158 __entry->ring_name = job->ring->name;
159 __entry->num_ibs = job->num_ibs;
160 ),
161 TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
162 __entry->sched_job_id, __get_str(timeline), __entry->context,
163 __entry->seqno, __entry->ring_name, __entry->num_ibs)
164);
165
166TRACE_EVENT(amdgpu_sched_run_job,
167 TP_PROTO(struct amdgpu_job *job),
168 TP_ARGS(job),
169 TP_STRUCT__entry(
170 __field(uint64_t, sched_job_id)
171 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
172 __field(unsigned int, context)
173 __field(unsigned int, seqno)
174 __field(char *, ring_name)
175 __field(u32, num_ibs)
176 ),
177
178 TP_fast_assign(
179 __entry->sched_job_id = job->base.id;
180 __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
181 __entry->context = job->base.s_fence->finished.context;
182 __entry->seqno = job->base.s_fence->finished.seqno;
183 __entry->ring_name = job->ring->name;
184 __entry->num_ibs = job->num_ibs;
185 ),
186 TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
187 __entry->sched_job_id, __get_str(timeline), __entry->context,
188 __entry->seqno, __entry->ring_name, __entry->num_ibs)
189);
190
191
192TRACE_EVENT(amdgpu_vm_grab_id,
193 TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
194 struct amdgpu_job *job),
195 TP_ARGS(vm, ring, job),
196 TP_STRUCT__entry(
197 __field(struct amdgpu_vm *, vm)
198 __field(u32, ring)
199 __field(u32, vm_id)
200 __field(u32, vm_hub)
201 __field(u64, pd_addr)
202 __field(u32, needs_flush)
203 ),
204
205 TP_fast_assign(
206 __entry->vm = vm;
207 __entry->ring = ring->idx;
208 __entry->vm_id = job->vm_id;
209 __entry->vm_hub = ring->funcs->vmhub,
210 __entry->pd_addr = job->vm_pd_addr;
211 __entry->needs_flush = job->vm_needs_flush;
212 ),
213 TP_printk("vm=%p, ring=%u, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u",
214 __entry->vm, __entry->ring, __entry->vm_id,
215 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush)
216);
217
218TRACE_EVENT(amdgpu_vm_bo_map,
219 TP_PROTO(struct amdgpu_bo_va *bo_va,
220 struct amdgpu_bo_va_mapping *mapping),
221 TP_ARGS(bo_va, mapping),
222 TP_STRUCT__entry(
223 __field(struct amdgpu_bo *, bo)
224 __field(long, start)
225 __field(long, last)
226 __field(u64, offset)
227 __field(u32, flags)
228 ),
229
230 TP_fast_assign(
231 __entry->bo = bo_va ? bo_va->bo : NULL;
232 __entry->start = mapping->start;
233 __entry->last = mapping->last;
234 __entry->offset = mapping->offset;
235 __entry->flags = mapping->flags;
236 ),
237 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x",
238 __entry->bo, __entry->start, __entry->last,
239 __entry->offset, __entry->flags)
240);
241
242TRACE_EVENT(amdgpu_vm_bo_unmap,
243 TP_PROTO(struct amdgpu_bo_va *bo_va,
244 struct amdgpu_bo_va_mapping *mapping),
245 TP_ARGS(bo_va, mapping),
246 TP_STRUCT__entry(
247 __field(struct amdgpu_bo *, bo)
248 __field(long, start)
249 __field(long, last)
250 __field(u64, offset)
251 __field(u32, flags)
252 ),
253
254 TP_fast_assign(
255 __entry->bo = bo_va->bo;
256 __entry->start = mapping->start;
257 __entry->last = mapping->last;
258 __entry->offset = mapping->offset;
259 __entry->flags = mapping->flags;
260 ),
261 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%08x",
262 __entry->bo, __entry->start, __entry->last,
263 __entry->offset, __entry->flags)
264);
265
266DECLARE_EVENT_CLASS(amdgpu_vm_mapping,
267 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
268 TP_ARGS(mapping),
269 TP_STRUCT__entry(
270 __field(u64, soffset)
271 __field(u64, eoffset)
272 __field(u32, flags)
273 ),
274
275 TP_fast_assign(
276 __entry->soffset = mapping->start;
277 __entry->eoffset = mapping->last + 1;
278 __entry->flags = mapping->flags;
279 ),
280 TP_printk("soffs=%010llx, eoffs=%010llx, flags=%08x",
281 __entry->soffset, __entry->eoffset, __entry->flags)
282);
283
284DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update,
285 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
286 TP_ARGS(mapping)
287);
288
289DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping,
290 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
291 TP_ARGS(mapping)
292);
293
294TRACE_EVENT(amdgpu_vm_set_ptes,
295 TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
296 uint32_t incr, uint32_t flags),
297 TP_ARGS(pe, addr, count, incr, flags),
298 TP_STRUCT__entry(
299 __field(u64, pe)
300 __field(u64, addr)
301 __field(u32, count)
302 __field(u32, incr)
303 __field(u32, flags)
304 ),
305
306 TP_fast_assign(
307 __entry->pe = pe;
308 __entry->addr = addr;
309 __entry->count = count;
310 __entry->incr = incr;
311 __entry->flags = flags;
312 ),
313 TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%08x, count=%u",
314 __entry->pe, __entry->addr, __entry->incr,
315 __entry->flags, __entry->count)
316);
317
318TRACE_EVENT(amdgpu_vm_copy_ptes,
319 TP_PROTO(uint64_t pe, uint64_t src, unsigned count),
320 TP_ARGS(pe, src, count),
321 TP_STRUCT__entry(
322 __field(u64, pe)
323 __field(u64, src)
324 __field(u32, count)
325 ),
326
327 TP_fast_assign(
328 __entry->pe = pe;
329 __entry->src = src;
330 __entry->count = count;
331 ),
332 TP_printk("pe=%010Lx, src=%010Lx, count=%u",
333 __entry->pe, __entry->src, __entry->count)
334);
335
336TRACE_EVENT(amdgpu_vm_flush,
337 TP_PROTO(struct amdgpu_ring *ring, unsigned vm_id,
338 uint64_t pd_addr),
339 TP_ARGS(ring, vm_id, pd_addr),
340 TP_STRUCT__entry(
341 __field(u32, ring)
342 __field(u32, vm_id)
343 __field(u32, vm_hub)
344 __field(u64, pd_addr)
345 ),
346
347 TP_fast_assign(
348 __entry->ring = ring->idx;
349 __entry->vm_id = vm_id;
350 __entry->vm_hub = ring->funcs->vmhub;
351 __entry->pd_addr = pd_addr;
352 ),
353 TP_printk("ring=%u, id=%u, hub=%u, pd_addr=%010Lx",
354 __entry->ring, __entry->vm_id,
355 __entry->vm_hub,__entry->pd_addr)
356);
357
358TRACE_EVENT(amdgpu_bo_list_set,
359 TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo),
360 TP_ARGS(list, bo),
361 TP_STRUCT__entry(
362 __field(struct amdgpu_bo_list *, list)
363 __field(struct amdgpu_bo *, bo)
364 __field(u64, bo_size)
365 ),
366
367 TP_fast_assign(
368 __entry->list = list;
369 __entry->bo = bo;
370 __entry->bo_size = amdgpu_bo_size(bo);
371 ),
372 TP_printk("list=%p, bo=%p, bo_size=%Ld",
373 __entry->list,
374 __entry->bo,
375 __entry->bo_size)
376);
377
378TRACE_EVENT(amdgpu_cs_bo_status,
379 TP_PROTO(uint64_t total_bo, uint64_t total_size),
380 TP_ARGS(total_bo, total_size),
381 TP_STRUCT__entry(
382 __field(u64, total_bo)
383 __field(u64, total_size)
384 ),
385
386 TP_fast_assign(
387 __entry->total_bo = total_bo;
388 __entry->total_size = total_size;
389 ),
390 TP_printk("total_bo_size=%Ld, total_bo_count=%Ld",
391 __entry->total_bo, __entry->total_size)
392);
393
394TRACE_EVENT(amdgpu_ttm_bo_move,
395 TP_PROTO(struct amdgpu_bo* bo, uint32_t new_placement, uint32_t old_placement),
396 TP_ARGS(bo, new_placement, old_placement),
397 TP_STRUCT__entry(
398 __field(struct amdgpu_bo *, bo)
399 __field(u64, bo_size)
400 __field(u32, new_placement)
401 __field(u32, old_placement)
402 ),
403
404 TP_fast_assign(
405 __entry->bo = bo;
406 __entry->bo_size = amdgpu_bo_size(bo);
407 __entry->new_placement = new_placement;
408 __entry->old_placement = old_placement;
409 ),
410 TP_printk("bo=%p, from=%d, to=%d, size=%Ld",
411 __entry->bo, __entry->old_placement,
412 __entry->new_placement, __entry->bo_size)
413);
414
415#undef AMDGPU_JOB_GET_TIMELINE_NAME
416#endif
417
418
419#undef TRACE_INCLUDE_PATH
420#define TRACE_INCLUDE_PATH .
421#include <trace/define_trace.h>
422
