LXR linux/drivers/gpu/drm/amd/amdkfd/kfd_device_queue

   1/*
   2 * Copyright 2014 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 */
  23
  24#ifndef KFD_DEVICE_QUEUE_MANAGER_H_
  25#define KFD_DEVICE_QUEUE_MANAGER_H_
  26
  27#include <linux/rwsem.h>
  28#include <linux/list.h>
  29#include "kfd_priv.h"
  30#include "kfd_mqd_manager.h"
  31
  32#define QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS        (500)
  33#define CIK_VMID_NUM                            (8)
  34#define KFD_VMID_START_OFFSET                   (8)
  35#define VMID_PER_DEVICE                         CIK_VMID_NUM
  36#define KFD_DQM_FIRST_PIPE                      (0)
  37#define CIK_SDMA_QUEUES                         (4)
  38#define CIK_SDMA_QUEUES_PER_ENGINE              (2)
  39#define CIK_SDMA_ENGINE_NUM                     (2)
  40
  41struct device_process_node {
  42        struct qcm_process_device *qpd;
  43        struct list_head list;
  44};
  45
  46/**
  47 * struct device_queue_manager_ops
  48 *
  49 * @create_queue: Queue creation routine.
  50 *
  51 * @destroy_queue: Queue destruction routine.
  52 *
  53 * @update_queue: Queue update routine.
  54 *
  55 * @get_mqd_manager: Returns the mqd manager according to the mqd type.
  56 *
  57 * @exeute_queues: Dispatches the queues list to the H/W.
  58 *
  59 * @register_process: This routine associates a specific process with device.
  60 *
  61 * @unregister_process: destroys the associations between process to device.
  62 *
  63 * @initialize: Initializes the pipelines and memory module for that device.
  64 *
  65 * @start: Initializes the resources/modules the the device needs for queues
  66 * execution. This function is called on device initialization and after the
  67 * system woke up after suspension.
  68 *
  69 * @stop: This routine stops execution of all the active queue running on the
  70 * H/W and basically this function called on system suspend.
  71 *
  72 * @uninitialize: Destroys all the device queue manager resources allocated in
  73 * initialize routine.
  74 *
  75 * @create_kernel_queue: Creates kernel queue. Used for debug queue.
  76 *
  77 * @destroy_kernel_queue: Destroys kernel queue. Used for debug queue.
  78 *
  79 * @set_cache_memory_policy: Sets memory policy (cached/ non cached) for the
  80 * memory apertures.
  81 *
  82 */
  83
  84struct device_queue_manager_ops {
  85        int     (*create_queue)(struct device_queue_manager *dqm,
  86                                struct queue *q,
  87                                struct qcm_process_device *qpd,
  88                                int *allocate_vmid);
  89
  90        int     (*destroy_queue)(struct device_queue_manager *dqm,
  91                                struct qcm_process_device *qpd,
  92                                struct queue *q);
  93
  94        int     (*update_queue)(struct device_queue_manager *dqm,
  95                                struct queue *q);
  96
  97        struct mqd_manager * (*get_mqd_manager)
  98                                        (struct device_queue_manager *dqm,
  99                                        enum KFD_MQD_TYPE type);
 100
 101        int     (*register_process)(struct device_queue_manager *dqm,
 102                                        struct qcm_process_device *qpd);
 103
 104        int     (*unregister_process)(struct device_queue_manager *dqm,
 105                                        struct qcm_process_device *qpd);
 106
 107        int     (*initialize)(struct device_queue_manager *dqm);
 108        int     (*start)(struct device_queue_manager *dqm);
 109        int     (*stop)(struct device_queue_manager *dqm);
 110        void    (*uninitialize)(struct device_queue_manager *dqm);
 111        int     (*create_kernel_queue)(struct device_queue_manager *dqm,
 112                                        struct kernel_queue *kq,
 113                                        struct qcm_process_device *qpd);
 114
 115        void    (*destroy_kernel_queue)(struct device_queue_manager *dqm,
 116                                        struct kernel_queue *kq,
 117                                        struct qcm_process_device *qpd);
 118
 119        bool    (*set_cache_memory_policy)(struct device_queue_manager *dqm,
 120                                           struct qcm_process_device *qpd,
 121                                           enum cache_policy default_policy,
 122                                           enum cache_policy alternate_policy,
 123                                           void __user *alternate_aperture_base,
 124                                           uint64_t alternate_aperture_size);
 125};
 126
 127struct device_queue_manager_asic_ops {
 128        int     (*register_process)(struct device_queue_manager *dqm,
 129                                        struct qcm_process_device *qpd);
 130        int     (*initialize)(struct device_queue_manager *dqm);
 131        bool    (*set_cache_memory_policy)(struct device_queue_manager *dqm,
 132                                           struct qcm_process_device *qpd,
 133                                           enum cache_policy default_policy,
 134                                           enum cache_policy alternate_policy,
 135                                           void __user *alternate_aperture_base,
 136                                           uint64_t alternate_aperture_size);
 137        void    (*init_sdma_vm)(struct device_queue_manager *dqm,
 138                                struct queue *q,
 139                                struct qcm_process_device *qpd);
 140};
 141
 142/**
 143 * struct device_queue_manager
 144 *
 145 * This struct is a base class for the kfd queues scheduler in the
 146 * device level. The device base class should expose the basic operations
 147 * for queue creation and queue destruction. This base class hides the
 148 * scheduling mode of the driver and the specific implementation of the
 149 * concrete device. This class is the only class in the queues scheduler
 150 * that configures the H/W.
 151 *
 152 */
 153
 154struct device_queue_manager {
 155        struct device_queue_manager_ops ops;
 156        struct device_queue_manager_asic_ops ops_asic_specific;
 157
 158        struct mqd_manager      *mqds[KFD_MQD_TYPE_MAX];
 159        struct packet_manager   packets;
 160        struct kfd_dev          *dev;
 161        struct mutex            lock;
 162        struct list_head        queues;
 163        unsigned int            processes_count;
 164        unsigned int            queue_count;
 165        unsigned int            sdma_queue_count;
 166        unsigned int            total_queue_count;
 167        unsigned int            next_pipe_to_allocate;
 168        unsigned int            *allocated_queues;
 169        unsigned int            sdma_bitmap;
 170        unsigned int            vmid_bitmap;
 171        uint64_t                pipelines_addr;
 172        struct kfd_mem_obj      *pipeline_mem;
 173        uint64_t                fence_gpu_addr;
 174        unsigned int            *fence_addr;
 175        struct kfd_mem_obj      *fence_mem;
 176        bool                    active_runlist;
 177};
 178
 179void device_queue_manager_init_cik(struct device_queue_manager_asic_ops *ops);
 180void device_queue_manager_init_vi(struct device_queue_manager_asic_ops *ops);
 181void program_sh_mem_settings(struct device_queue_manager *dqm,
 182                                        struct qcm_process_device *qpd);
 183unsigned int get_queues_num(struct device_queue_manager *dqm);
 184unsigned int get_queues_per_pipe(struct device_queue_manager *dqm);
 185unsigned int get_pipes_per_mec(struct device_queue_manager *dqm);
 186
 187static inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd)
 188{
 189        return (pdd->lds_base >> 16) & 0xFF;
 190}
 191
 192static inline unsigned int
 193get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd)
 194{
 195        return (pdd->lds_base >> 60) & 0x0E;
 196}
 197
 198#endif /* KFD_DEVICE_QUEUE_MANAGER_H_ */
 199