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13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/err.h>
16#include <linux/clk.h>
17#include <linux/io.h>
18#include <linux/interrupt.h>
19#include <linux/of.h>
20#include <linux/of_gpio.h>
21#include <linux/gpio.h>
22#include <linux/component.h>
23#include <linux/phy/phy.h>
24
25#include <drm/drmP.h>
26#include <drm/drm_atomic_helper.h>
27#include <drm/drm_crtc.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_panel.h>
30
31#include <drm/bridge/analogix_dp.h>
32
33#include "analogix_dp_core.h"
34#include "analogix_dp_reg.h"
35
36#define to_dp(nm) container_of(nm, struct analogix_dp_device, nm)
37
38struct bridge_init {
39 struct i2c_client *client;
40 struct device_node *node;
41};
42
43static void analogix_dp_init_dp(struct analogix_dp_device *dp)
44{
45 analogix_dp_reset(dp);
46
47 analogix_dp_swreset(dp);
48
49 analogix_dp_init_analog_param(dp);
50 analogix_dp_init_interrupt(dp);
51
52
53 analogix_dp_enable_sw_function(dp);
54
55 analogix_dp_config_interrupt(dp);
56 analogix_dp_init_analog_func(dp);
57
58 analogix_dp_init_hpd(dp);
59 analogix_dp_init_aux(dp);
60}
61
62static int analogix_dp_detect_hpd(struct analogix_dp_device *dp)
63{
64 int timeout_loop = 0;
65
66 while (timeout_loop < DP_TIMEOUT_LOOP_COUNT) {
67 if (analogix_dp_get_plug_in_status(dp) == 0)
68 return 0;
69
70 timeout_loop++;
71 usleep_range(10, 11);
72 }
73
74
75
76
77
78
79 if (!dp->force_hpd)
80 return -ETIMEDOUT;
81
82
83
84
85
86
87 dev_dbg(dp->dev, "failed to get hpd plug status, try to force hpd\n");
88
89 analogix_dp_force_hpd(dp);
90
91 if (analogix_dp_get_plug_in_status(dp) != 0) {
92 dev_err(dp->dev, "failed to get hpd plug in status\n");
93 return -EINVAL;
94 }
95
96 dev_dbg(dp->dev, "success to get plug in status after force hpd\n");
97
98 return 0;
99}
100
101int analogix_dp_psr_supported(struct device *dev)
102{
103 struct analogix_dp_device *dp = dev_get_drvdata(dev);
104
105 return dp->psr_support;
106}
107EXPORT_SYMBOL_GPL(analogix_dp_psr_supported);
108
109int analogix_dp_enable_psr(struct device *dev)
110{
111 struct analogix_dp_device *dp = dev_get_drvdata(dev);
112 struct edp_vsc_psr psr_vsc;
113
114 if (!dp->psr_support)
115 return 0;
116
117
118 memset(&psr_vsc, 0, sizeof(psr_vsc));
119 psr_vsc.sdp_header.HB0 = 0;
120 psr_vsc.sdp_header.HB1 = 0x7;
121 psr_vsc.sdp_header.HB2 = 0x2;
122 psr_vsc.sdp_header.HB3 = 0x8;
123
124 psr_vsc.DB0 = 0;
125 psr_vsc.DB1 = EDP_VSC_PSR_STATE_ACTIVE | EDP_VSC_PSR_CRC_VALUES_VALID;
126
127 analogix_dp_send_psr_spd(dp, &psr_vsc);
128 return 0;
129}
130EXPORT_SYMBOL_GPL(analogix_dp_enable_psr);
131
132int analogix_dp_disable_psr(struct device *dev)
133{
134 struct analogix_dp_device *dp = dev_get_drvdata(dev);
135 struct edp_vsc_psr psr_vsc;
136 int ret;
137
138 if (!dp->psr_support)
139 return 0;
140
141
142 memset(&psr_vsc, 0, sizeof(psr_vsc));
143 psr_vsc.sdp_header.HB0 = 0;
144 psr_vsc.sdp_header.HB1 = 0x7;
145 psr_vsc.sdp_header.HB2 = 0x2;
146 psr_vsc.sdp_header.HB3 = 0x8;
147
148 psr_vsc.DB0 = 0;
149 psr_vsc.DB1 = 0;
150
151 ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
152 if (ret != 1)
153 dev_err(dp->dev, "Failed to set DP Power0 %d\n", ret);
154
155 analogix_dp_send_psr_spd(dp, &psr_vsc);
156 return 0;
157}
158EXPORT_SYMBOL_GPL(analogix_dp_disable_psr);
159
160static bool analogix_dp_detect_sink_psr(struct analogix_dp_device *dp)
161{
162 unsigned char psr_version;
163
164 drm_dp_dpcd_readb(&dp->aux, DP_PSR_SUPPORT, &psr_version);
165 dev_dbg(dp->dev, "Panel PSR version : %x\n", psr_version);
166
167 return (psr_version & DP_PSR_IS_SUPPORTED) ? true : false;
168}
169
170static void analogix_dp_enable_sink_psr(struct analogix_dp_device *dp)
171{
172 unsigned char psr_en;
173
174
175 drm_dp_dpcd_readb(&dp->aux, DP_PSR_EN_CFG, &psr_en);
176 psr_en &= ~DP_PSR_ENABLE;
177 drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
178
179
180 psr_en = DP_PSR_MAIN_LINK_ACTIVE | DP_PSR_CRC_VERIFICATION;
181 drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
182
183
184 psr_en = DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE |
185 DP_PSR_CRC_VERIFICATION;
186 drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en);
187
188 analogix_dp_enable_psr_crc(dp);
189}
190
191static void
192analogix_dp_enable_rx_to_enhanced_mode(struct analogix_dp_device *dp,
193 bool enable)
194{
195 u8 data;
196
197 drm_dp_dpcd_readb(&dp->aux, DP_LANE_COUNT_SET, &data);
198
199 if (enable)
200 drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
201 DP_LANE_COUNT_ENHANCED_FRAME_EN |
202 DPCD_LANE_COUNT_SET(data));
203 else
204 drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET,
205 DPCD_LANE_COUNT_SET(data));
206}
207
208static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp)
209{
210 u8 data;
211 int retval;
212
213 drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data);
214 retval = DPCD_ENHANCED_FRAME_CAP(data);
215
216 return retval;
217}
218
219static void analogix_dp_set_enhanced_mode(struct analogix_dp_device *dp)
220{
221 u8 data;
222
223 data = analogix_dp_is_enhanced_mode_available(dp);
224 analogix_dp_enable_rx_to_enhanced_mode(dp, data);
225 analogix_dp_enable_enhanced_mode(dp, data);
226}
227
228static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
229{
230 analogix_dp_set_training_pattern(dp, DP_NONE);
231
232 drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
233 DP_TRAINING_PATTERN_DISABLE);
234}
235
236static void
237analogix_dp_set_lane_lane_pre_emphasis(struct analogix_dp_device *dp,
238 int pre_emphasis, int lane)
239{
240 switch (lane) {
241 case 0:
242 analogix_dp_set_lane0_pre_emphasis(dp, pre_emphasis);
243 break;
244 case 1:
245 analogix_dp_set_lane1_pre_emphasis(dp, pre_emphasis);
246 break;
247
248 case 2:
249 analogix_dp_set_lane2_pre_emphasis(dp, pre_emphasis);
250 break;
251
252 case 3:
253 analogix_dp_set_lane3_pre_emphasis(dp, pre_emphasis);
254 break;
255 }
256}
257
258static int analogix_dp_link_start(struct analogix_dp_device *dp)
259{
260 u8 buf[4];
261 int lane, lane_count, pll_tries, retval;
262
263 lane_count = dp->link_train.lane_count;
264
265 dp->link_train.lt_state = CLOCK_RECOVERY;
266 dp->link_train.eq_loop = 0;
267
268 for (lane = 0; lane < lane_count; lane++)
269 dp->link_train.cr_loop[lane] = 0;
270
271
272 analogix_dp_set_link_bandwidth(dp, dp->link_train.link_rate);
273 analogix_dp_set_lane_count(dp, dp->link_train.lane_count);
274
275
276 buf[0] = dp->link_train.link_rate;
277 buf[1] = dp->link_train.lane_count;
278 retval = drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, buf, 2);
279 if (retval < 0)
280 return retval;
281
282
283 for (lane = 0; lane < lane_count; lane++)
284 analogix_dp_set_lane_lane_pre_emphasis(dp,
285 PRE_EMPHASIS_LEVEL_0, lane);
286
287
288 pll_tries = 0;
289 while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
290 if (pll_tries == DP_TIMEOUT_LOOP_COUNT) {
291 dev_err(dp->dev, "Wait for PLL lock timed out\n");
292 return -ETIMEDOUT;
293 }
294
295 pll_tries++;
296 usleep_range(90, 120);
297 }
298
299
300 analogix_dp_set_training_pattern(dp, TRAINING_PTN1);
301
302
303 retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
304 DP_LINK_SCRAMBLING_DISABLE |
305 DP_TRAINING_PATTERN_1);
306 if (retval < 0)
307 return retval;
308
309 for (lane = 0; lane < lane_count; lane++)
310 buf[lane] = DP_TRAIN_PRE_EMPH_LEVEL_0 |
311 DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
312
313 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, buf,
314 lane_count);
315 if (retval < 0)
316 return retval;
317
318 return 0;
319}
320
321static unsigned char analogix_dp_get_lane_status(u8 link_status[2], int lane)
322{
323 int shift = (lane & 1) * 4;
324 u8 link_value = link_status[lane >> 1];
325
326 return (link_value >> shift) & 0xf;
327}
328
329static int analogix_dp_clock_recovery_ok(u8 link_status[2], int lane_count)
330{
331 int lane;
332 u8 lane_status;
333
334 for (lane = 0; lane < lane_count; lane++) {
335 lane_status = analogix_dp_get_lane_status(link_status, lane);
336 if ((lane_status & DP_LANE_CR_DONE) == 0)
337 return -EINVAL;
338 }
339 return 0;
340}
341
342static int analogix_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
343 int lane_count)
344{
345 int lane;
346 u8 lane_status;
347
348 if ((link_align & DP_INTERLANE_ALIGN_DONE) == 0)
349 return -EINVAL;
350
351 for (lane = 0; lane < lane_count; lane++) {
352 lane_status = analogix_dp_get_lane_status(link_status, lane);
353 lane_status &= DP_CHANNEL_EQ_BITS;
354 if (lane_status != DP_CHANNEL_EQ_BITS)
355 return -EINVAL;
356 }
357
358 return 0;
359}
360
361static unsigned char
362analogix_dp_get_adjust_request_voltage(u8 adjust_request[2], int lane)
363{
364 int shift = (lane & 1) * 4;
365 u8 link_value = adjust_request[lane >> 1];
366
367 return (link_value >> shift) & 0x3;
368}
369
370static unsigned char analogix_dp_get_adjust_request_pre_emphasis(
371 u8 adjust_request[2],
372 int lane)
373{
374 int shift = (lane & 1) * 4;
375 u8 link_value = adjust_request[lane >> 1];
376
377 return ((link_value >> shift) & 0xc) >> 2;
378}
379
380static void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp,
381 u8 training_lane_set, int lane)
382{
383 switch (lane) {
384 case 0:
385 analogix_dp_set_lane0_link_training(dp, training_lane_set);
386 break;
387 case 1:
388 analogix_dp_set_lane1_link_training(dp, training_lane_set);
389 break;
390
391 case 2:
392 analogix_dp_set_lane2_link_training(dp, training_lane_set);
393 break;
394
395 case 3:
396 analogix_dp_set_lane3_link_training(dp, training_lane_set);
397 break;
398 }
399}
400
401static unsigned int
402analogix_dp_get_lane_link_training(struct analogix_dp_device *dp,
403 int lane)
404{
405 u32 reg;
406
407 switch (lane) {
408 case 0:
409 reg = analogix_dp_get_lane0_link_training(dp);
410 break;
411 case 1:
412 reg = analogix_dp_get_lane1_link_training(dp);
413 break;
414 case 2:
415 reg = analogix_dp_get_lane2_link_training(dp);
416 break;
417 case 3:
418 reg = analogix_dp_get_lane3_link_training(dp);
419 break;
420 default:
421 WARN_ON(1);
422 return 0;
423 }
424
425 return reg;
426}
427
428static void analogix_dp_reduce_link_rate(struct analogix_dp_device *dp)
429{
430 analogix_dp_training_pattern_dis(dp);
431 analogix_dp_set_enhanced_mode(dp);
432
433 dp->link_train.lt_state = FAILED;
434}
435
436static void analogix_dp_get_adjust_training_lane(struct analogix_dp_device *dp,
437 u8 adjust_request[2])
438{
439 int lane, lane_count;
440 u8 voltage_swing, pre_emphasis, training_lane;
441
442 lane_count = dp->link_train.lane_count;
443 for (lane = 0; lane < lane_count; lane++) {
444 voltage_swing = analogix_dp_get_adjust_request_voltage(
445 adjust_request, lane);
446 pre_emphasis = analogix_dp_get_adjust_request_pre_emphasis(
447 adjust_request, lane);
448 training_lane = DPCD_VOLTAGE_SWING_SET(voltage_swing) |
449 DPCD_PRE_EMPHASIS_SET(pre_emphasis);
450
451 if (voltage_swing == VOLTAGE_LEVEL_3)
452 training_lane |= DP_TRAIN_MAX_SWING_REACHED;
453 if (pre_emphasis == PRE_EMPHASIS_LEVEL_3)
454 training_lane |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
455
456 dp->link_train.training_lane[lane] = training_lane;
457 }
458}
459
460static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
461{
462 int lane, lane_count, retval;
463 u8 voltage_swing, pre_emphasis, training_lane;
464 u8 link_status[2], adjust_request[2];
465
466 usleep_range(100, 101);
467
468 lane_count = dp->link_train.lane_count;
469
470 retval = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status, 2);
471 if (retval < 0)
472 return retval;
473
474 retval = drm_dp_dpcd_read(&dp->aux, DP_ADJUST_REQUEST_LANE0_1,
475 adjust_request, 2);
476 if (retval < 0)
477 return retval;
478
479 if (analogix_dp_clock_recovery_ok(link_status, lane_count) == 0) {
480
481 analogix_dp_set_training_pattern(dp, TRAINING_PTN2);
482
483 retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
484 DP_LINK_SCRAMBLING_DISABLE |
485 DP_TRAINING_PATTERN_2);
486 if (retval < 0)
487 return retval;
488
489 dev_info(dp->dev, "Link Training Clock Recovery success\n");
490 dp->link_train.lt_state = EQUALIZER_TRAINING;
491 } else {
492 for (lane = 0; lane < lane_count; lane++) {
493 training_lane = analogix_dp_get_lane_link_training(
494 dp, lane);
495 voltage_swing = analogix_dp_get_adjust_request_voltage(
496 adjust_request, lane);
497 pre_emphasis = analogix_dp_get_adjust_request_pre_emphasis(
498 adjust_request, lane);
499
500 if (DPCD_VOLTAGE_SWING_GET(training_lane) ==
501 voltage_swing &&
502 DPCD_PRE_EMPHASIS_GET(training_lane) ==
503 pre_emphasis)
504 dp->link_train.cr_loop[lane]++;
505
506 if (dp->link_train.cr_loop[lane] == MAX_CR_LOOP ||
507 voltage_swing == VOLTAGE_LEVEL_3 ||
508 pre_emphasis == PRE_EMPHASIS_LEVEL_3) {
509 dev_err(dp->dev, "CR Max reached (%d,%d,%d)\n",
510 dp->link_train.cr_loop[lane],
511 voltage_swing, pre_emphasis);
512 analogix_dp_reduce_link_rate(dp);
513 return -EIO;
514 }
515 }
516 }
517
518 analogix_dp_get_adjust_training_lane(dp, adjust_request);
519
520 for (lane = 0; lane < lane_count; lane++)
521 analogix_dp_set_lane_link_training(dp,
522 dp->link_train.training_lane[lane], lane);
523
524 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET,
525 dp->link_train.training_lane, lane_count);
526 if (retval < 0)
527 return retval;
528
529 return 0;
530}
531
532static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
533{
534 int lane, lane_count, retval;
535 u32 reg;
536 u8 link_align, link_status[2], adjust_request[2];
537
538 usleep_range(400, 401);
539
540 lane_count = dp->link_train.lane_count;
541
542 retval = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status, 2);
543 if (retval < 0)
544 return retval;
545
546 if (analogix_dp_clock_recovery_ok(link_status, lane_count)) {
547 analogix_dp_reduce_link_rate(dp);
548 return -EIO;
549 }
550
551 retval = drm_dp_dpcd_read(&dp->aux, DP_ADJUST_REQUEST_LANE0_1,
552 adjust_request, 2);
553 if (retval < 0)
554 return retval;
555
556 retval = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED,
557 &link_align);
558 if (retval < 0)
559 return retval;
560
561 analogix_dp_get_adjust_training_lane(dp, adjust_request);
562
563 if (!analogix_dp_channel_eq_ok(link_status, link_align, lane_count)) {
564
565 analogix_dp_training_pattern_dis(dp);
566
567 dev_info(dp->dev, "Link Training success!\n");
568
569 analogix_dp_get_link_bandwidth(dp, ®);
570 dp->link_train.link_rate = reg;
571 dev_dbg(dp->dev, "final bandwidth = %.2x\n",
572 dp->link_train.link_rate);
573
574 analogix_dp_get_lane_count(dp, ®);
575 dp->link_train.lane_count = reg;
576 dev_dbg(dp->dev, "final lane count = %.2x\n",
577 dp->link_train.lane_count);
578
579
580 analogix_dp_set_enhanced_mode(dp);
581 dp->link_train.lt_state = FINISHED;
582
583 return 0;
584 }
585
586
587 dp->link_train.eq_loop++;
588
589 if (dp->link_train.eq_loop > MAX_EQ_LOOP) {
590 dev_err(dp->dev, "EQ Max loop\n");
591 analogix_dp_reduce_link_rate(dp);
592 return -EIO;
593 }
594
595 for (lane = 0; lane < lane_count; lane++)
596 analogix_dp_set_lane_link_training(dp,
597 dp->link_train.training_lane[lane], lane);
598
599 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET,
600 dp->link_train.training_lane, lane_count);
601 if (retval < 0)
602 return retval;
603
604 return 0;
605}
606
607static void analogix_dp_get_max_rx_bandwidth(struct analogix_dp_device *dp,
608 u8 *bandwidth)
609{
610 u8 data;
611
612
613
614
615
616
617
618 drm_dp_dpcd_readb(&dp->aux, DP_MAX_LINK_RATE, &data);
619 *bandwidth = data;
620}
621
622static void analogix_dp_get_max_rx_lane_count(struct analogix_dp_device *dp,
623 u8 *lane_count)
624{
625 u8 data;
626
627
628
629
630
631 drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data);
632 *lane_count = DPCD_MAX_LANE_COUNT(data);
633}
634
635static void analogix_dp_init_training(struct analogix_dp_device *dp,
636 enum link_lane_count_type max_lane,
637 int max_rate)
638{
639
640
641
642
643 analogix_dp_reset_macro(dp);
644
645
646 analogix_dp_get_max_rx_bandwidth(dp, &dp->link_train.link_rate);
647 analogix_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count);
648
649 if ((dp->link_train.link_rate != DP_LINK_BW_1_62) &&
650 (dp->link_train.link_rate != DP_LINK_BW_2_7) &&
651 (dp->link_train.link_rate != DP_LINK_BW_5_4)) {
652 dev_err(dp->dev, "Rx Max Link Rate is abnormal :%x !\n",
653 dp->link_train.link_rate);
654 dp->link_train.link_rate = DP_LINK_BW_1_62;
655 }
656
657 if (dp->link_train.lane_count == 0) {
658 dev_err(dp->dev, "Rx Max Lane count is abnormal :%x !\n",
659 dp->link_train.lane_count);
660 dp->link_train.lane_count = (u8)LANE_COUNT1;
661 }
662
663
664 if (dp->link_train.lane_count > max_lane)
665 dp->link_train.lane_count = max_lane;
666 if (dp->link_train.link_rate > max_rate)
667 dp->link_train.link_rate = max_rate;
668
669
670 analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
671}
672
673static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
674{
675 int retval = 0, training_finished = 0;
676
677 dp->link_train.lt_state = START;
678
679
680 while (!retval && !training_finished) {
681 switch (dp->link_train.lt_state) {
682 case START:
683 retval = analogix_dp_link_start(dp);
684 if (retval)
685 dev_err(dp->dev, "LT link start failed!\n");
686 break;
687 case CLOCK_RECOVERY:
688 retval = analogix_dp_process_clock_recovery(dp);
689 if (retval)
690 dev_err(dp->dev, "LT CR failed!\n");
691 break;
692 case EQUALIZER_TRAINING:
693 retval = analogix_dp_process_equalizer_training(dp);
694 if (retval)
695 dev_err(dp->dev, "LT EQ failed!\n");
696 break;
697 case FINISHED:
698 training_finished = 1;
699 break;
700 case FAILED:
701 return -EREMOTEIO;
702 }
703 }
704 if (retval)
705 dev_err(dp->dev, "eDP link training failed (%d)\n", retval);
706
707 return retval;
708}
709
710static int analogix_dp_set_link_train(struct analogix_dp_device *dp,
711 u32 count, u32 bwtype)
712{
713 int i;
714 int retval;
715
716 for (i = 0; i < DP_TIMEOUT_LOOP_COUNT; i++) {
717 analogix_dp_init_training(dp, count, bwtype);
718 retval = analogix_dp_sw_link_training(dp);
719 if (retval == 0)
720 break;
721
722 usleep_range(100, 110);
723 }
724
725 return retval;
726}
727
728static int analogix_dp_config_video(struct analogix_dp_device *dp)
729{
730 int retval = 0;
731 int timeout_loop = 0;
732 int done_count = 0;
733
734 analogix_dp_config_video_slave_mode(dp);
735
736 analogix_dp_set_video_color_format(dp);
737
738 if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
739 dev_err(dp->dev, "PLL is not locked yet.\n");
740 return -EINVAL;
741 }
742
743 for (;;) {
744 timeout_loop++;
745 if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
746 break;
747 if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
748 dev_err(dp->dev, "Timeout of video streamclk ok\n");
749 return -ETIMEDOUT;
750 }
751
752 usleep_range(1, 2);
753 }
754
755
756 analogix_dp_set_video_cr_mn(dp, CALCULATED_M, 0, 0);
757
758
759 analogix_dp_set_video_timing_mode(dp, VIDEO_TIMING_FROM_CAPTURE);
760
761
762 analogix_dp_enable_video_mute(dp, 0);
763
764
765 analogix_dp_enable_video_master(dp, 0);
766
767 timeout_loop = 0;
768
769 for (;;) {
770 timeout_loop++;
771 if (analogix_dp_is_video_stream_on(dp) == 0) {
772 done_count++;
773 if (done_count > 10)
774 break;
775 } else if (done_count) {
776 done_count = 0;
777 }
778 if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
779 dev_err(dp->dev, "Timeout of video streamclk ok\n");
780 return -ETIMEDOUT;
781 }
782
783 usleep_range(1000, 1001);
784 }
785
786 if (retval != 0)
787 dev_err(dp->dev, "Video stream is not detected!\n");
788
789 return retval;
790}
791
792static void analogix_dp_enable_scramble(struct analogix_dp_device *dp,
793 bool enable)
794{
795 u8 data;
796
797 if (enable) {
798 analogix_dp_enable_scrambling(dp);
799
800 drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data);
801 drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
802 (u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
803 } else {
804 analogix_dp_disable_scrambling(dp);
805
806 drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET, &data);
807 drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,
808 (u8)(data | DP_LINK_SCRAMBLING_DISABLE));
809 }
810}
811
812static irqreturn_t analogix_dp_hardirq(int irq, void *arg)
813{
814 struct analogix_dp_device *dp = arg;
815 irqreturn_t ret = IRQ_NONE;
816 enum dp_irq_type irq_type;
817
818 irq_type = analogix_dp_get_irq_type(dp);
819 if (irq_type != DP_IRQ_TYPE_UNKNOWN) {
820 analogix_dp_mute_hpd_interrupt(dp);
821 ret = IRQ_WAKE_THREAD;
822 }
823
824 return ret;
825}
826
827static irqreturn_t analogix_dp_irq_thread(int irq, void *arg)
828{
829 struct analogix_dp_device *dp = arg;
830 enum dp_irq_type irq_type;
831
832 irq_type = analogix_dp_get_irq_type(dp);
833 if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN ||
834 irq_type & DP_IRQ_TYPE_HP_CABLE_OUT) {
835 dev_dbg(dp->dev, "Detected cable status changed!\n");
836 if (dp->drm_dev)
837 drm_helper_hpd_irq_event(dp->drm_dev);
838 }
839
840 if (irq_type != DP_IRQ_TYPE_UNKNOWN) {
841 analogix_dp_clear_hotplug_interrupts(dp);
842 analogix_dp_unmute_hpd_interrupt(dp);
843 }
844
845 return IRQ_HANDLED;
846}
847
848static void analogix_dp_commit(struct analogix_dp_device *dp)
849{
850 int ret;
851
852
853 if (dp->plat_data->panel) {
854 if (drm_panel_disable(dp->plat_data->panel))
855 DRM_ERROR("failed to disable the panel\n");
856 }
857
858 ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
859 dp->video_info.max_link_rate);
860 if (ret) {
861 dev_err(dp->dev, "unable to do link train\n");
862 return;
863 }
864
865 analogix_dp_enable_scramble(dp, 1);
866 analogix_dp_enable_rx_to_enhanced_mode(dp, 1);
867 analogix_dp_enable_enhanced_mode(dp, 1);
868
869 analogix_dp_init_video(dp);
870 ret = analogix_dp_config_video(dp);
871 if (ret)
872 dev_err(dp->dev, "unable to config video\n");
873
874
875 if (dp->plat_data->panel) {
876 if (drm_panel_enable(dp->plat_data->panel))
877 DRM_ERROR("failed to enable the panel\n");
878 }
879
880
881 analogix_dp_start_video(dp);
882
883 dp->psr_support = analogix_dp_detect_sink_psr(dp);
884 if (dp->psr_support)
885 analogix_dp_enable_sink_psr(dp);
886}
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901static int analogix_dp_prepare_panel(struct analogix_dp_device *dp,
902 bool prepare, bool is_modeset_prepare)
903{
904 int ret = 0;
905
906 if (!dp->plat_data->panel)
907 return 0;
908
909 mutex_lock(&dp->panel_lock);
910
911
912
913
914
915 if (dp->panel_is_modeset && !is_modeset_prepare)
916 goto out;
917
918 if (prepare)
919 ret = drm_panel_prepare(dp->plat_data->panel);
920 else
921 ret = drm_panel_unprepare(dp->plat_data->panel);
922
923 if (ret)
924 goto out;
925
926 if (is_modeset_prepare)
927 dp->panel_is_modeset = prepare;
928
929out:
930 mutex_unlock(&dp->panel_lock);
931 return ret;
932}
933
934static int analogix_dp_get_modes(struct drm_connector *connector)
935{
936 struct analogix_dp_device *dp = to_dp(connector);
937 struct edid *edid;
938 int ret, num_modes = 0;
939
940 if (dp->plat_data->panel) {
941 num_modes += drm_panel_get_modes(dp->plat_data->panel);
942 } else {
943 ret = analogix_dp_prepare_panel(dp, true, false);
944 if (ret) {
945 DRM_ERROR("Failed to prepare panel (%d)\n", ret);
946 return 0;
947 }
948
949 edid = drm_get_edid(connector, &dp->aux.ddc);
950 if (edid) {
951 drm_mode_connector_update_edid_property(&dp->connector,
952 edid);
953 num_modes += drm_add_edid_modes(&dp->connector, edid);
954 kfree(edid);
955 }
956
957 ret = analogix_dp_prepare_panel(dp, false, false);
958 if (ret)
959 DRM_ERROR("Failed to unprepare panel (%d)\n", ret);
960 }
961
962 if (dp->plat_data->get_modes)
963 num_modes += dp->plat_data->get_modes(dp->plat_data, connector);
964
965 return num_modes;
966}
967
968static struct drm_encoder *
969analogix_dp_best_encoder(struct drm_connector *connector)
970{
971 struct analogix_dp_device *dp = to_dp(connector);
972
973 return dp->encoder;
974}
975
976static const struct drm_connector_helper_funcs analogix_dp_connector_helper_funcs = {
977 .get_modes = analogix_dp_get_modes,
978 .best_encoder = analogix_dp_best_encoder,
979};
980
981static enum drm_connector_status
982analogix_dp_detect(struct drm_connector *connector, bool force)
983{
984 struct analogix_dp_device *dp = to_dp(connector);
985 enum drm_connector_status status = connector_status_disconnected;
986 int ret;
987
988 if (dp->plat_data->panel)
989 return connector_status_connected;
990
991 ret = analogix_dp_prepare_panel(dp, true, false);
992 if (ret) {
993 DRM_ERROR("Failed to prepare panel (%d)\n", ret);
994 return connector_status_disconnected;
995 }
996
997 if (!analogix_dp_detect_hpd(dp))
998 status = connector_status_connected;
999
1000 ret = analogix_dp_prepare_panel(dp, false, false);
1001 if (ret)
1002 DRM_ERROR("Failed to unprepare panel (%d)\n", ret);
1003
1004 return status;
1005}
1006
1007static const struct drm_connector_funcs analogix_dp_connector_funcs = {
1008 .dpms = drm_atomic_helper_connector_dpms,
1009 .fill_modes = drm_helper_probe_single_connector_modes,
1010 .detect = analogix_dp_detect,
1011 .destroy = drm_connector_cleanup,
1012 .reset = drm_atomic_helper_connector_reset,
1013 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
1014 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1015};
1016
1017static int analogix_dp_bridge_attach(struct drm_bridge *bridge)
1018{
1019 struct analogix_dp_device *dp = bridge->driver_private;
1020 struct drm_encoder *encoder = dp->encoder;
1021 struct drm_connector *connector = &dp->connector;
1022 int ret;
1023
1024 if (!bridge->encoder) {
1025 DRM_ERROR("Parent encoder object not found");
1026 return -ENODEV;
1027 }
1028
1029 connector->polled = DRM_CONNECTOR_POLL_HPD;
1030
1031 ret = drm_connector_init(dp->drm_dev, connector,
1032 &analogix_dp_connector_funcs,
1033 DRM_MODE_CONNECTOR_eDP);
1034 if (ret) {
1035 DRM_ERROR("Failed to initialize connector with drm\n");
1036 return ret;
1037 }
1038
1039 drm_connector_helper_add(connector,
1040 &analogix_dp_connector_helper_funcs);
1041 drm_mode_connector_attach_encoder(connector, encoder);
1042
1043
1044
1045
1046
1047
1048
1049 if (dp->plat_data->attach) {
1050 ret = dp->plat_data->attach(dp->plat_data, bridge, connector);
1051 if (ret) {
1052 DRM_ERROR("Failed at platform attch func\n");
1053 return ret;
1054 }
1055 }
1056
1057 if (dp->plat_data->panel) {
1058 ret = drm_panel_attach(dp->plat_data->panel, &dp->connector);
1059 if (ret) {
1060 DRM_ERROR("Failed to attach panel\n");
1061 return ret;
1062 }
1063 }
1064
1065 return 0;
1066}
1067
1068static void analogix_dp_bridge_pre_enable(struct drm_bridge *bridge)
1069{
1070 struct analogix_dp_device *dp = bridge->driver_private;
1071 int ret;
1072
1073 ret = analogix_dp_prepare_panel(dp, true, true);
1074 if (ret)
1075 DRM_ERROR("failed to setup the panel ret = %d\n", ret);
1076}
1077
1078static void analogix_dp_bridge_enable(struct drm_bridge *bridge)
1079{
1080 struct analogix_dp_device *dp = bridge->driver_private;
1081
1082 if (dp->dpms_mode == DRM_MODE_DPMS_ON)
1083 return;
1084
1085 pm_runtime_get_sync(dp->dev);
1086
1087 if (dp->plat_data->power_on)
1088 dp->plat_data->power_on(dp->plat_data);
1089
1090 phy_power_on(dp->phy);
1091 analogix_dp_init_dp(dp);
1092 enable_irq(dp->irq);
1093 analogix_dp_commit(dp);
1094
1095 dp->dpms_mode = DRM_MODE_DPMS_ON;
1096}
1097
1098static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
1099{
1100 struct analogix_dp_device *dp = bridge->driver_private;
1101 int ret;
1102
1103 if (dp->dpms_mode != DRM_MODE_DPMS_ON)
1104 return;
1105
1106 if (dp->plat_data->panel) {
1107 if (drm_panel_disable(dp->plat_data->panel)) {
1108 DRM_ERROR("failed to disable the panel\n");
1109 return;
1110 }
1111 }
1112
1113 disable_irq(dp->irq);
1114 phy_power_off(dp->phy);
1115
1116 if (dp->plat_data->power_off)
1117 dp->plat_data->power_off(dp->plat_data);
1118
1119 pm_runtime_put_sync(dp->dev);
1120
1121 ret = analogix_dp_prepare_panel(dp, false, true);
1122 if (ret)
1123 DRM_ERROR("failed to setup the panel ret = %d\n", ret);
1124
1125 dp->dpms_mode = DRM_MODE_DPMS_OFF;
1126}
1127
1128static void analogix_dp_bridge_mode_set(struct drm_bridge *bridge,
1129 struct drm_display_mode *orig_mode,
1130 struct drm_display_mode *mode)
1131{
1132 struct analogix_dp_device *dp = bridge->driver_private;
1133 struct drm_display_info *display_info = &dp->connector.display_info;
1134 struct video_info *video = &dp->video_info;
1135 struct device_node *dp_node = dp->dev->of_node;
1136 int vic;
1137
1138
1139 video->interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1140 video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
1141 video->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC);
1142
1143
1144 vic = drm_match_cea_mode(mode);
1145 if ((vic == 6) || (vic == 7) || (vic == 21) || (vic == 22) ||
1146 (vic == 2) || (vic == 3) || (vic == 17) || (vic == 18)) {
1147 video->dynamic_range = CEA;
1148 video->ycbcr_coeff = COLOR_YCBCR601;
1149 } else if (vic) {
1150 video->dynamic_range = CEA;
1151 video->ycbcr_coeff = COLOR_YCBCR709;
1152 } else {
1153 video->dynamic_range = VESA;
1154 video->ycbcr_coeff = COLOR_YCBCR709;
1155 }
1156
1157
1158 switch (display_info->bpc) {
1159 case 12:
1160 video->color_depth = COLOR_12;
1161 break;
1162 case 10:
1163 video->color_depth = COLOR_10;
1164 break;
1165 case 8:
1166 video->color_depth = COLOR_8;
1167 break;
1168 case 6:
1169 video->color_depth = COLOR_6;
1170 break;
1171 default:
1172 video->color_depth = COLOR_8;
1173 break;
1174 }
1175 if (display_info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
1176 video->color_space = COLOR_YCBCR444;
1177 else if (display_info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
1178 video->color_space = COLOR_YCBCR422;
1179 else if (display_info->color_formats & DRM_COLOR_FORMAT_RGB444)
1180 video->color_space = COLOR_RGB;
1181 else
1182 video->color_space = COLOR_RGB;
1183
1184
1185
1186
1187
1188
1189
1190
1191 of_property_read_u32(dp_node, "samsung,color-space",
1192 &video->color_space);
1193 of_property_read_u32(dp_node, "samsung,dynamic-range",
1194 &video->dynamic_range);
1195 of_property_read_u32(dp_node, "samsung,ycbcr-coeff",
1196 &video->ycbcr_coeff);
1197 of_property_read_u32(dp_node, "samsung,color-depth",
1198 &video->color_depth);
1199 if (of_property_read_bool(dp_node, "hsync-active-high"))
1200 video->h_sync_polarity = true;
1201 if (of_property_read_bool(dp_node, "vsync-active-high"))
1202 video->v_sync_polarity = true;
1203 if (of_property_read_bool(dp_node, "interlaced"))
1204 video->interlaced = true;
1205}
1206
1207static void analogix_dp_bridge_nop(struct drm_bridge *bridge)
1208{
1209
1210}
1211
1212static const struct drm_bridge_funcs analogix_dp_bridge_funcs = {
1213 .pre_enable = analogix_dp_bridge_pre_enable,
1214 .enable = analogix_dp_bridge_enable,
1215 .disable = analogix_dp_bridge_disable,
1216 .post_disable = analogix_dp_bridge_nop,
1217 .mode_set = analogix_dp_bridge_mode_set,
1218 .attach = analogix_dp_bridge_attach,
1219};
1220
1221static int analogix_dp_create_bridge(struct drm_device *drm_dev,
1222 struct analogix_dp_device *dp)
1223{
1224 struct drm_bridge *bridge;
1225 int ret;
1226
1227 bridge = devm_kzalloc(drm_dev->dev, sizeof(*bridge), GFP_KERNEL);
1228 if (!bridge) {
1229 DRM_ERROR("failed to allocate for drm bridge\n");
1230 return -ENOMEM;
1231 }
1232
1233 dp->bridge = bridge;
1234
1235 bridge->driver_private = dp;
1236 bridge->funcs = &analogix_dp_bridge_funcs;
1237
1238 ret = drm_bridge_attach(dp->encoder, bridge, NULL);
1239 if (ret) {
1240 DRM_ERROR("failed to attach drm bridge\n");
1241 return -EINVAL;
1242 }
1243
1244 return 0;
1245}
1246
1247static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
1248{
1249 struct device_node *dp_node = dp->dev->of_node;
1250 struct video_info *video_info = &dp->video_info;
1251
1252 switch (dp->plat_data->dev_type) {
1253 case RK3288_DP:
1254 case RK3399_EDP:
1255
1256
1257
1258
1259 video_info->max_link_rate = 0x0A;
1260 video_info->max_lane_count = 0x04;
1261 break;
1262 case EXYNOS_DP:
1263
1264
1265
1266
1267 of_property_read_u32(dp_node, "samsung,link-rate",
1268 &video_info->max_link_rate);
1269 of_property_read_u32(dp_node, "samsung,lane-count",
1270 &video_info->max_lane_count);
1271 break;
1272 }
1273
1274 return 0;
1275}
1276
1277static ssize_t analogix_dpaux_transfer(struct drm_dp_aux *aux,
1278 struct drm_dp_aux_msg *msg)
1279{
1280 struct analogix_dp_device *dp = to_dp(aux);
1281
1282 return analogix_dp_transfer(dp, msg);
1283}
1284
1285int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev,
1286 struct analogix_dp_plat_data *plat_data)
1287{
1288 struct platform_device *pdev = to_platform_device(dev);
1289 struct analogix_dp_device *dp;
1290 struct resource *res;
1291 unsigned int irq_flags;
1292 int ret;
1293
1294 if (!plat_data) {
1295 dev_err(dev, "Invalided input plat_data\n");
1296 return -EINVAL;
1297 }
1298
1299 dp = devm_kzalloc(dev, sizeof(struct analogix_dp_device), GFP_KERNEL);
1300 if (!dp)
1301 return -ENOMEM;
1302
1303 dev_set_drvdata(dev, dp);
1304
1305 dp->dev = &pdev->dev;
1306 dp->dpms_mode = DRM_MODE_DPMS_OFF;
1307
1308 mutex_init(&dp->panel_lock);
1309 dp->panel_is_modeset = false;
1310
1311
1312
1313
1314
1315
1316 dp->plat_data = plat_data;
1317
1318 ret = analogix_dp_dt_parse_pdata(dp);
1319 if (ret)
1320 return ret;
1321
1322 dp->phy = devm_phy_get(dp->dev, "dp");
1323 if (IS_ERR(dp->phy)) {
1324 dev_err(dp->dev, "no DP phy configured\n");
1325 ret = PTR_ERR(dp->phy);
1326 if (ret) {
1327
1328
1329
1330
1331 if (ret == -ENOSYS || ret == -ENODEV)
1332 dp->phy = NULL;
1333 else
1334 return ret;
1335 }
1336 }
1337
1338 dp->clock = devm_clk_get(&pdev->dev, "dp");
1339 if (IS_ERR(dp->clock)) {
1340 dev_err(&pdev->dev, "failed to get clock\n");
1341 return PTR_ERR(dp->clock);
1342 }
1343
1344 clk_prepare_enable(dp->clock);
1345
1346 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1347
1348 dp->reg_base = devm_ioremap_resource(&pdev->dev, res);
1349 if (IS_ERR(dp->reg_base))
1350 return PTR_ERR(dp->reg_base);
1351
1352 dp->force_hpd = of_property_read_bool(dev->of_node, "force-hpd");
1353
1354 dp->hpd_gpio = of_get_named_gpio(dev->of_node, "hpd-gpios", 0);
1355 if (!gpio_is_valid(dp->hpd_gpio))
1356 dp->hpd_gpio = of_get_named_gpio(dev->of_node,
1357 "samsung,hpd-gpio", 0);
1358
1359 if (gpio_is_valid(dp->hpd_gpio)) {
1360
1361
1362
1363
1364
1365
1366
1367 ret = devm_gpio_request_one(&pdev->dev, dp->hpd_gpio, GPIOF_IN,
1368 "hpd_gpio");
1369 if (ret) {
1370 dev_err(&pdev->dev, "failed to get hpd gpio\n");
1371 return ret;
1372 }
1373 dp->irq = gpio_to_irq(dp->hpd_gpio);
1374 irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
1375 } else {
1376 dp->hpd_gpio = -ENODEV;
1377 dp->irq = platform_get_irq(pdev, 0);
1378 irq_flags = 0;
1379 }
1380
1381 if (dp->irq == -ENXIO) {
1382 dev_err(&pdev->dev, "failed to get irq\n");
1383 return -ENODEV;
1384 }
1385
1386 pm_runtime_enable(dev);
1387
1388 pm_runtime_get_sync(dev);
1389 phy_power_on(dp->phy);
1390
1391 analogix_dp_init_dp(dp);
1392
1393 ret = devm_request_threaded_irq(&pdev->dev, dp->irq,
1394 analogix_dp_hardirq,
1395 analogix_dp_irq_thread,
1396 irq_flags, "analogix-dp", dp);
1397 if (ret) {
1398 dev_err(&pdev->dev, "failed to request irq\n");
1399 goto err_disable_pm_runtime;
1400 }
1401 disable_irq(dp->irq);
1402
1403 dp->drm_dev = drm_dev;
1404 dp->encoder = dp->plat_data->encoder;
1405
1406 dp->aux.name = "DP-AUX";
1407 dp->aux.transfer = analogix_dpaux_transfer;
1408 dp->aux.dev = &pdev->dev;
1409
1410 ret = drm_dp_aux_register(&dp->aux);
1411 if (ret)
1412 goto err_disable_pm_runtime;
1413
1414 ret = analogix_dp_create_bridge(drm_dev, dp);
1415 if (ret) {
1416 DRM_ERROR("failed to create bridge (%d)\n", ret);
1417 drm_encoder_cleanup(dp->encoder);
1418 goto err_disable_pm_runtime;
1419 }
1420
1421 phy_power_off(dp->phy);
1422 pm_runtime_put(dev);
1423
1424 return 0;
1425
1426err_disable_pm_runtime:
1427
1428 phy_power_off(dp->phy);
1429 pm_runtime_put(dev);
1430 pm_runtime_disable(dev);
1431
1432 return ret;
1433}
1434EXPORT_SYMBOL_GPL(analogix_dp_bind);
1435
1436void analogix_dp_unbind(struct device *dev, struct device *master,
1437 void *data)
1438{
1439 struct analogix_dp_device *dp = dev_get_drvdata(dev);
1440
1441 analogix_dp_bridge_disable(dp->bridge);
1442 dp->connector.funcs->destroy(&dp->connector);
1443 dp->encoder->funcs->destroy(dp->encoder);
1444
1445 if (dp->plat_data->panel) {
1446 if (drm_panel_unprepare(dp->plat_data->panel))
1447 DRM_ERROR("failed to turnoff the panel\n");
1448 if (drm_panel_detach(dp->plat_data->panel))
1449 DRM_ERROR("failed to detach the panel\n");
1450 }
1451
1452 drm_dp_aux_unregister(&dp->aux);
1453 pm_runtime_disable(dev);
1454 clk_disable_unprepare(dp->clock);
1455}
1456EXPORT_SYMBOL_GPL(analogix_dp_unbind);
1457
1458#ifdef CONFIG_PM
1459int analogix_dp_suspend(struct device *dev)
1460{
1461 struct analogix_dp_device *dp = dev_get_drvdata(dev);
1462
1463 clk_disable_unprepare(dp->clock);
1464
1465 if (dp->plat_data->panel) {
1466 if (drm_panel_unprepare(dp->plat_data->panel))
1467 DRM_ERROR("failed to turnoff the panel\n");
1468 }
1469
1470 return 0;
1471}
1472EXPORT_SYMBOL_GPL(analogix_dp_suspend);
1473
1474int analogix_dp_resume(struct device *dev)
1475{
1476 struct analogix_dp_device *dp = dev_get_drvdata(dev);
1477 int ret;
1478
1479 ret = clk_prepare_enable(dp->clock);
1480 if (ret < 0) {
1481 DRM_ERROR("Failed to prepare_enable the clock clk [%d]\n", ret);
1482 return ret;
1483 }
1484
1485 if (dp->plat_data->panel) {
1486 if (drm_panel_prepare(dp->plat_data->panel)) {
1487 DRM_ERROR("failed to setup the panel\n");
1488 return -EBUSY;
1489 }
1490 }
1491
1492 return 0;
1493}
1494EXPORT_SYMBOL_GPL(analogix_dp_resume);
1495#endif
1496
1497int analogix_dp_start_crc(struct drm_connector *connector)
1498{
1499 struct analogix_dp_device *dp = to_dp(connector);
1500
1501 if (!connector->state->crtc) {
1502 DRM_ERROR("Connector %s doesn't currently have a CRTC.\n",
1503 connector->name);
1504 return -EINVAL;
1505 }
1506
1507 return drm_dp_start_crc(&dp->aux, connector->state->crtc);
1508}
1509EXPORT_SYMBOL_GPL(analogix_dp_start_crc);
1510
1511int analogix_dp_stop_crc(struct drm_connector *connector)
1512{
1513 struct analogix_dp_device *dp = to_dp(connector);
1514
1515 return drm_dp_stop_crc(&dp->aux);
1516}
1517EXPORT_SYMBOL_GPL(analogix_dp_stop_crc);
1518
1519MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>");
1520MODULE_DESCRIPTION("Analogix DP Core Driver");
1521MODULE_LICENSE("GPL v2");
1522
