LXR linux/drivers/gpu/drm/cirrus/cirrus

   1
   2/*
   3 * Copyright 2012 Red Hat
   4 *
   5 * This file is subject to the terms and conditions of the GNU General
   6 * Public License version 2. See the file COPYING in the main
   7 * directory of this archive for more details.
   8 *
   9 * Authors: Matthew Garrett
  10 *          Dave Airlie
  11 *
  12 * Portions of this code derived from cirrusfb.c:
  13 * drivers/video/cirrusfb.c - driver for Cirrus Logic chipsets
  14 *
  15 * Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com>
  16 */
  17#include <drm/drmP.h>
  18#include <drm/drm_crtc_helper.h>
  19#include <drm/drm_plane_helper.h>
  20
  21#include <video/cirrus.h>
  22
  23#include "cirrus_drv.h"
  24
  25#define CIRRUS_LUT_SIZE 256
  26
  27#define PALETTE_INDEX 0x8
  28#define PALETTE_DATA 0x9
  29
  30/*
  31 * This file contains setup code for the CRTC.
  32 */
  33
  34static void cirrus_crtc_load_lut(struct drm_crtc *crtc)
  35{
  36        struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
  37        struct drm_device *dev = crtc->dev;
  38        struct cirrus_device *cdev = dev->dev_private;
  39        int i;
  40
  41        if (!crtc->enabled)
  42                return;
  43
  44        for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
  45                /* VGA registers */
  46                WREG8(PALETTE_INDEX, i);
  47                WREG8(PALETTE_DATA, cirrus_crtc->lut_r[i]);
  48                WREG8(PALETTE_DATA, cirrus_crtc->lut_g[i]);
  49                WREG8(PALETTE_DATA, cirrus_crtc->lut_b[i]);
  50        }
  51}
  52
  53/*
  54 * The DRM core requires DPMS functions, but they make little sense in our
  55 * case and so are just stubs
  56 */
  57
  58static void cirrus_crtc_dpms(struct drm_crtc *crtc, int mode)
  59{
  60        struct drm_device *dev = crtc->dev;
  61        struct cirrus_device *cdev = dev->dev_private;
  62        u8 sr01, gr0e;
  63
  64        switch (mode) {
  65        case DRM_MODE_DPMS_ON:
  66                sr01 = 0x00;
  67                gr0e = 0x00;
  68                break;
  69        case DRM_MODE_DPMS_STANDBY:
  70                sr01 = 0x20;
  71                gr0e = 0x02;
  72                break;
  73        case DRM_MODE_DPMS_SUSPEND:
  74                sr01 = 0x20;
  75                gr0e = 0x04;
  76                break;
  77        case DRM_MODE_DPMS_OFF:
  78                sr01 = 0x20;
  79                gr0e = 0x06;
  80                break;
  81        default:
  82                return;
  83        }
  84
  85        WREG8(SEQ_INDEX, 0x1);
  86        sr01 |= RREG8(SEQ_DATA) & ~0x20;
  87        WREG_SEQ(0x1, sr01);
  88
  89        WREG8(GFX_INDEX, 0xe);
  90        gr0e |= RREG8(GFX_DATA) & ~0x06;
  91        WREG_GFX(0xe, gr0e);
  92}
  93
  94static void cirrus_set_start_address(struct drm_crtc *crtc, unsigned offset)
  95{
  96        struct cirrus_device *cdev = crtc->dev->dev_private;
  97        u32 addr;
  98        u8 tmp;
  99
 100        addr = offset >> 2;
 101        WREG_CRT(0x0c, (u8)((addr >> 8) & 0xff));
 102        WREG_CRT(0x0d, (u8)(addr & 0xff));
 103
 104        WREG8(CRT_INDEX, 0x1b);
 105        tmp = RREG8(CRT_DATA);
 106        tmp &= 0xf2;
 107        tmp |= (addr >> 16) & 0x01;
 108        tmp |= (addr >> 15) & 0x0c;
 109        WREG_CRT(0x1b, tmp);
 110        WREG8(CRT_INDEX, 0x1d);
 111        tmp = RREG8(CRT_DATA);
 112        tmp &= 0x7f;
 113        tmp |= (addr >> 12) & 0x80;
 114        WREG_CRT(0x1d, tmp);
 115}
 116
 117/* cirrus is different - we will force move buffers out of VRAM */
 118static int cirrus_crtc_do_set_base(struct drm_crtc *crtc,
 119                                struct drm_framebuffer *fb,
 120                                int x, int y, int atomic)
 121{
 122        struct cirrus_device *cdev = crtc->dev->dev_private;
 123        struct drm_gem_object *obj;
 124        struct cirrus_framebuffer *cirrus_fb;
 125        struct cirrus_bo *bo;
 126        int ret;
 127        u64 gpu_addr;
 128
 129        /* push the previous fb to system ram */
 130        if (!atomic && fb) {
 131                cirrus_fb = to_cirrus_framebuffer(fb);
 132                obj = cirrus_fb->obj;
 133                bo = gem_to_cirrus_bo(obj);
 134                ret = cirrus_bo_reserve(bo, false);
 135                if (ret)
 136                        return ret;
 137                cirrus_bo_push_sysram(bo);
 138                cirrus_bo_unreserve(bo);
 139        }
 140
 141        cirrus_fb = to_cirrus_framebuffer(crtc->primary->fb);
 142        obj = cirrus_fb->obj;
 143        bo = gem_to_cirrus_bo(obj);
 144
 145        ret = cirrus_bo_reserve(bo, false);
 146        if (ret)
 147                return ret;
 148
 149        ret = cirrus_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr);
 150        if (ret) {
 151                cirrus_bo_unreserve(bo);
 152                return ret;
 153        }
 154
 155        if (&cdev->mode_info.gfbdev->gfb == cirrus_fb) {
 156                /* if pushing console in kmap it */
 157                ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap);
 158                if (ret)
 159                        DRM_ERROR("failed to kmap fbcon\n");
 160        }
 161        cirrus_bo_unreserve(bo);
 162
 163        cirrus_set_start_address(crtc, (u32)gpu_addr);
 164        return 0;
 165}
 166
 167static int cirrus_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
 168                             struct drm_framebuffer *old_fb)
 169{
 170        return cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
 171}
 172
 173/*
 174 * The meat of this driver. The core passes us a mode and we have to program
 175 * it. The modesetting here is the bare minimum required to satisfy the qemu
 176 * emulation of this hardware, and running this against a real device is
 177 * likely to result in an inadequately programmed mode. We've already had
 178 * the opportunity to modify the mode, so whatever we receive here should
 179 * be something that can be correctly programmed and displayed
 180 */
 181static int cirrus_crtc_mode_set(struct drm_crtc *crtc,
 182                                struct drm_display_mode *mode,
 183                                struct drm_display_mode *adjusted_mode,
 184                                int x, int y, struct drm_framebuffer *old_fb)
 185{
 186        struct drm_device *dev = crtc->dev;
 187        struct cirrus_device *cdev = dev->dev_private;
 188        const struct drm_framebuffer *fb = crtc->primary->fb;
 189        int hsyncstart, hsyncend, htotal, hdispend;
 190        int vtotal, vdispend;
 191        int tmp;
 192        int sr07 = 0, hdr = 0;
 193
 194        htotal = mode->htotal / 8;
 195        hsyncend = mode->hsync_end / 8;
 196        hsyncstart = mode->hsync_start / 8;
 197        hdispend = mode->hdisplay / 8;
 198
 199        vtotal = mode->vtotal;
 200        vdispend = mode->vdisplay;
 201
 202        vdispend -= 1;
 203        vtotal -= 2;
 204
 205        htotal -= 5;
 206        hdispend -= 1;
 207        hsyncstart += 1;
 208        hsyncend += 1;
 209
 210        WREG_CRT(VGA_CRTC_V_SYNC_END, 0x20);
 211        WREG_CRT(VGA_CRTC_H_TOTAL, htotal);
 212        WREG_CRT(VGA_CRTC_H_DISP, hdispend);
 213        WREG_CRT(VGA_CRTC_H_SYNC_START, hsyncstart);
 214        WREG_CRT(VGA_CRTC_H_SYNC_END, hsyncend);
 215        WREG_CRT(VGA_CRTC_V_TOTAL, vtotal & 0xff);
 216        WREG_CRT(VGA_CRTC_V_DISP_END, vdispend & 0xff);
 217
 218        tmp = 0x40;
 219        if ((vdispend + 1) & 512)
 220                tmp |= 0x20;
 221        WREG_CRT(VGA_CRTC_MAX_SCAN, tmp);
 222
 223        /*
 224         * Overflow bits for values that don't fit in the standard registers
 225         */
 226        tmp = 16;
 227        if (vtotal & 256)
 228                tmp |= 1;
 229        if (vdispend & 256)
 230                tmp |= 2;
 231        if ((vdispend + 1) & 256)
 232                tmp |= 8;
 233        if (vtotal & 512)
 234                tmp |= 32;
 235        if (vdispend & 512)
 236                tmp |= 64;
 237        WREG_CRT(VGA_CRTC_OVERFLOW, tmp);
 238
 239        tmp = 0;
 240
 241        /* More overflow bits */
 242
 243        if ((htotal + 5) & 64)
 244                tmp |= 16;
 245        if ((htotal + 5) & 128)
 246                tmp |= 32;
 247        if (vtotal & 256)
 248                tmp |= 64;
 249        if (vtotal & 512)
 250                tmp |= 128;
 251
 252        WREG_CRT(CL_CRT1A, tmp);
 253
 254        /* Disable Hercules/CGA compatibility */
 255        WREG_CRT(VGA_CRTC_MODE, 0x03);
 256
 257        WREG8(SEQ_INDEX, 0x7);
 258        sr07 = RREG8(SEQ_DATA);
 259        sr07 &= 0xe0;
 260        hdr = 0;
 261        switch (fb->format->cpp[0] * 8) {
 262        case 8:
 263                sr07 |= 0x11;
 264                break;
 265        case 16:
 266                sr07 |= 0x17;
 267                hdr = 0xc1;
 268                break;
 269        case 24:
 270                sr07 |= 0x15;
 271                hdr = 0xc5;
 272                break;
 273        case 32:
 274                sr07 |= 0x19;
 275                hdr = 0xc5;
 276                break;
 277        default:
 278                return -1;
 279        }
 280
 281        WREG_SEQ(0x7, sr07);
 282
 283        /* Program the pitch */
 284        tmp = fb->pitches[0] / 8;
 285        WREG_CRT(VGA_CRTC_OFFSET, tmp);
 286
 287        /* Enable extended blanking and pitch bits, and enable full memory */
 288        tmp = 0x22;
 289        tmp |= (fb->pitches[0] >> 7) & 0x10;
 290        tmp |= (fb->pitches[0] >> 6) & 0x40;
 291        WREG_CRT(0x1b, tmp);
 292
 293        /* Enable high-colour modes */
 294        WREG_GFX(VGA_GFX_MODE, 0x40);
 295
 296        /* And set graphics mode */
 297        WREG_GFX(VGA_GFX_MISC, 0x01);
 298
 299        WREG_HDR(hdr);
 300        cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
 301
 302        /* Unblank (needed on S3 resume, vgabios doesn't do it then) */
 303        outb(0x20, 0x3c0);
 304        return 0;
 305}
 306
 307/*
 308 * This is called before a mode is programmed. A typical use might be to
 309 * enable DPMS during the programming to avoid seeing intermediate stages,
 310 * but that's not relevant to us
 311 */
 312static void cirrus_crtc_prepare(struct drm_crtc *crtc)
 313{
 314}
 315
 316/*
 317 * This is called after a mode is programmed. It should reverse anything done
 318 * by the prepare function
 319 */
 320static void cirrus_crtc_commit(struct drm_crtc *crtc)
 321{
 322}
 323
 324/*
 325 * The core can pass us a set of gamma values to program. We actually only
 326 * use this for 8-bit mode so can't perform smooth fades on deeper modes,
 327 * but it's a requirement that we provide the function
 328 */
 329static int cirrus_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
 330                                 u16 *blue, uint32_t size,
 331                                 struct drm_modeset_acquire_ctx *ctx)
 332{
 333        struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
 334        int i;
 335
 336        for (i = 0; i < size; i++) {
 337                cirrus_crtc->lut_r[i] = red[i];
 338                cirrus_crtc->lut_g[i] = green[i];
 339                cirrus_crtc->lut_b[i] = blue[i];
 340        }
 341        cirrus_crtc_load_lut(crtc);
 342
 343        return 0;
 344}
 345
 346/* Simple cleanup function */
 347static void cirrus_crtc_destroy(struct drm_crtc *crtc)
 348{
 349        struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
 350
 351        drm_crtc_cleanup(crtc);
 352        kfree(cirrus_crtc);
 353}
 354
 355/* These provide the minimum set of functions required to handle a CRTC */
 356static const struct drm_crtc_funcs cirrus_crtc_funcs = {
 357        .gamma_set = cirrus_crtc_gamma_set,
 358        .set_config = drm_crtc_helper_set_config,
 359        .destroy = cirrus_crtc_destroy,
 360};
 361
 362static const struct drm_crtc_helper_funcs cirrus_helper_funcs = {
 363        .dpms = cirrus_crtc_dpms,
 364        .mode_set = cirrus_crtc_mode_set,
 365        .mode_set_base = cirrus_crtc_mode_set_base,
 366        .prepare = cirrus_crtc_prepare,
 367        .commit = cirrus_crtc_commit,
 368        .load_lut = cirrus_crtc_load_lut,
 369};
 370
 371/* CRTC setup */
 372static void cirrus_crtc_init(struct drm_device *dev)
 373{
 374        struct cirrus_device *cdev = dev->dev_private;
 375        struct cirrus_crtc *cirrus_crtc;
 376        int i;
 377
 378        cirrus_crtc = kzalloc(sizeof(struct cirrus_crtc) +
 379                              (CIRRUSFB_CONN_LIMIT * sizeof(struct drm_connector *)),
 380                              GFP_KERNEL);
 381
 382        if (cirrus_crtc == NULL)
 383                return;
 384
 385        drm_crtc_init(dev, &cirrus_crtc->base, &cirrus_crtc_funcs);
 386
 387        drm_mode_crtc_set_gamma_size(&cirrus_crtc->base, CIRRUS_LUT_SIZE);
 388        cdev->mode_info.crtc = cirrus_crtc;
 389
 390        for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
 391                cirrus_crtc->lut_r[i] = i;
 392                cirrus_crtc->lut_g[i] = i;
 393                cirrus_crtc->lut_b[i] = i;
 394        }
 395
 396        drm_crtc_helper_add(&cirrus_crtc->base, &cirrus_helper_funcs);
 397}
 398
 399/** Sets the color ramps on behalf of fbcon */
 400void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 401                              u16 blue, int regno)
 402{
 403        struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
 404
 405        cirrus_crtc->lut_r[regno] = red;
 406        cirrus_crtc->lut_g[regno] = green;
 407        cirrus_crtc->lut_b[regno] = blue;
 408}
 409
 410/** Gets the color ramps on behalf of fbcon */
 411void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 412                              u16 *blue, int regno)
 413{
 414        struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
 415
 416        *red = cirrus_crtc->lut_r[regno];
 417        *green = cirrus_crtc->lut_g[regno];
 418        *blue = cirrus_crtc->lut_b[regno];
 419}
 420
 421static void cirrus_encoder_mode_set(struct drm_encoder *encoder,
 422                                struct drm_display_mode *mode,
 423                                struct drm_display_mode *adjusted_mode)
 424{
 425}
 426
 427static void cirrus_encoder_dpms(struct drm_encoder *encoder, int state)
 428{
 429        return;
 430}
 431
 432static void cirrus_encoder_prepare(struct drm_encoder *encoder)
 433{
 434}
 435
 436static void cirrus_encoder_commit(struct drm_encoder *encoder)
 437{
 438}
 439
 440static void cirrus_encoder_destroy(struct drm_encoder *encoder)
 441{
 442        struct cirrus_encoder *cirrus_encoder = to_cirrus_encoder(encoder);
 443        drm_encoder_cleanup(encoder);
 444        kfree(cirrus_encoder);
 445}
 446
 447static const struct drm_encoder_helper_funcs cirrus_encoder_helper_funcs = {
 448        .dpms = cirrus_encoder_dpms,
 449        .mode_set = cirrus_encoder_mode_set,
 450        .prepare = cirrus_encoder_prepare,
 451        .commit = cirrus_encoder_commit,
 452};
 453
 454static const struct drm_encoder_funcs cirrus_encoder_encoder_funcs = {
 455        .destroy = cirrus_encoder_destroy,
 456};
 457
 458static struct drm_encoder *cirrus_encoder_init(struct drm_device *dev)
 459{
 460        struct drm_encoder *encoder;
 461        struct cirrus_encoder *cirrus_encoder;
 462
 463        cirrus_encoder = kzalloc(sizeof(struct cirrus_encoder), GFP_KERNEL);
 464        if (!cirrus_encoder)
 465                return NULL;
 466
 467        encoder = &cirrus_encoder->base;
 468        encoder->possible_crtcs = 0x1;
 469
 470        drm_encoder_init(dev, encoder, &cirrus_encoder_encoder_funcs,
 471                         DRM_MODE_ENCODER_DAC, NULL);
 472        drm_encoder_helper_add(encoder, &cirrus_encoder_helper_funcs);
 473
 474        return encoder;
 475}
 476
 477
 478static int cirrus_vga_get_modes(struct drm_connector *connector)
 479{
 480        int count;
 481
 482        /* Just add a static list of modes */
 483        if (cirrus_bpp <= 24) {
 484                count = drm_add_modes_noedid(connector, 1280, 1024);
 485                drm_set_preferred_mode(connector, 1024, 768);
 486        } else {
 487                count = drm_add_modes_noedid(connector, 800, 600);
 488                drm_set_preferred_mode(connector, 800, 600);
 489        }
 490        return count;
 491}
 492
 493static struct drm_encoder *cirrus_connector_best_encoder(struct drm_connector
 494                                                  *connector)
 495{
 496        int enc_id = connector->encoder_ids[0];
 497        /* pick the encoder ids */
 498        if (enc_id)
 499                return drm_encoder_find(connector->dev, enc_id);
 500        return NULL;
 501}
 502
 503static void cirrus_connector_destroy(struct drm_connector *connector)
 504{
 505        drm_connector_cleanup(connector);
 506        kfree(connector);
 507}
 508
 509static const struct drm_connector_helper_funcs cirrus_vga_connector_helper_funcs = {
 510        .get_modes = cirrus_vga_get_modes,
 511        .best_encoder = cirrus_connector_best_encoder,
 512};
 513
 514static const struct drm_connector_funcs cirrus_vga_connector_funcs = {
 515        .dpms = drm_helper_connector_dpms,
 516        .fill_modes = drm_helper_probe_single_connector_modes,
 517        .destroy = cirrus_connector_destroy,
 518};
 519
 520static struct drm_connector *cirrus_vga_init(struct drm_device *dev)
 521{
 522        struct drm_connector *connector;
 523        struct cirrus_connector *cirrus_connector;
 524
 525        cirrus_connector = kzalloc(sizeof(struct cirrus_connector), GFP_KERNEL);
 526        if (!cirrus_connector)
 527                return NULL;
 528
 529        connector = &cirrus_connector->base;
 530
 531        drm_connector_init(dev, connector,
 532                           &cirrus_vga_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 533
 534        drm_connector_helper_add(connector, &cirrus_vga_connector_helper_funcs);
 535
 536        drm_connector_register(connector);
 537        return connector;
 538}
 539
 540
 541int cirrus_modeset_init(struct cirrus_device *cdev)
 542{
 543        struct drm_encoder *encoder;
 544        struct drm_connector *connector;
 545        int ret;
 546
 547        drm_mode_config_init(cdev->dev);
 548        cdev->mode_info.mode_config_initialized = true;
 549
 550        cdev->dev->mode_config.max_width = CIRRUS_MAX_FB_WIDTH;
 551        cdev->dev->mode_config.max_height = CIRRUS_MAX_FB_HEIGHT;
 552
 553        cdev->dev->mode_config.fb_base = cdev->mc.vram_base;
 554        cdev->dev->mode_config.preferred_depth = 24;
 555        /* don't prefer a shadow on virt GPU */
 556        cdev->dev->mode_config.prefer_shadow = 0;
 557
 558        cirrus_crtc_init(cdev->dev);
 559
 560        encoder = cirrus_encoder_init(cdev->dev);
 561        if (!encoder) {
 562                DRM_ERROR("cirrus_encoder_init failed\n");
 563                return -1;
 564        }
 565
 566        connector = cirrus_vga_init(cdev->dev);
 567        if (!connector) {
 568                DRM_ERROR("cirrus_vga_init failed\n");
 569                return -1;
 570        }
 571
 572        drm_mode_connector_attach_encoder(connector, encoder);
 573
 574        ret = cirrus_fbdev_init(cdev);
 575        if (ret) {
 576                DRM_ERROR("cirrus_fbdev_init failed\n");
 577                return ret;
 578        }
 579
 580        return 0;
 581}
 582
 583void cirrus_modeset_fini(struct cirrus_device *cdev)
 584{
 585        cirrus_fbdev_fini(cdev);
 586
 587        if (cdev->mode_info.mode_config_initialized) {
 588                drm_mode_config_cleanup(cdev->dev);
 589                cdev->mode_info.mode_config_initialized = false;
 590        }
 591}
 592