LXR linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/P0260.c

   1/*
   2 * Copyright 2013 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24#include <subdev/bios.h>
  25#include <subdev/bios/bit.h>
  26#include <subdev/bios/P0260.h>
  27
  28u32
  29nvbios_P0260Te(struct nvkm_bios *bios,
  30               u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *xnr, u8 *xsz)
  31{
  32        struct bit_entry bit_P;
  33        u32 data = 0x00000000;
  34
  35        if (!bit_entry(bios, 'P', &bit_P)) {
  36                if (bit_P.version == 2 && bit_P.length > 0x63)
  37                        data = nvbios_rd32(bios, bit_P.offset + 0x60);
  38                if (data) {
  39                        *ver = nvbios_rd08(bios, data + 0);
  40                        switch (*ver) {
  41                        case 0x10:
  42                                *hdr = nvbios_rd08(bios, data + 1);
  43                                *cnt = nvbios_rd08(bios, data + 2);
  44                                *len = 4;
  45                                *xnr = nvbios_rd08(bios, data + 3);
  46                                *xsz = 4;
  47                                return data;
  48                        default:
  49                                break;
  50                        }
  51                }
  52        }
  53
  54        return 0x00000000;
  55}
  56
  57u32
  58nvbios_P0260Ee(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len)
  59{
  60        u8  hdr, cnt, xnr, xsz;
  61        u32 data = nvbios_P0260Te(bios, ver, &hdr, &cnt, len, &xnr, &xsz);
  62        if (data && idx < cnt)
  63                return data + hdr + (idx * *len);
  64        return 0x00000000;
  65}
  66
  67u32
  68nvbios_P0260Ep(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len,
  69               struct nvbios_P0260E *info)
  70{
  71        u32 data = nvbios_P0260Ee(bios, idx, ver, len);
  72        memset(info, 0x00, sizeof(*info));
  73        switch (!!data * *ver) {
  74        case 0x10:
  75                info->data = nvbios_rd32(bios, data);
  76                return data;
  77        default:
  78                break;
  79        }
  80        return 0x00000000;
  81}
  82
  83u32
  84nvbios_P0260Xe(struct nvkm_bios *bios, int idx, u8 *ver, u8 *xsz)
  85{
  86        u8  hdr, cnt, len, xnr;
  87        u32 data = nvbios_P0260Te(bios, ver, &hdr, &cnt, &len, &xnr, xsz);
  88        if (data && idx < xnr)
  89                return data + hdr + (cnt * len) + (idx * *xsz);
  90        return 0x00000000;
  91}
  92
  93u32
  94nvbios_P0260Xp(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr,
  95               struct nvbios_P0260X *info)
  96{
  97        u32 data = nvbios_P0260Xe(bios, idx, ver, hdr);
  98        memset(info, 0x00, sizeof(*info));
  99        switch (!!data * *ver) {
 100        case 0x10:
 101                info->data = nvbios_rd32(bios, data);
 102                return data;
 103        default:
 104                break;
 105        }
 106        return 0x00000000;
 107}
 108