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28#include "vmwgfx_kms.h"
29#include "device_include/svga3d_surfacedefs.h"
30#include <drm/drm_plane_helper.h>
31#include <drm/drm_atomic.h>
32#include <drm/drm_atomic_helper.h>
33
34
35#define vmw_crtc_to_stdu(x) \
36 container_of(x, struct vmw_screen_target_display_unit, base.crtc)
37#define vmw_encoder_to_stdu(x) \
38 container_of(x, struct vmw_screen_target_display_unit, base.encoder)
39#define vmw_connector_to_stdu(x) \
40 container_of(x, struct vmw_screen_target_display_unit, base.connector)
41
42
43
44enum stdu_content_type {
45 SAME_AS_DISPLAY = 0,
46 SEPARATE_SURFACE,
47 SEPARATE_DMA
48};
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64struct vmw_stdu_dirty {
65 struct vmw_kms_dirty base;
66 SVGA3dTransferType transfer;
67 s32 left, right, top, bottom;
68 s32 fb_left, fb_top;
69 u32 pitch;
70 union {
71 struct vmw_dma_buffer *buf;
72 u32 sid;
73 };
74};
75
76
77
78
79
80struct vmw_stdu_update {
81 SVGA3dCmdHeader header;
82 SVGA3dCmdUpdateGBScreenTarget body;
83};
84
85struct vmw_stdu_dma {
86 SVGA3dCmdHeader header;
87 SVGA3dCmdSurfaceDMA body;
88};
89
90struct vmw_stdu_surface_copy {
91 SVGA3dCmdHeader header;
92 SVGA3dCmdSurfaceCopy body;
93};
94
95
96
97
98
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100
101
102
103
104
105
106
107
108struct vmw_screen_target_display_unit {
109 struct vmw_display_unit base;
110 const struct vmw_surface *display_srf;
111 enum stdu_content_type content_fb_type;
112 s32 display_width, display_height;
113
114 bool defined;
115
116
117 struct ttm_bo_kmap_obj host_map, guest_map;
118 unsigned int cpp;
119};
120
121
122
123static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
124
125
126
127
128
129
130
131
132
133
134
135
136
137static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
138{
139 vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
140}
141
142
143
144
145
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147
148
149
150
151
152
153
154
155
156
157static int vmw_stdu_define_st(struct vmw_private *dev_priv,
158 struct vmw_screen_target_display_unit *stdu,
159 struct drm_display_mode *mode,
160 int crtc_x, int crtc_y)
161{
162 struct {
163 SVGA3dCmdHeader header;
164 SVGA3dCmdDefineGBScreenTarget body;
165 } *cmd;
166
167 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
168
169 if (unlikely(cmd == NULL)) {
170 DRM_ERROR("Out of FIFO space defining Screen Target\n");
171 return -ENOMEM;
172 }
173
174 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
175 cmd->header.size = sizeof(cmd->body);
176
177 cmd->body.stid = stdu->base.unit;
178 cmd->body.width = mode->hdisplay;
179 cmd->body.height = mode->vdisplay;
180 cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
181 cmd->body.dpi = 0;
182 if (stdu->base.is_implicit) {
183 cmd->body.xRoot = crtc_x;
184 cmd->body.yRoot = crtc_y;
185 } else {
186 cmd->body.xRoot = stdu->base.gui_x;
187 cmd->body.yRoot = stdu->base.gui_y;
188 }
189 stdu->base.set_gui_x = cmd->body.xRoot;
190 stdu->base.set_gui_y = cmd->body.yRoot;
191
192 vmw_fifo_commit(dev_priv, sizeof(*cmd));
193
194 stdu->defined = true;
195 stdu->display_width = mode->hdisplay;
196 stdu->display_height = mode->vdisplay;
197
198 return 0;
199}
200
201
202
203
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205
206
207
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209
210
211
212static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
213 struct vmw_screen_target_display_unit *stdu,
214 const struct vmw_resource *res)
215{
216 SVGA3dSurfaceImageId image;
217
218 struct {
219 SVGA3dCmdHeader header;
220 SVGA3dCmdBindGBScreenTarget body;
221 } *cmd;
222
223
224 if (!stdu->defined) {
225 DRM_ERROR("No screen target defined\n");
226 return -EINVAL;
227 }
228
229
230 memset(&image, 0, sizeof(image));
231 image.sid = res ? res->id : SVGA3D_INVALID_ID;
232
233 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
234
235 if (unlikely(cmd == NULL)) {
236 DRM_ERROR("Out of FIFO space binding a screen target\n");
237 return -ENOMEM;
238 }
239
240 cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
241 cmd->header.size = sizeof(cmd->body);
242
243 cmd->body.stid = stdu->base.unit;
244 cmd->body.image = image;
245
246 vmw_fifo_commit(dev_priv, sizeof(*cmd));
247
248 return 0;
249}
250
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260
261
262static void vmw_stdu_populate_update(void *cmd, int unit,
263 s32 left, s32 right, s32 top, s32 bottom)
264{
265 struct vmw_stdu_update *update = cmd;
266
267 update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
268 update->header.size = sizeof(update->body);
269
270 update->body.stid = unit;
271 update->body.rect.x = left;
272 update->body.rect.y = top;
273 update->body.rect.w = right - left;
274 update->body.rect.h = bottom - top;
275}
276
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289
290static int vmw_stdu_update_st(struct vmw_private *dev_priv,
291 struct vmw_screen_target_display_unit *stdu)
292{
293 struct vmw_stdu_update *cmd;
294
295 if (!stdu->defined) {
296 DRM_ERROR("No screen target defined");
297 return -EINVAL;
298 }
299
300 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
301
302 if (unlikely(cmd == NULL)) {
303 DRM_ERROR("Out of FIFO space updating a Screen Target\n");
304 return -ENOMEM;
305 }
306
307 vmw_stdu_populate_update(cmd, stdu->base.unit,
308 0, stdu->display_width,
309 0, stdu->display_height);
310
311 vmw_fifo_commit(dev_priv, sizeof(*cmd));
312
313 return 0;
314}
315
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321
322
323
324static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
325 struct vmw_screen_target_display_unit *stdu)
326{
327 int ret;
328
329 struct {
330 SVGA3dCmdHeader header;
331 SVGA3dCmdDestroyGBScreenTarget body;
332 } *cmd;
333
334
335
336 if (unlikely(!stdu->defined))
337 return 0;
338
339 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
340
341 if (unlikely(cmd == NULL)) {
342 DRM_ERROR("Out of FIFO space, screen target not destroyed\n");
343 return -ENOMEM;
344 }
345
346 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
347 cmd->header.size = sizeof(cmd->body);
348
349 cmd->body.stid = stdu->base.unit;
350
351 vmw_fifo_commit(dev_priv, sizeof(*cmd));
352
353
354 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
355 if (unlikely(ret != 0))
356 DRM_ERROR("Failed to sync with HW");
357
358 stdu->defined = false;
359 stdu->display_width = 0;
360 stdu->display_height = 0;
361
362 return ret;
363}
364
365
366
367
368
369
370
371
372
373
374static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
375{
376 struct vmw_private *dev_priv;
377 struct vmw_screen_target_display_unit *stdu;
378 int ret;
379
380
381 stdu = vmw_crtc_to_stdu(crtc);
382 dev_priv = vmw_priv(crtc->dev);
383
384 if (stdu->defined) {
385 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
386 if (ret)
387 DRM_ERROR("Failed to blank CRTC\n");
388
389 (void) vmw_stdu_update_st(dev_priv, stdu);
390
391 ret = vmw_stdu_destroy_st(dev_priv, stdu);
392 if (ret)
393 DRM_ERROR("Failed to destroy Screen Target\n");
394
395 stdu->content_fb_type = SAME_AS_DISPLAY;
396 }
397
398 if (!crtc->state->enable)
399 return;
400
401 vmw_svga_enable(dev_priv);
402 ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, crtc->x, crtc->y);
403
404 if (ret)
405 DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
406 crtc->x, crtc->y);
407}
408
409
410static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
411{
412}
413
414
415static void vmw_stdu_crtc_helper_commit(struct drm_crtc *crtc)
416{
417 struct vmw_private *dev_priv;
418 struct vmw_screen_target_display_unit *stdu;
419 struct vmw_framebuffer *vfb;
420 struct drm_framebuffer *fb;
421
422
423 stdu = vmw_crtc_to_stdu(crtc);
424 dev_priv = vmw_priv(crtc->dev);
425 fb = crtc->primary->fb;
426
427 vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL;
428
429 if (vfb)
430 vmw_kms_add_active(dev_priv, &stdu->base, vfb);
431 else
432 vmw_kms_del_active(dev_priv, &stdu->base);
433}
434
435static void vmw_stdu_crtc_helper_disable(struct drm_crtc *crtc)
436{
437 struct vmw_private *dev_priv;
438 struct vmw_screen_target_display_unit *stdu;
439 int ret;
440
441
442 if (!crtc) {
443 DRM_ERROR("CRTC is NULL\n");
444 return;
445 }
446
447 stdu = vmw_crtc_to_stdu(crtc);
448 dev_priv = vmw_priv(crtc->dev);
449
450 if (stdu->defined) {
451 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
452 if (ret)
453 DRM_ERROR("Failed to blank CRTC\n");
454
455 (void) vmw_stdu_update_st(dev_priv, stdu);
456
457 ret = vmw_stdu_destroy_st(dev_priv, stdu);
458 if (ret)
459 DRM_ERROR("Failed to destroy Screen Target\n");
460
461 stdu->content_fb_type = SAME_AS_DISPLAY;
462 }
463}
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483
484static int vmw_stdu_crtc_page_flip(struct drm_crtc *crtc,
485 struct drm_framebuffer *new_fb,
486 struct drm_pending_vblank_event *event,
487 uint32_t flags,
488 struct drm_modeset_acquire_ctx *ctx)
489
490{
491 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
492 struct vmw_screen_target_display_unit *stdu = vmw_crtc_to_stdu(crtc);
493 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(new_fb);
494 struct drm_vmw_rect vclips;
495 int ret;
496
497 dev_priv = vmw_priv(crtc->dev);
498 stdu = vmw_crtc_to_stdu(crtc);
499
500 if (!stdu->defined || !vmw_kms_crtc_flippable(dev_priv, crtc))
501 return -EINVAL;
502
503
504
505
506
507
508
509
510 flags &= ~DRM_MODE_PAGE_FLIP_ASYNC;
511 ret = drm_atomic_helper_page_flip(crtc, new_fb, NULL, flags, ctx);
512 if (ret) {
513 DRM_ERROR("Page flip error %d.\n", ret);
514 return ret;
515 }
516
517 if (stdu->base.is_implicit)
518 vmw_kms_update_implicit_fb(dev_priv, crtc);
519
520
521
522
523
524 vclips.x = crtc->x;
525 vclips.y = crtc->y;
526 vclips.w = crtc->mode.hdisplay;
527 vclips.h = crtc->mode.vdisplay;
528
529 if (vfb->dmabuf)
530 ret = vmw_kms_stdu_dma(dev_priv, NULL, vfb, NULL, NULL, &vclips,
531 1, 1, true, false);
532 else
533 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, &vclips,
534 NULL, 0, 0, 1, 1, NULL);
535 if (ret) {
536 DRM_ERROR("Page flip update error %d.\n", ret);
537 return ret;
538 }
539
540 if (event) {
541 struct vmw_fence_obj *fence = NULL;
542 struct drm_file *file_priv = event->base.file_priv;
543
544 vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);
545 if (!fence)
546 return -ENOMEM;
547
548 ret = vmw_event_fence_action_queue(file_priv, fence,
549 &event->base,
550 &event->event.tv_sec,
551 &event->event.tv_usec,
552 true);
553 vmw_fence_obj_unreference(&fence);
554 } else {
555 (void) vmw_fifo_flush(dev_priv, false);
556 }
557
558 return 0;
559}
560
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568
569
570static void vmw_stdu_dmabuf_clip(struct vmw_kms_dirty *dirty)
571{
572 struct vmw_stdu_dirty *ddirty =
573 container_of(dirty, struct vmw_stdu_dirty, base);
574 struct vmw_stdu_dma *cmd = dirty->cmd;
575 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
576
577 blit += dirty->num_hits;
578 blit->srcx = dirty->fb_x;
579 blit->srcy = dirty->fb_y;
580 blit->x = dirty->unit_x1;
581 blit->y = dirty->unit_y1;
582 blit->d = 1;
583 blit->w = dirty->unit_x2 - dirty->unit_x1;
584 blit->h = dirty->unit_y2 - dirty->unit_y1;
585 dirty->num_hits++;
586
587 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
588 return;
589
590
591 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
592 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
593 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
594 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
595}
596
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601
602
603
604
605static void vmw_stdu_dmabuf_fifo_commit(struct vmw_kms_dirty *dirty)
606{
607 struct vmw_stdu_dirty *ddirty =
608 container_of(dirty, struct vmw_stdu_dirty, base);
609 struct vmw_screen_target_display_unit *stdu =
610 container_of(dirty->unit, typeof(*stdu), base);
611 struct vmw_stdu_dma *cmd = dirty->cmd;
612 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
613 SVGA3dCmdSurfaceDMASuffix *suffix =
614 (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
615 size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
616
617 if (!dirty->num_hits) {
618 vmw_fifo_commit(dirty->dev_priv, 0);
619 return;
620 }
621
622 cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
623 cmd->header.size = sizeof(cmd->body) + blit_size;
624 vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
625 cmd->body.guest.pitch = ddirty->pitch;
626 cmd->body.host.sid = stdu->display_srf->res.id;
627 cmd->body.host.face = 0;
628 cmd->body.host.mipmap = 0;
629 cmd->body.transfer = ddirty->transfer;
630 suffix->suffixSize = sizeof(*suffix);
631 suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
632
633 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
634 blit_size += sizeof(struct vmw_stdu_update);
635
636 vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
637 ddirty->left, ddirty->right,
638 ddirty->top, ddirty->bottom);
639 }
640
641 vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
642
643 ddirty->left = ddirty->top = S32_MAX;
644 ddirty->right = ddirty->bottom = S32_MIN;
645}
646
647
648
649
650
651
652
653
654
655static void vmw_stdu_dmabuf_cpu_clip(struct vmw_kms_dirty *dirty)
656{
657 struct vmw_stdu_dirty *ddirty =
658 container_of(dirty, struct vmw_stdu_dirty, base);
659
660 dirty->num_hits = 1;
661
662
663 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
664 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
665 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
666 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
667
668
669
670
671
672
673 ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
674 ddirty->fb_top = min_t(s32, ddirty->fb_top, dirty->fb_y);
675}
676
677
678
679
680
681
682
683
684
685
686static void vmw_stdu_dmabuf_cpu_commit(struct vmw_kms_dirty *dirty)
687{
688 struct vmw_stdu_dirty *ddirty =
689 container_of(dirty, struct vmw_stdu_dirty, base);
690 struct vmw_screen_target_display_unit *stdu =
691 container_of(dirty->unit, typeof(*stdu), base);
692 s32 width, height;
693 s32 src_pitch, dst_pitch;
694 u8 *src, *dst;
695 bool not_used;
696
697
698 if (!dirty->num_hits)
699 return;
700
701 width = ddirty->right - ddirty->left;
702 height = ddirty->bottom - ddirty->top;
703
704 if (width == 0 || height == 0)
705 return;
706
707
708
709 src_pitch = stdu->display_srf->base_size.width * stdu->cpp;
710 src = ttm_kmap_obj_virtual(&stdu->host_map, ¬_used);
711 src += ddirty->top * src_pitch + ddirty->left * stdu->cpp;
712
713 dst_pitch = ddirty->pitch;
714 dst = ttm_kmap_obj_virtual(&stdu->guest_map, ¬_used);
715 dst += ddirty->fb_top * dst_pitch + ddirty->fb_left * stdu->cpp;
716
717
718
719 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
720 u8 *tmp;
721 s32 tmp_pitch;
722
723 tmp = src;
724 tmp_pitch = src_pitch;
725
726 src = dst;
727 src_pitch = dst_pitch;
728
729 dst = tmp;
730 dst_pitch = tmp_pitch;
731 }
732
733
734 while (height-- > 0) {
735 memcpy(dst, src, width * stdu->cpp);
736 dst += dst_pitch;
737 src += src_pitch;
738 }
739
740 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
741 struct vmw_private *dev_priv;
742 struct vmw_stdu_update *cmd;
743 struct drm_clip_rect region;
744 int ret;
745
746
747 region.x1 = ddirty->left;
748 region.x2 = ddirty->right;
749 region.y1 = ddirty->top;
750 region.y2 = ddirty->bottom;
751 ret = vmw_kms_update_proxy(
752 (struct vmw_resource *) &stdu->display_srf->res,
753 (const struct drm_clip_rect *) ®ion, 1, 1);
754 if (ret)
755 goto out_cleanup;
756
757
758 dev_priv = vmw_priv(stdu->base.crtc.dev);
759 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
760
761 if (!cmd) {
762 DRM_ERROR("Cannot reserve FIFO space to update STDU");
763 goto out_cleanup;
764 }
765
766 vmw_stdu_populate_update(cmd, stdu->base.unit,
767 ddirty->left, ddirty->right,
768 ddirty->top, ddirty->bottom);
769
770 vmw_fifo_commit(dev_priv, sizeof(*cmd));
771 }
772
773out_cleanup:
774 ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
775 ddirty->right = ddirty->bottom = S32_MIN;
776}
777
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800
801int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
802 struct drm_file *file_priv,
803 struct vmw_framebuffer *vfb,
804 struct drm_vmw_fence_rep __user *user_fence_rep,
805 struct drm_clip_rect *clips,
806 struct drm_vmw_rect *vclips,
807 uint32_t num_clips,
808 int increment,
809 bool to_surface,
810 bool interruptible)
811{
812 struct vmw_dma_buffer *buf =
813 container_of(vfb, struct vmw_framebuffer_dmabuf, base)->buffer;
814 struct vmw_stdu_dirty ddirty;
815 int ret;
816
817 ret = vmw_kms_helper_buffer_prepare(dev_priv, buf, interruptible,
818 false);
819 if (ret)
820 return ret;
821
822 ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
823 SVGA3D_READ_HOST_VRAM;
824 ddirty.left = ddirty.top = S32_MAX;
825 ddirty.right = ddirty.bottom = S32_MIN;
826 ddirty.fb_left = ddirty.fb_top = S32_MAX;
827 ddirty.pitch = vfb->base.pitches[0];
828 ddirty.buf = buf;
829 ddirty.base.fifo_commit = vmw_stdu_dmabuf_fifo_commit;
830 ddirty.base.clip = vmw_stdu_dmabuf_clip;
831 ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
832 num_clips * sizeof(SVGA3dCopyBox) +
833 sizeof(SVGA3dCmdSurfaceDMASuffix);
834 if (to_surface)
835 ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
836
837
838 if (!(dev_priv->capabilities & SVGA_CAP_3D)) {
839 ddirty.base.fifo_commit = vmw_stdu_dmabuf_cpu_commit;
840 ddirty.base.clip = vmw_stdu_dmabuf_cpu_clip;
841 ddirty.base.fifo_reserve_size = 0;
842 }
843
844 ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
845 0, 0, num_clips, increment, &ddirty.base);
846 vmw_kms_helper_buffer_finish(dev_priv, file_priv, buf, NULL,
847 user_fence_rep);
848
849 return ret;
850}
851
852
853
854
855
856
857
858
859
860static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
861{
862 struct vmw_stdu_dirty *sdirty =
863 container_of(dirty, struct vmw_stdu_dirty, base);
864 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
865 struct vmw_screen_target_display_unit *stdu =
866 container_of(dirty->unit, typeof(*stdu), base);
867
868 if (sdirty->sid != stdu->display_srf->res.id) {
869 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
870
871 blit += dirty->num_hits;
872 blit->srcx = dirty->fb_x;
873 blit->srcy = dirty->fb_y;
874 blit->x = dirty->unit_x1;
875 blit->y = dirty->unit_y1;
876 blit->d = 1;
877 blit->w = dirty->unit_x2 - dirty->unit_x1;
878 blit->h = dirty->unit_y2 - dirty->unit_y1;
879 }
880
881 dirty->num_hits++;
882
883
884 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
885 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
886 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
887 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
888}
889
890
891
892
893
894
895
896
897
898
899static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
900{
901 struct vmw_stdu_dirty *sdirty =
902 container_of(dirty, struct vmw_stdu_dirty, base);
903 struct vmw_screen_target_display_unit *stdu =
904 container_of(dirty->unit, typeof(*stdu), base);
905 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
906 struct vmw_stdu_update *update;
907 size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
908 size_t commit_size;
909
910 if (!dirty->num_hits) {
911 vmw_fifo_commit(dirty->dev_priv, 0);
912 return;
913 }
914
915 if (sdirty->sid != stdu->display_srf->res.id) {
916 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
917
918 cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
919 cmd->header.size = sizeof(cmd->body) + blit_size;
920 cmd->body.src.sid = sdirty->sid;
921 cmd->body.dest.sid = stdu->display_srf->res.id;
922 update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
923 commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
924 } else {
925 update = dirty->cmd;
926 commit_size = sizeof(*update);
927 }
928
929 vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
930 sdirty->right, sdirty->top, sdirty->bottom);
931
932 vmw_fifo_commit(dirty->dev_priv, commit_size);
933
934 sdirty->left = sdirty->top = S32_MAX;
935 sdirty->right = sdirty->bottom = S32_MIN;
936}
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
960 struct vmw_framebuffer *framebuffer,
961 struct drm_clip_rect *clips,
962 struct drm_vmw_rect *vclips,
963 struct vmw_resource *srf,
964 s32 dest_x,
965 s32 dest_y,
966 unsigned num_clips, int inc,
967 struct vmw_fence_obj **out_fence)
968{
969 struct vmw_framebuffer_surface *vfbs =
970 container_of(framebuffer, typeof(*vfbs), base);
971 struct vmw_stdu_dirty sdirty;
972 int ret;
973
974 if (!srf)
975 srf = &vfbs->surface->res;
976
977 ret = vmw_kms_helper_resource_prepare(srf, true);
978 if (ret)
979 return ret;
980
981 if (vfbs->is_dmabuf_proxy) {
982 ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
983 if (ret)
984 goto out_finish;
985 }
986
987 sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
988 sdirty.base.clip = vmw_kms_stdu_surface_clip;
989 sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
990 sizeof(SVGA3dCopyBox) * num_clips +
991 sizeof(struct vmw_stdu_update);
992 sdirty.sid = srf->id;
993 sdirty.left = sdirty.top = S32_MAX;
994 sdirty.right = sdirty.bottom = S32_MIN;
995
996 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
997 dest_x, dest_y, num_clips, inc,
998 &sdirty.base);
999out_finish:
1000 vmw_kms_helper_resource_finish(srf, out_fence);
1001
1002 return ret;
1003}
1004
1005
1006
1007
1008
1009static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
1010 .gamma_set = vmw_du_crtc_gamma_set,
1011 .destroy = vmw_stdu_crtc_destroy,
1012 .reset = vmw_du_crtc_reset,
1013 .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
1014 .atomic_destroy_state = vmw_du_crtc_destroy_state,
1015 .set_config = vmw_kms_set_config,
1016 .page_flip = vmw_stdu_crtc_page_flip,
1017};
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
1036{
1037 vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
1038}
1039
1040static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
1041 .destroy = vmw_stdu_encoder_destroy,
1042};
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060static void vmw_stdu_connector_destroy(struct drm_connector *connector)
1061{
1062 vmw_stdu_destroy(vmw_connector_to_stdu(connector));
1063}
1064
1065
1066
1067static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
1068 .dpms = vmw_du_connector_dpms,
1069 .detect = vmw_du_connector_detect,
1070 .fill_modes = vmw_du_connector_fill_modes,
1071 .set_property = vmw_du_connector_set_property,
1072 .destroy = vmw_stdu_connector_destroy,
1073 .reset = vmw_du_connector_reset,
1074 .atomic_duplicate_state = vmw_du_connector_duplicate_state,
1075 .atomic_destroy_state = vmw_du_connector_destroy_state,
1076 .atomic_set_property = vmw_du_connector_atomic_set_property,
1077 .atomic_get_property = vmw_du_connector_atomic_get_property,
1078};
1079
1080
1081static const struct
1082drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
1083 .best_encoder = drm_atomic_helper_best_encoder,
1084};
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104static void
1105vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1106 struct drm_plane_state *old_state)
1107{
1108 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1109
1110 if (vps->guest_map.virtual)
1111 ttm_bo_kunmap(&vps->guest_map);
1112
1113 if (vps->host_map.virtual)
1114 ttm_bo_kunmap(&vps->host_map);
1115
1116 if (vps->surf)
1117 WARN_ON(!vps->pinned);
1118
1119 vmw_du_plane_cleanup_fb(plane, old_state);
1120
1121 vps->content_fb_type = SAME_AS_DISPLAY;
1122 vps->cpp = 0;
1123}
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139static int
1140vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1141 struct drm_plane_state *new_state)
1142{
1143 struct vmw_private *dev_priv = vmw_priv(plane->dev);
1144 struct drm_framebuffer *new_fb = new_state->fb;
1145 struct vmw_framebuffer *vfb;
1146 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1147 enum stdu_content_type new_content_type;
1148 struct vmw_framebuffer_surface *new_vfbs;
1149 struct drm_crtc *crtc = new_state->crtc;
1150 uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1151 int ret;
1152
1153
1154 if (!new_fb) {
1155 if (vps->surf) {
1156 WARN_ON(vps->pinned != 0);
1157 vmw_surface_unreference(&vps->surf);
1158 }
1159
1160 return 0;
1161 }
1162
1163 vfb = vmw_framebuffer_to_vfb(new_fb);
1164 new_vfbs = (vfb->dmabuf) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1165
1166 if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay &&
1167 new_vfbs->surface->base_size.height == vdisplay)
1168 new_content_type = SAME_AS_DISPLAY;
1169 else if (vfb->dmabuf)
1170 new_content_type = SEPARATE_DMA;
1171 else
1172 new_content_type = SEPARATE_SURFACE;
1173
1174 if (new_content_type != SAME_AS_DISPLAY) {
1175 struct vmw_surface content_srf;
1176 struct drm_vmw_size display_base_size = {0};
1177
1178 display_base_size.width = hdisplay;
1179 display_base_size.height = vdisplay;
1180 display_base_size.depth = 1;
1181
1182
1183
1184
1185
1186 if (new_content_type == SEPARATE_DMA) {
1187
1188 switch (new_fb->format->cpp[0]*8) {
1189 case 32:
1190 content_srf.format = SVGA3D_X8R8G8B8;
1191 break;
1192
1193 case 16:
1194 content_srf.format = SVGA3D_R5G6B5;
1195 break;
1196
1197 case 8:
1198 content_srf.format = SVGA3D_P8;
1199 break;
1200
1201 default:
1202 DRM_ERROR("Invalid format\n");
1203 return -EINVAL;
1204 }
1205
1206 content_srf.flags = 0;
1207 content_srf.mip_levels[0] = 1;
1208 content_srf.multisample_count = 0;
1209 } else {
1210 content_srf = *new_vfbs->surface;
1211 }
1212
1213 if (vps->surf) {
1214 struct drm_vmw_size cur_base_size = vps->surf->base_size;
1215
1216 if (cur_base_size.width != display_base_size.width ||
1217 cur_base_size.height != display_base_size.height ||
1218 vps->surf->format != content_srf.format) {
1219 WARN_ON(vps->pinned != 0);
1220 vmw_surface_unreference(&vps->surf);
1221 }
1222
1223 }
1224
1225 if (!vps->surf) {
1226 ret = vmw_surface_gb_priv_define
1227 (crtc->dev,
1228
1229 0,
1230 content_srf.flags,
1231 content_srf.format,
1232 true,
1233 content_srf.mip_levels[0],
1234 content_srf.multisample_count,
1235 0,
1236 display_base_size,
1237 &vps->surf);
1238 if (ret != 0) {
1239 DRM_ERROR("Couldn't allocate STDU surface.\n");
1240 return ret;
1241 }
1242 }
1243 } else {
1244
1245
1246
1247
1248
1249
1250 if (vps->surf) {
1251 WARN_ON(vps->pinned != 0);
1252 vmw_surface_unreference(&vps->surf);
1253 }
1254
1255 vps->surf = vmw_surface_reference(new_vfbs->surface);
1256 }
1257
1258 if (vps->surf) {
1259
1260
1261 ret = vmw_resource_pin(&vps->surf->res, false);
1262 if (ret)
1263 goto out_srf_unref;
1264
1265 vps->pinned++;
1266 }
1267
1268 vps->content_fb_type = new_content_type;
1269
1270
1271
1272
1273
1274
1275
1276 if (vps->content_fb_type == SEPARATE_DMA &&
1277 !(dev_priv->capabilities & SVGA_CAP_3D)) {
1278
1279 struct vmw_framebuffer_dmabuf *new_vfbd;
1280
1281 new_vfbd = vmw_framebuffer_to_vfbd(new_fb);
1282
1283 ret = ttm_bo_reserve(&new_vfbd->buffer->base, false, false,
1284 NULL);
1285 if (ret)
1286 goto out_srf_unpin;
1287
1288 ret = ttm_bo_kmap(&new_vfbd->buffer->base, 0,
1289 new_vfbd->buffer->base.num_pages,
1290 &vps->guest_map);
1291
1292 ttm_bo_unreserve(&new_vfbd->buffer->base);
1293
1294 if (ret) {
1295 DRM_ERROR("Failed to map content buffer to CPU\n");
1296 goto out_srf_unpin;
1297 }
1298
1299 ret = ttm_bo_kmap(&vps->surf->res.backup->base, 0,
1300 vps->surf->res.backup->base.num_pages,
1301 &vps->host_map);
1302 if (ret) {
1303 DRM_ERROR("Failed to map display buffer to CPU\n");
1304 ttm_bo_kunmap(&vps->guest_map);
1305 goto out_srf_unpin;
1306 }
1307
1308 vps->cpp = new_fb->pitches[0] / new_fb->width;
1309 }
1310
1311 return 0;
1312
1313out_srf_unpin:
1314 vmw_resource_unpin(&vps->surf->res);
1315 vps->pinned--;
1316
1317out_srf_unref:
1318 vmw_surface_unreference(&vps->surf);
1319 return ret;
1320}
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335static void
1336vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1337 struct drm_plane_state *old_state)
1338{
1339 struct vmw_private *dev_priv;
1340 struct vmw_screen_target_display_unit *stdu;
1341 struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
1342 struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc;
1343 int ret;
1344
1345 stdu = vmw_crtc_to_stdu(crtc);
1346 dev_priv = vmw_priv(crtc->dev);
1347
1348 stdu->display_srf = vps->surf;
1349 stdu->content_fb_type = vps->content_fb_type;
1350 stdu->cpp = vps->cpp;
1351 memcpy(&stdu->guest_map, &vps->guest_map, sizeof(vps->guest_map));
1352 memcpy(&stdu->host_map, &vps->host_map, sizeof(vps->host_map));
1353
1354 if (!stdu->defined)
1355 return;
1356
1357 if (plane->state->fb)
1358 ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1359 else
1360 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1361
1362
1363
1364
1365
1366 if (ret)
1367 DRM_ERROR("Failed to bind surface to STDU.\n");
1368 else
1369 crtc->primary->fb = plane->state->fb;
1370
1371 ret = vmw_stdu_update_st(dev_priv, stdu);
1372
1373 if (ret)
1374 DRM_ERROR("Failed to update STDU.\n");
1375}
1376
1377
1378static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
1379 .update_plane = drm_atomic_helper_update_plane,
1380 .disable_plane = drm_atomic_helper_disable_plane,
1381 .destroy = vmw_du_primary_plane_destroy,
1382 .reset = vmw_du_plane_reset,
1383 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1384 .atomic_destroy_state = vmw_du_plane_destroy_state,
1385};
1386
1387static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
1388 .update_plane = drm_atomic_helper_update_plane,
1389 .disable_plane = drm_atomic_helper_disable_plane,
1390 .destroy = vmw_du_cursor_plane_destroy,
1391 .reset = vmw_du_plane_reset,
1392 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1393 .atomic_destroy_state = vmw_du_plane_destroy_state,
1394};
1395
1396
1397
1398
1399
1400static const struct
1401drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1402 .atomic_check = vmw_du_cursor_plane_atomic_check,
1403 .atomic_update = vmw_du_cursor_plane_atomic_update,
1404 .prepare_fb = vmw_du_cursor_plane_prepare_fb,
1405 .cleanup_fb = vmw_du_plane_cleanup_fb,
1406};
1407
1408static const struct
1409drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1410 .atomic_check = vmw_du_primary_plane_atomic_check,
1411 .atomic_update = vmw_stdu_primary_plane_atomic_update,
1412 .prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1413 .cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1414};
1415
1416static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1417 .prepare = vmw_stdu_crtc_helper_prepare,
1418 .commit = vmw_stdu_crtc_helper_commit,
1419 .disable = vmw_stdu_crtc_helper_disable,
1420 .mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1421 .atomic_check = vmw_du_crtc_atomic_check,
1422 .atomic_begin = vmw_du_crtc_atomic_begin,
1423 .atomic_flush = vmw_du_crtc_atomic_flush,
1424};
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1438{
1439 struct vmw_screen_target_display_unit *stdu;
1440 struct drm_device *dev = dev_priv->dev;
1441 struct drm_connector *connector;
1442 struct drm_encoder *encoder;
1443 struct drm_plane *primary, *cursor;
1444 struct drm_crtc *crtc;
1445 int ret;
1446
1447
1448 stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1449 if (!stdu)
1450 return -ENOMEM;
1451
1452 stdu->base.unit = unit;
1453 crtc = &stdu->base.crtc;
1454 encoder = &stdu->base.encoder;
1455 connector = &stdu->base.connector;
1456 primary = &stdu->base.primary;
1457 cursor = &stdu->base.cursor;
1458
1459 stdu->base.pref_active = (unit == 0);
1460 stdu->base.pref_width = dev_priv->initial_width;
1461 stdu->base.pref_height = dev_priv->initial_height;
1462
1463
1464
1465
1466
1467 stdu->base.is_implicit = false;
1468
1469
1470 vmw_du_plane_reset(primary);
1471
1472 ret = drm_universal_plane_init(dev, primary,
1473 0, &vmw_stdu_plane_funcs,
1474 vmw_primary_plane_formats,
1475 ARRAY_SIZE(vmw_primary_plane_formats),
1476 DRM_PLANE_TYPE_PRIMARY, NULL);
1477 if (ret) {
1478 DRM_ERROR("Failed to initialize primary plane");
1479 goto err_free;
1480 }
1481
1482 drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1483
1484
1485 vmw_du_plane_reset(cursor);
1486
1487 ret = drm_universal_plane_init(dev, cursor,
1488 0, &vmw_stdu_cursor_funcs,
1489 vmw_cursor_plane_formats,
1490 ARRAY_SIZE(vmw_cursor_plane_formats),
1491 DRM_PLANE_TYPE_CURSOR, NULL);
1492 if (ret) {
1493 DRM_ERROR("Failed to initialize cursor plane");
1494 drm_plane_cleanup(&stdu->base.primary);
1495 goto err_free;
1496 }
1497
1498 drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs);
1499
1500 vmw_du_connector_reset(connector);
1501
1502 ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1503 DRM_MODE_CONNECTOR_VIRTUAL);
1504 if (ret) {
1505 DRM_ERROR("Failed to initialize connector\n");
1506 goto err_free;
1507 }
1508
1509 drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
1510 connector->status = vmw_du_connector_detect(connector, false);
1511 vmw_connector_state_to_vcs(connector->state)->is_implicit = false;
1512
1513 ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1514 DRM_MODE_ENCODER_VIRTUAL, NULL);
1515 if (ret) {
1516 DRM_ERROR("Failed to initialize encoder\n");
1517 goto err_free_connector;
1518 }
1519
1520 (void) drm_mode_connector_attach_encoder(connector, encoder);
1521 encoder->possible_crtcs = (1 << unit);
1522 encoder->possible_clones = 0;
1523
1524 ret = drm_connector_register(connector);
1525 if (ret) {
1526 DRM_ERROR("Failed to register connector\n");
1527 goto err_free_encoder;
1528 }
1529
1530 vmw_du_crtc_reset(crtc);
1531 ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary,
1532 &stdu->base.cursor,
1533 &vmw_stdu_crtc_funcs, NULL);
1534 if (ret) {
1535 DRM_ERROR("Failed to initialize CRTC\n");
1536 goto err_free_unregister;
1537 }
1538
1539 drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1540
1541 drm_mode_crtc_set_gamma_size(crtc, 256);
1542
1543 drm_object_attach_property(&connector->base,
1544 dev_priv->hotplug_mode_update_property, 1);
1545 drm_object_attach_property(&connector->base,
1546 dev->mode_config.suggested_x_property, 0);
1547 drm_object_attach_property(&connector->base,
1548 dev->mode_config.suggested_y_property, 0);
1549 if (dev_priv->implicit_placement_property)
1550 drm_object_attach_property
1551 (&connector->base,
1552 dev_priv->implicit_placement_property,
1553 stdu->base.is_implicit);
1554 return 0;
1555
1556err_free_unregister:
1557 drm_connector_unregister(connector);
1558err_free_encoder:
1559 drm_encoder_cleanup(encoder);
1560err_free_connector:
1561 drm_connector_cleanup(connector);
1562err_free:
1563 kfree(stdu);
1564 return ret;
1565}
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1577{
1578 vmw_du_cleanup(&stdu->base);
1579 kfree(stdu);
1580}
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1604{
1605 struct drm_device *dev = dev_priv->dev;
1606 int i, ret;
1607
1608
1609
1610 if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
1611 return -ENOSYS;
1612
1613 if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
1614 return -ENOSYS;
1615
1616 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
1617 if (unlikely(ret != 0))
1618 return ret;
1619
1620 dev_priv->active_display_unit = vmw_du_screen_target;
1621
1622 if (dev_priv->capabilities & SVGA_CAP_3D) {
1623
1624
1625
1626
1627 uint32_t max_width, max_height;
1628
1629 max_width = min(dev_priv->texture_max_width,
1630 dev_priv->stdu_max_width);
1631 max_height = min(dev_priv->texture_max_height,
1632 dev_priv->stdu_max_height);
1633
1634 dev->mode_config.max_width = max_width;
1635 dev->mode_config.max_height = max_height;
1636 } else {
1637
1638
1639
1640
1641
1642
1643 dev->mode_config.max_width = 8192;
1644 dev->mode_config.max_height = 8192;
1645 }
1646
1647 vmw_kms_create_implicit_placement_property(dev_priv, false);
1648
1649 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1650 ret = vmw_stdu_init(dev_priv, i);
1651
1652 if (unlikely(ret != 0)) {
1653 DRM_ERROR("Failed to initialize STDU %d", i);
1654 goto err_vblank_cleanup;
1655 }
1656 }
1657
1658 DRM_INFO("Screen Target Display device initialized\n");
1659
1660 return 0;
1661
1662err_vblank_cleanup:
1663 drm_vblank_cleanup(dev);
1664 return ret;
1665}
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679int vmw_kms_stdu_close_display(struct vmw_private *dev_priv)
1680{
1681 struct drm_device *dev = dev_priv->dev;
1682
1683 drm_vblank_cleanup(dev);
1684
1685 return 0;
1686}
1687