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23#include <linux/module.h>
24#include <linux/platform_device.h>
25#include <linux/interrupt.h>
26#include <linux/device.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/io.h>
30#include <linux/clk.h>
31#include <linux/err.h>
32#include <linux/completion.h>
33#include <linux/of.h>
34
35#include <linux/iio/iio.h>
36#include <linux/iio/sysfs.h>
37
38
39
40
41#define LPC32XXAD_SELECT(x) ((x) + 0x04)
42#define LPC32XXAD_CTRL(x) ((x) + 0x08)
43#define LPC32XXAD_VALUE(x) ((x) + 0x48)
44
45
46
47#define LPC32XXAD_REFm 0x00000200
48
49#define LPC32XXAD_REFp 0x00000080
50
51#define LPC32XXAD_IN 0x00000010
52
53#define LPC32XXAD_INTERNAL 0x00000004
54
55
56#define LPC32XXAD_STROBE 0x00000002
57#define LPC32XXAD_PDN_CTRL 0x00000004
58
59
60#define LPC32XXAD_VALUE_MASK 0x000003FF
61
62#define LPC32XXAD_NAME "lpc32xx-adc"
63
64struct lpc32xx_adc_state {
65 void __iomem *adc_base;
66 struct clk *clk;
67 struct completion completion;
68
69 u32 value;
70};
71
72static int lpc32xx_read_raw(struct iio_dev *indio_dev,
73 struct iio_chan_spec const *chan,
74 int *val,
75 int *val2,
76 long mask)
77{
78 struct lpc32xx_adc_state *st = iio_priv(indio_dev);
79 int ret;
80 if (mask == IIO_CHAN_INFO_RAW) {
81 mutex_lock(&indio_dev->mlock);
82 ret = clk_prepare_enable(st->clk);
83 if (ret) {
84 mutex_unlock(&indio_dev->mlock);
85 return ret;
86 }
87
88 __raw_writel(LPC32XXAD_INTERNAL | (chan->address) |
89 LPC32XXAD_REFp | LPC32XXAD_REFm,
90 LPC32XXAD_SELECT(st->adc_base));
91
92 __raw_writel(LPC32XXAD_PDN_CTRL | LPC32XXAD_STROBE,
93 LPC32XXAD_CTRL(st->adc_base));
94 wait_for_completion(&st->completion);
95 clk_disable_unprepare(st->clk);
96 *val = st->value;
97 mutex_unlock(&indio_dev->mlock);
98
99 return IIO_VAL_INT;
100 }
101
102 return -EINVAL;
103}
104
105static const struct iio_info lpc32xx_adc_iio_info = {
106 .read_raw = &lpc32xx_read_raw,
107 .driver_module = THIS_MODULE,
108};
109
110#define LPC32XX_ADC_CHANNEL(_index) { \
111 .type = IIO_VOLTAGE, \
112 .indexed = 1, \
113 .channel = _index, \
114 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
115 .address = LPC32XXAD_IN * _index, \
116 .scan_index = _index, \
117}
118
119static const struct iio_chan_spec lpc32xx_adc_iio_channels[] = {
120 LPC32XX_ADC_CHANNEL(0),
121 LPC32XX_ADC_CHANNEL(1),
122 LPC32XX_ADC_CHANNEL(2),
123};
124
125static irqreturn_t lpc32xx_adc_isr(int irq, void *dev_id)
126{
127 struct lpc32xx_adc_state *st = dev_id;
128
129
130 st->value = __raw_readl(LPC32XXAD_VALUE(st->adc_base)) &
131 LPC32XXAD_VALUE_MASK;
132 complete(&st->completion);
133
134 return IRQ_HANDLED;
135}
136
137static int lpc32xx_adc_probe(struct platform_device *pdev)
138{
139 struct lpc32xx_adc_state *st = NULL;
140 struct resource *res;
141 int retval = -ENODEV;
142 struct iio_dev *iodev = NULL;
143 int irq;
144
145 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
146 if (!res) {
147 dev_err(&pdev->dev, "failed to get platform I/O memory\n");
148 return -ENXIO;
149 }
150
151 iodev = devm_iio_device_alloc(&pdev->dev, sizeof(*st));
152 if (!iodev)
153 return -ENOMEM;
154
155 st = iio_priv(iodev);
156
157 st->adc_base = devm_ioremap(&pdev->dev, res->start,
158 resource_size(res));
159 if (!st->adc_base) {
160 dev_err(&pdev->dev, "failed mapping memory\n");
161 return -EBUSY;
162 }
163
164 st->clk = devm_clk_get(&pdev->dev, NULL);
165 if (IS_ERR(st->clk)) {
166 dev_err(&pdev->dev, "failed getting clock\n");
167 return PTR_ERR(st->clk);
168 }
169
170 irq = platform_get_irq(pdev, 0);
171 if (irq <= 0) {
172 dev_err(&pdev->dev, "failed getting interrupt resource\n");
173 return -ENXIO;
174 }
175
176 retval = devm_request_irq(&pdev->dev, irq, lpc32xx_adc_isr, 0,
177 LPC32XXAD_NAME, st);
178 if (retval < 0) {
179 dev_err(&pdev->dev, "failed requesting interrupt\n");
180 return retval;
181 }
182
183 platform_set_drvdata(pdev, iodev);
184
185 init_completion(&st->completion);
186
187 iodev->name = LPC32XXAD_NAME;
188 iodev->dev.parent = &pdev->dev;
189 iodev->info = &lpc32xx_adc_iio_info;
190 iodev->modes = INDIO_DIRECT_MODE;
191 iodev->channels = lpc32xx_adc_iio_channels;
192 iodev->num_channels = ARRAY_SIZE(lpc32xx_adc_iio_channels);
193
194 retval = devm_iio_device_register(&pdev->dev, iodev);
195 if (retval)
196 return retval;
197
198 dev_info(&pdev->dev, "LPC32XX ADC driver loaded, IRQ %d\n", irq);
199
200 return 0;
201}
202
203#ifdef CONFIG_OF
204static const struct of_device_id lpc32xx_adc_match[] = {
205 { .compatible = "nxp,lpc3220-adc" },
206 {},
207};
208MODULE_DEVICE_TABLE(of, lpc32xx_adc_match);
209#endif
210
211static struct platform_driver lpc32xx_adc_driver = {
212 .probe = lpc32xx_adc_probe,
213 .driver = {
214 .name = LPC32XXAD_NAME,
215 .of_match_table = of_match_ptr(lpc32xx_adc_match),
216 },
217};
218
219module_platform_driver(lpc32xx_adc_driver);
220
221MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>");
222MODULE_DESCRIPTION("LPC32XX ADC driver");
223MODULE_LICENSE("GPL");
224
