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17#include <linux/delay.h>
18#include <linux/i2c.h>
19#include <linux/input.h>
20#include <linux/input/mt.h>
21#include <linux/module.h>
22#include <linux/slab.h>
23#include <asm/unaligned.h>
24#include "cyapa.h"
25
26
27#define GEN3_MAX_FINGERS 5
28#define GEN3_FINGER_NUM(x) (((x) >> 4) & 0x07)
29
30#define BLK_HEAD_BYTES 32
31
32
33#define PRODUCT_ID_SIZE 16
34#define QUERY_DATA_SIZE 27
35#define REG_PROTOCOL_GEN_QUERY_OFFSET 20
36
37#define REG_OFFSET_DATA_BASE 0x0000
38#define REG_OFFSET_COMMAND_BASE 0x0028
39#define REG_OFFSET_QUERY_BASE 0x002a
40
41#define CYAPA_OFFSET_SOFT_RESET REG_OFFSET_COMMAND_BASE
42#define OP_RECALIBRATION_MASK 0x80
43#define OP_REPORT_BASELINE_MASK 0x40
44#define REG_OFFSET_MAX_BASELINE 0x0026
45#define REG_OFFSET_MIN_BASELINE 0x0027
46
47#define REG_OFFSET_POWER_MODE (REG_OFFSET_COMMAND_BASE + 1)
48#define SET_POWER_MODE_DELAY 10000
49#define SET_POWER_MODE_TRIES 5
50
51#define GEN3_BL_CMD_CHECKSUM_SEED 0xff
52#define GEN3_BL_CMD_INITIATE_BL 0x38
53#define GEN3_BL_CMD_WRITE_BLOCK 0x39
54#define GEN3_BL_CMD_VERIFY_BLOCK 0x3a
55#define GEN3_BL_CMD_TERMINATE_BL 0x3b
56#define GEN3_BL_CMD_LAUNCH_APP 0xa5
57
58
59
60
61
62
63#define CYAPA_DEV_NORMAL 0x03
64#define CYAPA_DEV_BUSY 0x01
65
66#define CYAPA_FW_BLOCK_SIZE 64
67#define CYAPA_FW_READ_SIZE 16
68#define CYAPA_FW_HDR_START 0x0780
69#define CYAPA_FW_HDR_BLOCK_COUNT 2
70#define CYAPA_FW_HDR_BLOCK_START (CYAPA_FW_HDR_START / CYAPA_FW_BLOCK_SIZE)
71#define CYAPA_FW_HDR_SIZE (CYAPA_FW_HDR_BLOCK_COUNT * \
72 CYAPA_FW_BLOCK_SIZE)
73#define CYAPA_FW_DATA_START 0x0800
74#define CYAPA_FW_DATA_BLOCK_COUNT 480
75#define CYAPA_FW_DATA_BLOCK_START (CYAPA_FW_DATA_START / CYAPA_FW_BLOCK_SIZE)
76#define CYAPA_FW_DATA_SIZE (CYAPA_FW_DATA_BLOCK_COUNT * \
77 CYAPA_FW_BLOCK_SIZE)
78#define CYAPA_FW_SIZE (CYAPA_FW_HDR_SIZE + CYAPA_FW_DATA_SIZE)
79#define CYAPA_CMD_LEN 16
80
81#define GEN3_BL_IDLE_FW_MAJ_VER_OFFSET 0x0b
82#define GEN3_BL_IDLE_FW_MIN_VER_OFFSET (GEN3_BL_IDLE_FW_MAJ_VER_OFFSET + 1)
83
84
85struct cyapa_touch {
86
87
88
89
90
91 u8 xy_hi;
92 u8 x_lo;
93 u8 y_lo;
94 u8 pressure;
95
96 u8 id;
97} __packed;
98
99struct cyapa_reg_data {
100
101
102
103
104
105
106 u8 device_status;
107
108
109
110
111
112
113
114 u8 finger_btn;
115
116 struct cyapa_touch touches[5];
117} __packed;
118
119struct gen3_write_block_cmd {
120 u8 checksum_seed;
121 u8 cmd_code;
122 u8 key[8];
123 __be16 block_num;
124 u8 block_data[CYAPA_FW_BLOCK_SIZE];
125 u8 block_checksum;
126 u8 cmd_checksum;
127} __packed;
128
129static const u8 security_key[] = {
130 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 };
131static const u8 bl_activate[] = { 0x00, 0xff, 0x38, 0x00, 0x01, 0x02, 0x03,
132 0x04, 0x05, 0x06, 0x07 };
133static const u8 bl_deactivate[] = { 0x00, 0xff, 0x3b, 0x00, 0x01, 0x02, 0x03,
134 0x04, 0x05, 0x06, 0x07 };
135static const u8 bl_exit[] = { 0x00, 0xff, 0xa5, 0x00, 0x01, 0x02, 0x03, 0x04,
136 0x05, 0x06, 0x07 };
137
138
139
140#define CMD_RESET 0
141#define CMD_POWER_MODE 1
142#define CMD_DEV_STATUS 2
143#define CMD_REPORT_MAX_BASELINE 3
144#define CMD_REPORT_MIN_BASELINE 4
145#define SMBUS_BYTE_CMD(cmd) (((cmd) & 0x3f) << 1)
146#define CYAPA_SMBUS_RESET SMBUS_BYTE_CMD(CMD_RESET)
147#define CYAPA_SMBUS_POWER_MODE SMBUS_BYTE_CMD(CMD_POWER_MODE)
148#define CYAPA_SMBUS_DEV_STATUS SMBUS_BYTE_CMD(CMD_DEV_STATUS)
149#define CYAPA_SMBUS_MAX_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MAX_BASELINE)
150#define CYAPA_SMBUS_MIN_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MIN_BASELINE)
151
152
153#define REG_GROUP_DATA 0
154#define REG_GROUP_CMD 2
155#define REG_GROUP_QUERY 3
156#define SMBUS_GROUP_CMD(grp) (0x80 | (((grp) & 0x07) << 3))
157#define CYAPA_SMBUS_GROUP_DATA SMBUS_GROUP_CMD(REG_GROUP_DATA)
158#define CYAPA_SMBUS_GROUP_CMD SMBUS_GROUP_CMD(REG_GROUP_CMD)
159#define CYAPA_SMBUS_GROUP_QUERY SMBUS_GROUP_CMD(REG_GROUP_QUERY)
160
161
162#define CMD_BL_STATUS 0
163#define CMD_BL_HEAD 1
164#define CMD_BL_CMD 2
165#define CMD_BL_DATA 3
166#define CMD_BL_ALL 4
167#define CMD_BLK_PRODUCT_ID 5
168#define CMD_BLK_HEAD 6
169#define SMBUS_BLOCK_CMD(cmd) (0xc0 | (((cmd) & 0x1f) << 1))
170
171
172#define CYAPA_SMBUS_BL_STATUS SMBUS_BLOCK_CMD(CMD_BL_STATUS)
173#define CYAPA_SMBUS_BL_HEAD SMBUS_BLOCK_CMD(CMD_BL_HEAD)
174#define CYAPA_SMBUS_BL_CMD SMBUS_BLOCK_CMD(CMD_BL_CMD)
175#define CYAPA_SMBUS_BL_DATA SMBUS_BLOCK_CMD(CMD_BL_DATA)
176#define CYAPA_SMBUS_BL_ALL SMBUS_BLOCK_CMD(CMD_BL_ALL)
177
178
179#define CYAPA_SMBUS_BLK_PRODUCT_ID SMBUS_BLOCK_CMD(CMD_BLK_PRODUCT_ID)
180#define CYAPA_SMBUS_BLK_HEAD SMBUS_BLOCK_CMD(CMD_BLK_HEAD)
181
182
183#define CMD_RESET 0
184#define CMD_POWER_MODE 1
185#define CMD_DEV_STATUS 2
186#define CMD_REPORT_MAX_BASELINE 3
187#define CMD_REPORT_MIN_BASELINE 4
188#define SMBUS_BYTE_CMD(cmd) (((cmd) & 0x3f) << 1)
189#define CYAPA_SMBUS_RESET SMBUS_BYTE_CMD(CMD_RESET)
190#define CYAPA_SMBUS_POWER_MODE SMBUS_BYTE_CMD(CMD_POWER_MODE)
191#define CYAPA_SMBUS_DEV_STATUS SMBUS_BYTE_CMD(CMD_DEV_STATUS)
192#define CYAPA_SMBUS_MAX_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MAX_BASELINE)
193#define CYAPA_SMBUS_MIN_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MIN_BASELINE)
194
195
196#define REG_GROUP_DATA 0
197#define REG_GROUP_CMD 2
198#define REG_GROUP_QUERY 3
199#define SMBUS_GROUP_CMD(grp) (0x80 | (((grp) & 0x07) << 3))
200#define CYAPA_SMBUS_GROUP_DATA SMBUS_GROUP_CMD(REG_GROUP_DATA)
201#define CYAPA_SMBUS_GROUP_CMD SMBUS_GROUP_CMD(REG_GROUP_CMD)
202#define CYAPA_SMBUS_GROUP_QUERY SMBUS_GROUP_CMD(REG_GROUP_QUERY)
203
204
205#define CMD_BL_STATUS 0
206#define CMD_BL_HEAD 1
207#define CMD_BL_CMD 2
208#define CMD_BL_DATA 3
209#define CMD_BL_ALL 4
210#define CMD_BLK_PRODUCT_ID 5
211#define CMD_BLK_HEAD 6
212#define SMBUS_BLOCK_CMD(cmd) (0xc0 | (((cmd) & 0x1f) << 1))
213
214
215#define CYAPA_SMBUS_BL_STATUS SMBUS_BLOCK_CMD(CMD_BL_STATUS)
216#define CYAPA_SMBUS_BL_HEAD SMBUS_BLOCK_CMD(CMD_BL_HEAD)
217#define CYAPA_SMBUS_BL_CMD SMBUS_BLOCK_CMD(CMD_BL_CMD)
218#define CYAPA_SMBUS_BL_DATA SMBUS_BLOCK_CMD(CMD_BL_DATA)
219#define CYAPA_SMBUS_BL_ALL SMBUS_BLOCK_CMD(CMD_BL_ALL)
220
221
222#define CYAPA_SMBUS_BLK_PRODUCT_ID SMBUS_BLOCK_CMD(CMD_BLK_PRODUCT_ID)
223#define CYAPA_SMBUS_BLK_HEAD SMBUS_BLOCK_CMD(CMD_BLK_HEAD)
224
225struct cyapa_cmd_len {
226 u8 cmd;
227 u8 len;
228};
229
230
231static const struct cyapa_cmd_len cyapa_i2c_cmds[] = {
232 { CYAPA_OFFSET_SOFT_RESET, 1 },
233 { REG_OFFSET_COMMAND_BASE + 1, 1 },
234 { REG_OFFSET_DATA_BASE, 1 },
235 { REG_OFFSET_DATA_BASE, sizeof(struct cyapa_reg_data) },
236
237 { REG_OFFSET_COMMAND_BASE, 0 },
238 { REG_OFFSET_QUERY_BASE, QUERY_DATA_SIZE },
239 { BL_HEAD_OFFSET, 3 },
240 { BL_HEAD_OFFSET, 16 },
241 { BL_HEAD_OFFSET, 16 },
242 { BL_DATA_OFFSET, 16 },
243 { BL_HEAD_OFFSET, 32 },
244 { REG_OFFSET_QUERY_BASE, PRODUCT_ID_SIZE },
245
246 { REG_OFFSET_DATA_BASE, 32 },
247 { REG_OFFSET_MAX_BASELINE, 1 },
248 { REG_OFFSET_MIN_BASELINE, 1 },
249};
250
251static const struct cyapa_cmd_len cyapa_smbus_cmds[] = {
252 { CYAPA_SMBUS_RESET, 1 },
253 { CYAPA_SMBUS_POWER_MODE, 1 },
254 { CYAPA_SMBUS_DEV_STATUS, 1 },
255 { CYAPA_SMBUS_GROUP_DATA, sizeof(struct cyapa_reg_data) },
256
257 { CYAPA_SMBUS_GROUP_CMD, 2 },
258 { CYAPA_SMBUS_GROUP_QUERY, QUERY_DATA_SIZE },
259
260 { CYAPA_SMBUS_BL_STATUS, 3 },
261 { CYAPA_SMBUS_BL_HEAD, 16 },
262 { CYAPA_SMBUS_BL_CMD, 16 },
263 { CYAPA_SMBUS_BL_DATA, 16 },
264 { CYAPA_SMBUS_BL_ALL, 32 },
265 { CYAPA_SMBUS_BLK_PRODUCT_ID, PRODUCT_ID_SIZE },
266
267 { CYAPA_SMBUS_BLK_HEAD, 16 },
268 { CYAPA_SMBUS_MAX_BASELINE, 1 },
269 { CYAPA_SMBUS_MIN_BASELINE, 1 },
270};
271
272static int cyapa_gen3_try_poll_handler(struct cyapa *cyapa);
273
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285
286
287ssize_t cyapa_smbus_read_block(struct cyapa *cyapa, u8 cmd, size_t len,
288 u8 *values)
289{
290 ssize_t ret;
291 u8 index;
292 u8 smbus_cmd;
293 u8 *buf;
294 struct i2c_client *client = cyapa->client;
295
296 if (!(SMBUS_BYTE_BLOCK_CMD_MASK & cmd))
297 return -EINVAL;
298
299 if (SMBUS_GROUP_BLOCK_CMD_MASK & cmd) {
300
301 smbus_cmd = SMBUS_ENCODE_RW(cmd, SMBUS_READ);
302 ret = i2c_smbus_read_block_data(client, smbus_cmd, values);
303 goto out;
304 }
305
306 ret = 0;
307 for (index = 0; index * I2C_SMBUS_BLOCK_MAX < len; index++) {
308 smbus_cmd = SMBUS_ENCODE_IDX(cmd, index);
309 smbus_cmd = SMBUS_ENCODE_RW(smbus_cmd, SMBUS_READ);
310 buf = values + I2C_SMBUS_BLOCK_MAX * index;
311 ret = i2c_smbus_read_block_data(client, smbus_cmd, buf);
312 if (ret < 0)
313 goto out;
314 }
315
316out:
317 return ret > 0 ? len : ret;
318}
319
320static s32 cyapa_read_byte(struct cyapa *cyapa, u8 cmd_idx)
321{
322 u8 cmd;
323
324 if (cyapa->smbus) {
325 cmd = cyapa_smbus_cmds[cmd_idx].cmd;
326 cmd = SMBUS_ENCODE_RW(cmd, SMBUS_READ);
327 } else {
328 cmd = cyapa_i2c_cmds[cmd_idx].cmd;
329 }
330 return i2c_smbus_read_byte_data(cyapa->client, cmd);
331}
332
333static s32 cyapa_write_byte(struct cyapa *cyapa, u8 cmd_idx, u8 value)
334{
335 u8 cmd;
336
337 if (cyapa->smbus) {
338 cmd = cyapa_smbus_cmds[cmd_idx].cmd;
339 cmd = SMBUS_ENCODE_RW(cmd, SMBUS_WRITE);
340 } else {
341 cmd = cyapa_i2c_cmds[cmd_idx].cmd;
342 }
343 return i2c_smbus_write_byte_data(cyapa->client, cmd, value);
344}
345
346ssize_t cyapa_i2c_reg_read_block(struct cyapa *cyapa, u8 reg, size_t len,
347 u8 *values)
348{
349 return i2c_smbus_read_i2c_block_data(cyapa->client, reg, len, values);
350}
351
352static ssize_t cyapa_i2c_reg_write_block(struct cyapa *cyapa, u8 reg,
353 size_t len, const u8 *values)
354{
355 return i2c_smbus_write_i2c_block_data(cyapa->client, reg, len, values);
356}
357
358ssize_t cyapa_read_block(struct cyapa *cyapa, u8 cmd_idx, u8 *values)
359{
360 u8 cmd;
361 size_t len;
362
363 if (cyapa->smbus) {
364 cmd = cyapa_smbus_cmds[cmd_idx].cmd;
365 len = cyapa_smbus_cmds[cmd_idx].len;
366 return cyapa_smbus_read_block(cyapa, cmd, len, values);
367 }
368 cmd = cyapa_i2c_cmds[cmd_idx].cmd;
369 len = cyapa_i2c_cmds[cmd_idx].len;
370 return cyapa_i2c_reg_read_block(cyapa, cmd, len, values);
371}
372
373
374
375
376
377static int cyapa_gen3_state_parse(struct cyapa *cyapa, u8 *reg_data, int len)
378{
379 cyapa->state = CYAPA_STATE_NO_DEVICE;
380
381
382 if (reg_data[REG_BL_FILE] == BL_FILE &&
383 reg_data[REG_BL_ERROR] == BL_ERROR_NO_ERR_IDLE &&
384 (reg_data[REG_BL_STATUS] ==
385 (BL_STATUS_RUNNING | BL_STATUS_CSUM_VALID) ||
386 reg_data[REG_BL_STATUS] == BL_STATUS_RUNNING)) {
387
388
389
390
391
392 cyapa->gen = CYAPA_GEN3;
393 cyapa->state = CYAPA_STATE_BL_IDLE;
394 } else if (reg_data[REG_BL_FILE] == BL_FILE &&
395 (reg_data[REG_BL_STATUS] & BL_STATUS_RUNNING) ==
396 BL_STATUS_RUNNING) {
397 cyapa->gen = CYAPA_GEN3;
398 if (reg_data[REG_BL_STATUS] & BL_STATUS_BUSY) {
399 cyapa->state = CYAPA_STATE_BL_BUSY;
400 } else {
401 if ((reg_data[REG_BL_ERROR] & BL_ERROR_BOOTLOADING) ==
402 BL_ERROR_BOOTLOADING)
403 cyapa->state = CYAPA_STATE_BL_ACTIVE;
404 else
405 cyapa->state = CYAPA_STATE_BL_IDLE;
406 }
407 } else if ((reg_data[REG_OP_STATUS] & OP_STATUS_SRC) &&
408 (reg_data[REG_OP_DATA1] & OP_DATA_VALID)) {
409
410
411
412
413
414 if (GEN3_FINGER_NUM(reg_data[REG_OP_DATA1]) <=
415 GEN3_MAX_FINGERS) {
416
417 cyapa->gen = CYAPA_GEN3;
418 cyapa->state = CYAPA_STATE_OP;
419 }
420 } else if (reg_data[REG_OP_STATUS] == 0x0C &&
421 reg_data[REG_OP_DATA1] == 0x08) {
422
423 cyapa->gen = CYAPA_GEN3;
424 cyapa->state = CYAPA_STATE_OP;
425 } else if (reg_data[REG_BL_STATUS] &
426 (BL_STATUS_RUNNING | BL_STATUS_BUSY)) {
427 cyapa->gen = CYAPA_GEN3;
428 cyapa->state = CYAPA_STATE_BL_BUSY;
429 }
430
431 if (cyapa->gen == CYAPA_GEN3 && (cyapa->state == CYAPA_STATE_OP ||
432 cyapa->state == CYAPA_STATE_BL_IDLE ||
433 cyapa->state == CYAPA_STATE_BL_ACTIVE ||
434 cyapa->state == CYAPA_STATE_BL_BUSY))
435 return 0;
436
437 return -EAGAIN;
438}
439
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450
451
452static int cyapa_gen3_bl_enter(struct cyapa *cyapa)
453{
454 int error;
455 int waiting_time;
456
457 error = cyapa_poll_state(cyapa, 500);
458 if (error)
459 return error;
460 if (cyapa->state == CYAPA_STATE_BL_IDLE) {
461
462 return 0;
463 }
464
465 if (cyapa->state != CYAPA_STATE_OP)
466 return -EAGAIN;
467
468 cyapa->operational = false;
469 cyapa->state = CYAPA_STATE_NO_DEVICE;
470 error = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET, 0x01);
471 if (error)
472 return -EIO;
473
474 usleep_range(25000, 50000);
475 waiting_time = 2000;
476 do {
477 error = cyapa_poll_state(cyapa, 500);
478 if (error) {
479 if (error == -ETIMEDOUT) {
480 waiting_time -= 500;
481 continue;
482 }
483 return error;
484 }
485
486 if ((cyapa->state == CYAPA_STATE_BL_IDLE) &&
487 !(cyapa->status[REG_BL_STATUS] & BL_STATUS_WATCHDOG))
488 break;
489
490 msleep(100);
491 waiting_time -= 100;
492 } while (waiting_time > 0);
493
494 if ((cyapa->state != CYAPA_STATE_BL_IDLE) ||
495 (cyapa->status[REG_BL_STATUS] & BL_STATUS_WATCHDOG))
496 return -EAGAIN;
497
498 return 0;
499}
500
501static int cyapa_gen3_bl_activate(struct cyapa *cyapa)
502{
503 int error;
504
505 error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_activate),
506 bl_activate);
507 if (error)
508 return error;
509
510
511 msleep(2000);
512 error = cyapa_poll_state(cyapa, 11000);
513 if (error)
514 return error;
515 if (cyapa->state != CYAPA_STATE_BL_ACTIVE)
516 return -EAGAIN;
517
518 return 0;
519}
520
521static int cyapa_gen3_bl_deactivate(struct cyapa *cyapa)
522{
523 int error;
524
525 error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_deactivate),
526 bl_deactivate);
527 if (error)
528 return error;
529
530
531 msleep(100);
532 error = cyapa_poll_state(cyapa, 500);
533 if (error)
534 return error;
535 if (cyapa->state != CYAPA_STATE_BL_IDLE)
536 return -EAGAIN;
537 return 0;
538}
539
540
541
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550
551
552
553static int cyapa_gen3_bl_exit(struct cyapa *cyapa)
554{
555 int error;
556
557 error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_exit), bl_exit);
558 if (error)
559 return error;
560
561
562
563
564
565 msleep(50);
566
567
568
569
570
571
572 error = cyapa_poll_state(cyapa, 4000);
573 if (error < 0)
574 return error;
575 if (cyapa->state != CYAPA_STATE_OP)
576 return -EAGAIN;
577
578 return 0;
579}
580
581static u16 cyapa_gen3_csum(const u8 *buf, size_t count)
582{
583 int i;
584 u16 csum = 0;
585
586 for (i = 0; i < count; i++)
587 csum += buf[i];
588
589 return csum;
590}
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607static int cyapa_gen3_check_fw(struct cyapa *cyapa, const struct firmware *fw)
608{
609 struct device *dev = &cyapa->client->dev;
610 u16 csum;
611 u16 csum_expected;
612
613
614 if (fw->size != CYAPA_FW_SIZE) {
615 dev_err(dev, "invalid firmware size = %zu, expected %u.\n",
616 fw->size, CYAPA_FW_SIZE);
617 return -EINVAL;
618 }
619
620
621 csum_expected = (fw->data[0] << 8) | fw->data[1];
622 csum = cyapa_gen3_csum(&fw->data[2], CYAPA_FW_HDR_SIZE - 2);
623 if (csum != csum_expected) {
624 dev_err(dev, "%s %04x, expected: %04x\n",
625 "invalid firmware header checksum = ",
626 csum, csum_expected);
627 return -EINVAL;
628 }
629
630
631 csum_expected = (fw->data[CYAPA_FW_HDR_SIZE - 2] << 8) |
632 fw->data[CYAPA_FW_HDR_SIZE - 1];
633 csum = cyapa_gen3_csum(&fw->data[CYAPA_FW_HDR_SIZE],
634 CYAPA_FW_DATA_SIZE);
635 if (csum != csum_expected) {
636 dev_err(dev, "%s %04x, expected: %04x\n",
637 "invalid firmware header checksum = ",
638 csum, csum_expected);
639 return -EINVAL;
640 }
641 return 0;
642}
643
644
645
646
647
648
649
650
651static int cyapa_gen3_write_buffer(struct cyapa *cyapa,
652 const u8 *buf, size_t len)
653{
654 int error;
655 size_t i;
656 unsigned char cmd[CYAPA_CMD_LEN + 1];
657 size_t cmd_len;
658
659 for (i = 0; i < len; i += CYAPA_CMD_LEN) {
660 const u8 *payload = &buf[i];
661
662 cmd_len = (len - i >= CYAPA_CMD_LEN) ? CYAPA_CMD_LEN : len - i;
663 cmd[0] = i;
664 memcpy(&cmd[1], payload, cmd_len);
665
666 error = cyapa_i2c_reg_write_block(cyapa, 0, cmd_len + 1, cmd);
667 if (error)
668 return error;
669 }
670 return 0;
671}
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689static int cyapa_gen3_write_fw_block(struct cyapa *cyapa,
690 u16 block, const u8 *data)
691{
692 int ret;
693 struct gen3_write_block_cmd write_block_cmd;
694 u8 status[BL_STATUS_SIZE];
695 int tries;
696 u8 bl_status, bl_error;
697
698
699 write_block_cmd.checksum_seed = GEN3_BL_CMD_CHECKSUM_SEED;
700 write_block_cmd.cmd_code = GEN3_BL_CMD_WRITE_BLOCK;
701 memcpy(write_block_cmd.key, security_key, sizeof(security_key));
702 put_unaligned_be16(block, &write_block_cmd.block_num);
703 memcpy(write_block_cmd.block_data, data, CYAPA_FW_BLOCK_SIZE);
704 write_block_cmd.block_checksum = cyapa_gen3_csum(
705 write_block_cmd.block_data, CYAPA_FW_BLOCK_SIZE);
706 write_block_cmd.cmd_checksum = cyapa_gen3_csum((u8 *)&write_block_cmd,
707 sizeof(write_block_cmd) - 1);
708
709 ret = cyapa_gen3_write_buffer(cyapa, (u8 *)&write_block_cmd,
710 sizeof(write_block_cmd));
711 if (ret)
712 return ret;
713
714
715 tries = 11;
716 do {
717 usleep_range(10000, 20000);
718
719
720 ret = cyapa_i2c_reg_read_block(cyapa, BL_HEAD_OFFSET,
721 BL_STATUS_SIZE, status);
722 if (ret != BL_STATUS_SIZE)
723 return (ret < 0) ? ret : -EIO;
724 } while ((status[REG_BL_STATUS] & BL_STATUS_BUSY) && --tries);
725
726
727 bl_status = status[REG_BL_STATUS] & ~BL_STATUS_REV_MASK;
728 bl_error = status[REG_BL_ERROR] & ~BL_ERROR_RESERVED;
729
730 if (bl_status & BL_STATUS_BUSY)
731 ret = -ETIMEDOUT;
732 else if (bl_status != BL_STATUS_RUNNING ||
733 bl_error != BL_ERROR_BOOTLOADING)
734 ret = -EIO;
735 else
736 ret = 0;
737
738 return ret;
739}
740
741static int cyapa_gen3_write_blocks(struct cyapa *cyapa,
742 size_t start_block, size_t block_count,
743 const u8 *image_data)
744{
745 int error;
746 int i;
747
748 for (i = 0; i < block_count; i++) {
749 size_t block = start_block + i;
750 size_t addr = i * CYAPA_FW_BLOCK_SIZE;
751 const u8 *data = &image_data[addr];
752
753 error = cyapa_gen3_write_fw_block(cyapa, block, data);
754 if (error)
755 return error;
756 }
757 return 0;
758}
759
760static int cyapa_gen3_do_fw_update(struct cyapa *cyapa,
761 const struct firmware *fw)
762{
763 struct device *dev = &cyapa->client->dev;
764 int error;
765
766
767 error = cyapa_gen3_write_blocks(cyapa,
768 CYAPA_FW_DATA_BLOCK_START, CYAPA_FW_DATA_BLOCK_COUNT,
769 &fw->data[CYAPA_FW_HDR_BLOCK_COUNT * CYAPA_FW_BLOCK_SIZE]);
770 if (error) {
771 dev_err(dev, "FW update aborted, write image: %d\n", error);
772 return error;
773 }
774
775
776 error = cyapa_gen3_write_blocks(cyapa,
777 CYAPA_FW_HDR_BLOCK_START, CYAPA_FW_HDR_BLOCK_COUNT,
778 &fw->data[0]);
779 if (error) {
780 dev_err(dev, "FW update aborted, write checksum: %d\n", error);
781 return error;
782 }
783
784 return 0;
785}
786
787static ssize_t cyapa_gen3_do_calibrate(struct device *dev,
788 struct device_attribute *attr,
789 const char *buf, size_t count)
790{
791 struct cyapa *cyapa = dev_get_drvdata(dev);
792 unsigned long timeout;
793 int ret;
794
795 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
796 if (ret < 0) {
797 dev_err(dev, "Error reading dev status: %d\n", ret);
798 goto out;
799 }
800 if ((ret & CYAPA_DEV_NORMAL) != CYAPA_DEV_NORMAL) {
801 dev_warn(dev, "Trackpad device is busy, device state: 0x%02x\n",
802 ret);
803 ret = -EAGAIN;
804 goto out;
805 }
806
807 ret = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET,
808 OP_RECALIBRATION_MASK);
809 if (ret < 0) {
810 dev_err(dev, "Failed to send calibrate command: %d\n",
811 ret);
812 goto out;
813 }
814
815
816 timeout = jiffies + 2 * HZ;
817 do {
818
819
820
821
822
823 msleep(100);
824 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
825 if (ret < 0) {
826 dev_err(dev, "Error reading dev status: %d\n", ret);
827 goto out;
828 }
829 if ((ret & CYAPA_DEV_NORMAL) == CYAPA_DEV_NORMAL) {
830 dev_dbg(dev, "Calibration successful.\n");
831 goto out;
832 }
833 } while (time_is_after_jiffies(timeout));
834
835 dev_err(dev, "Failed to calibrate. Timeout.\n");
836 ret = -ETIMEDOUT;
837
838out:
839 return ret < 0 ? ret : count;
840}
841
842static ssize_t cyapa_gen3_show_baseline(struct device *dev,
843 struct device_attribute *attr, char *buf)
844{
845 struct cyapa *cyapa = dev_get_drvdata(dev);
846 int max_baseline, min_baseline;
847 int tries;
848 int ret;
849
850 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
851 if (ret < 0) {
852 dev_err(dev, "Error reading dev status. err = %d\n", ret);
853 goto out;
854 }
855 if ((ret & CYAPA_DEV_NORMAL) != CYAPA_DEV_NORMAL) {
856 dev_warn(dev, "Trackpad device is busy. device state = 0x%x\n",
857 ret);
858 ret = -EAGAIN;
859 goto out;
860 }
861
862 ret = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET,
863 OP_REPORT_BASELINE_MASK);
864 if (ret < 0) {
865 dev_err(dev, "Failed to send report baseline command. %d\n",
866 ret);
867 goto out;
868 }
869
870 tries = 3;
871 do {
872 usleep_range(10000, 20000);
873
874 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
875 if (ret < 0) {
876 dev_err(dev, "Error reading dev status. err = %d\n",
877 ret);
878 goto out;
879 }
880 if ((ret & CYAPA_DEV_NORMAL) == CYAPA_DEV_NORMAL)
881 break;
882 } while (--tries);
883
884 if (tries == 0) {
885 dev_err(dev, "Device timed out going to Normal state.\n");
886 ret = -ETIMEDOUT;
887 goto out;
888 }
889
890 ret = cyapa_read_byte(cyapa, CYAPA_CMD_MAX_BASELINE);
891 if (ret < 0) {
892 dev_err(dev, "Failed to read max baseline. err = %d\n", ret);
893 goto out;
894 }
895 max_baseline = ret;
896
897 ret = cyapa_read_byte(cyapa, CYAPA_CMD_MIN_BASELINE);
898 if (ret < 0) {
899 dev_err(dev, "Failed to read min baseline. err = %d\n", ret);
900 goto out;
901 }
902 min_baseline = ret;
903
904 dev_dbg(dev, "Baseline report successful. Max: %d Min: %d\n",
905 max_baseline, min_baseline);
906 ret = scnprintf(buf, PAGE_SIZE, "%d %d\n", max_baseline, min_baseline);
907
908out:
909 return ret;
910}
911
912
913
914
915
916
917
918
919
920static u16 cyapa_get_wait_time_for_pwr_cmd(u8 pwr_mode)
921{
922 switch (pwr_mode) {
923 case PWR_MODE_FULL_ACTIVE: return 20;
924 case PWR_MODE_BTN_ONLY: return 20;
925 case PWR_MODE_OFF: return 20;
926 default: return cyapa_pwr_cmd_to_sleep_time(pwr_mode) + 50;
927 }
928}
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950static int cyapa_gen3_set_power_mode(struct cyapa *cyapa, u8 power_mode,
951 u16 always_unused, enum cyapa_pm_stage pm_stage)
952{
953 struct input_dev *input = cyapa->input;
954 u8 power;
955 int tries;
956 int sleep_time;
957 int interval;
958 int ret;
959
960 if (cyapa->state != CYAPA_STATE_OP)
961 return 0;
962
963 tries = SET_POWER_MODE_TRIES;
964 while (tries--) {
965 ret = cyapa_read_byte(cyapa, CYAPA_CMD_POWER_MODE);
966 if (ret >= 0)
967 break;
968 usleep_range(SET_POWER_MODE_DELAY, 2 * SET_POWER_MODE_DELAY);
969 }
970 if (ret < 0)
971 return ret;
972
973
974
975
976
977 if ((ret & PWR_MODE_MASK) == power_mode)
978 return 0;
979
980 sleep_time = (int)cyapa_get_wait_time_for_pwr_cmd(ret & PWR_MODE_MASK);
981 power = ret;
982 power &= ~PWR_MODE_MASK;
983 power |= power_mode & PWR_MODE_MASK;
984 tries = SET_POWER_MODE_TRIES;
985 while (tries--) {
986 ret = cyapa_write_byte(cyapa, CYAPA_CMD_POWER_MODE, power);
987 if (!ret)
988 break;
989 usleep_range(SET_POWER_MODE_DELAY, 2 * SET_POWER_MODE_DELAY);
990 }
991
992
993
994
995
996
997
998 if (cyapa->operational && input && input->users &&
999 (pm_stage == CYAPA_PM_RUNTIME_SUSPEND ||
1000 pm_stage == CYAPA_PM_RUNTIME_RESUME)) {
1001
1002 interval = 1000 / 120;
1003 while (sleep_time > 0) {
1004 if (sleep_time > interval)
1005 msleep(interval);
1006 else
1007 msleep(sleep_time);
1008 sleep_time -= interval;
1009 cyapa_gen3_try_poll_handler(cyapa);
1010 }
1011 } else {
1012 msleep(sleep_time);
1013 }
1014
1015 return ret;
1016}
1017
1018static int cyapa_gen3_set_proximity(struct cyapa *cyapa, bool enable)
1019{
1020 return -EOPNOTSUPP;
1021}
1022
1023static int cyapa_gen3_get_query_data(struct cyapa *cyapa)
1024{
1025 u8 query_data[QUERY_DATA_SIZE];
1026 int ret;
1027
1028 if (cyapa->state != CYAPA_STATE_OP)
1029 return -EBUSY;
1030
1031 ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_QUERY, query_data);
1032 if (ret != QUERY_DATA_SIZE)
1033 return (ret < 0) ? ret : -EIO;
1034
1035 memcpy(&cyapa->product_id[0], &query_data[0], 5);
1036 cyapa->product_id[5] = '-';
1037 memcpy(&cyapa->product_id[6], &query_data[5], 6);
1038 cyapa->product_id[12] = '-';
1039 memcpy(&cyapa->product_id[13], &query_data[11], 2);
1040 cyapa->product_id[15] = '\0';
1041
1042 cyapa->fw_maj_ver = query_data[15];
1043 cyapa->fw_min_ver = query_data[16];
1044
1045 cyapa->btn_capability = query_data[19] & CAPABILITY_BTN_MASK;
1046
1047 cyapa->gen = query_data[20] & 0x0f;
1048
1049 cyapa->max_abs_x = ((query_data[21] & 0xf0) << 4) | query_data[22];
1050 cyapa->max_abs_y = ((query_data[21] & 0x0f) << 8) | query_data[23];
1051
1052 cyapa->physical_size_x =
1053 ((query_data[24] & 0xf0) << 4) | query_data[25];
1054 cyapa->physical_size_y =
1055 ((query_data[24] & 0x0f) << 8) | query_data[26];
1056
1057 cyapa->max_z = 255;
1058
1059 return 0;
1060}
1061
1062static int cyapa_gen3_bl_query_data(struct cyapa *cyapa)
1063{
1064 u8 bl_data[CYAPA_CMD_LEN];
1065 int ret;
1066
1067 ret = cyapa_i2c_reg_read_block(cyapa, 0, CYAPA_CMD_LEN, bl_data);
1068 if (ret != CYAPA_CMD_LEN)
1069 return (ret < 0) ? ret : -EIO;
1070
1071
1072
1073
1074
1075
1076
1077 if (bl_data[REG_BL_STATUS] ==
1078 (BL_STATUS_RUNNING | BL_STATUS_CSUM_VALID)) {
1079 cyapa->fw_maj_ver = bl_data[GEN3_BL_IDLE_FW_MAJ_VER_OFFSET];
1080 cyapa->fw_min_ver = bl_data[GEN3_BL_IDLE_FW_MIN_VER_OFFSET];
1081 }
1082
1083 return 0;
1084}
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100static int cyapa_gen3_do_operational_check(struct cyapa *cyapa)
1101{
1102 struct device *dev = &cyapa->client->dev;
1103 int error;
1104
1105 switch (cyapa->state) {
1106 case CYAPA_STATE_BL_ACTIVE:
1107 error = cyapa_gen3_bl_deactivate(cyapa);
1108 if (error) {
1109 dev_err(dev, "failed to bl_deactivate: %d\n", error);
1110 return error;
1111 }
1112
1113
1114 case CYAPA_STATE_BL_IDLE:
1115
1116 cyapa_gen3_bl_query_data(cyapa);
1117
1118 error = cyapa_gen3_bl_exit(cyapa);
1119 if (error) {
1120 dev_err(dev, "failed to bl_exit: %d\n", error);
1121 return error;
1122 }
1123
1124
1125 case CYAPA_STATE_OP:
1126
1127
1128
1129
1130 error = cyapa_gen3_set_power_mode(cyapa,
1131 PWR_MODE_FULL_ACTIVE, 0, CYAPA_PM_ACTIVE);
1132 if (error)
1133 dev_err(dev, "%s: set full power mode failed: %d\n",
1134 __func__, error);
1135 error = cyapa_gen3_get_query_data(cyapa);
1136 if (error < 0)
1137 return error;
1138
1139
1140 if (cyapa->gen != CYAPA_GEN3) {
1141 dev_err(dev, "unsupported protocol version (%d)",
1142 cyapa->gen);
1143 return -EINVAL;
1144 }
1145
1146
1147 if (memcmp(cyapa->product_id, product_id,
1148 strlen(product_id)) != 0) {
1149 dev_err(dev, "unsupported product ID (%s)\n",
1150 cyapa->product_id);
1151 return -EINVAL;
1152 }
1153
1154 return 0;
1155
1156 default:
1157 return -EIO;
1158 }
1159 return 0;
1160}
1161
1162
1163
1164
1165
1166static bool cyapa_gen3_irq_cmd_handler(struct cyapa *cyapa)
1167{
1168
1169 if (cyapa->gen != CYAPA_GEN3)
1170 return true;
1171
1172 if (cyapa->operational)
1173 return true;
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184 return false;
1185}
1186
1187static int cyapa_gen3_event_process(struct cyapa *cyapa,
1188 struct cyapa_reg_data *data)
1189{
1190 struct input_dev *input = cyapa->input;
1191 int num_fingers;
1192 int i;
1193
1194 num_fingers = (data->finger_btn >> 4) & 0x0f;
1195 for (i = 0; i < num_fingers; i++) {
1196 const struct cyapa_touch *touch = &data->touches[i];
1197
1198 int slot = touch->id - 1;
1199
1200 input_mt_slot(input, slot);
1201 input_mt_report_slot_state(input, MT_TOOL_FINGER, true);
1202 input_report_abs(input, ABS_MT_POSITION_X,
1203 ((touch->xy_hi & 0xf0) << 4) | touch->x_lo);
1204 input_report_abs(input, ABS_MT_POSITION_Y,
1205 ((touch->xy_hi & 0x0f) << 8) | touch->y_lo);
1206 input_report_abs(input, ABS_MT_PRESSURE, touch->pressure);
1207 }
1208
1209 input_mt_sync_frame(input);
1210
1211 if (cyapa->btn_capability & CAPABILITY_LEFT_BTN_MASK)
1212 input_report_key(input, BTN_LEFT,
1213 !!(data->finger_btn & OP_DATA_LEFT_BTN));
1214 if (cyapa->btn_capability & CAPABILITY_MIDDLE_BTN_MASK)
1215 input_report_key(input, BTN_MIDDLE,
1216 !!(data->finger_btn & OP_DATA_MIDDLE_BTN));
1217 if (cyapa->btn_capability & CAPABILITY_RIGHT_BTN_MASK)
1218 input_report_key(input, BTN_RIGHT,
1219 !!(data->finger_btn & OP_DATA_RIGHT_BTN));
1220 input_sync(input);
1221
1222 return 0;
1223}
1224
1225static int cyapa_gen3_irq_handler(struct cyapa *cyapa)
1226{
1227 struct device *dev = &cyapa->client->dev;
1228 struct cyapa_reg_data data;
1229 int ret;
1230
1231 ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_DATA, (u8 *)&data);
1232 if (ret != sizeof(data)) {
1233 dev_err(dev, "failed to read report data, (%d)\n", ret);
1234 return -EINVAL;
1235 }
1236
1237 if ((data.device_status & OP_STATUS_SRC) != OP_STATUS_SRC ||
1238 (data.device_status & OP_STATUS_DEV) != CYAPA_DEV_NORMAL ||
1239 (data.finger_btn & OP_DATA_VALID) != OP_DATA_VALID) {
1240 dev_err(dev, "invalid device state bytes: %02x %02x\n",
1241 data.device_status, data.finger_btn);
1242 return -EINVAL;
1243 }
1244
1245 return cyapa_gen3_event_process(cyapa, &data);
1246}
1247
1248
1249
1250
1251
1252
1253
1254static int cyapa_gen3_try_poll_handler(struct cyapa *cyapa)
1255{
1256 struct cyapa_reg_data data;
1257 int ret;
1258
1259 ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_DATA, (u8 *)&data);
1260 if (ret != sizeof(data))
1261 return -EINVAL;
1262
1263 if ((data.device_status & OP_STATUS_SRC) != OP_STATUS_SRC ||
1264 (data.device_status & OP_STATUS_DEV) != CYAPA_DEV_NORMAL ||
1265 (data.finger_btn & OP_DATA_VALID) != OP_DATA_VALID)
1266 return -EINVAL;
1267
1268 return cyapa_gen3_event_process(cyapa, &data);
1269
1270}
1271
1272static int cyapa_gen3_initialize(struct cyapa *cyapa) { return 0; }
1273static int cyapa_gen3_bl_initiate(struct cyapa *cyapa,
1274 const struct firmware *fw) { return 0; }
1275static int cyapa_gen3_empty_output_data(struct cyapa *cyapa,
1276 u8 *buf, int *len, cb_sort func) { return 0; }
1277
1278const struct cyapa_dev_ops cyapa_gen3_ops = {
1279 .check_fw = cyapa_gen3_check_fw,
1280 .bl_enter = cyapa_gen3_bl_enter,
1281 .bl_activate = cyapa_gen3_bl_activate,
1282 .update_fw = cyapa_gen3_do_fw_update,
1283 .bl_deactivate = cyapa_gen3_bl_deactivate,
1284 .bl_initiate = cyapa_gen3_bl_initiate,
1285
1286 .show_baseline = cyapa_gen3_show_baseline,
1287 .calibrate_store = cyapa_gen3_do_calibrate,
1288
1289 .initialize = cyapa_gen3_initialize,
1290
1291 .state_parse = cyapa_gen3_state_parse,
1292 .operational_check = cyapa_gen3_do_operational_check,
1293
1294 .irq_handler = cyapa_gen3_irq_handler,
1295 .irq_cmd_handler = cyapa_gen3_irq_cmd_handler,
1296 .sort_empty_output_data = cyapa_gen3_empty_output_data,
1297 .set_power_mode = cyapa_gen3_set_power_mode,
1298
1299 .set_proximity = cyapa_gen3_set_proximity,
1300};
1301