linux/drivers/mtd/devices/bcm47xxsflash.h
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   1#ifndef __BCM47XXSFLASH_H
   2#define __BCM47XXSFLASH_H
   3
   4#include <linux/mtd/mtd.h>
   5
   6#define BCM47XXSFLASH_WINDOW_SZ                 SZ_16M
   7
   8/* Used for ST flashes only. */
   9#define OPCODE_ST_WREN          0x0006          /* Write Enable */
  10#define OPCODE_ST_WRDIS         0x0004          /* Write Disable */
  11#define OPCODE_ST_RDSR          0x0105          /* Read Status Register */
  12#define OPCODE_ST_WRSR          0x0101          /* Write Status Register */
  13#define OPCODE_ST_READ          0x0303          /* Read Data Bytes */
  14#define OPCODE_ST_PP            0x0302          /* Page Program */
  15#define OPCODE_ST_SE            0x02d8          /* Sector Erase */
  16#define OPCODE_ST_BE            0x00c7          /* Bulk Erase */
  17#define OPCODE_ST_DP            0x00b9          /* Deep Power-down */
  18#define OPCODE_ST_RES           0x03ab          /* Read Electronic Signature */
  19#define OPCODE_ST_CSA           0x1000          /* Keep chip select asserted */
  20#define OPCODE_ST_SSE           0x0220          /* Sub-sector Erase */
  21#define OPCODE_ST_READ4B        0x6313          /* Read Data Bytes in 4Byte addressing mode */
  22
  23/* Used for Atmel flashes only. */
  24#define OPCODE_AT_READ                          0x07e8
  25#define OPCODE_AT_PAGE_READ                     0x07d2
  26#define OPCODE_AT_STATUS                        0x01d7
  27#define OPCODE_AT_BUF1_WRITE                    0x0384
  28#define OPCODE_AT_BUF2_WRITE                    0x0387
  29#define OPCODE_AT_BUF1_ERASE_PROGRAM            0x0283
  30#define OPCODE_AT_BUF2_ERASE_PROGRAM            0x0286
  31#define OPCODE_AT_BUF1_PROGRAM                  0x0288
  32#define OPCODE_AT_BUF2_PROGRAM                  0x0289
  33#define OPCODE_AT_PAGE_ERASE                    0x0281
  34#define OPCODE_AT_BLOCK_ERASE                   0x0250
  35#define OPCODE_AT_BUF1_WRITE_ERASE_PROGRAM      0x0382
  36#define OPCODE_AT_BUF2_WRITE_ERASE_PROGRAM      0x0385
  37#define OPCODE_AT_BUF1_LOAD                     0x0253
  38#define OPCODE_AT_BUF2_LOAD                     0x0255
  39#define OPCODE_AT_BUF1_COMPARE                  0x0260
  40#define OPCODE_AT_BUF2_COMPARE                  0x0261
  41#define OPCODE_AT_BUF1_REPROGRAM                0x0258
  42#define OPCODE_AT_BUF2_REPROGRAM                0x0259
  43
  44/* Status register bits for ST flashes */
  45#define SR_ST_WIP               0x01            /* Write In Progress */
  46#define SR_ST_WEL               0x02            /* Write Enable Latch */
  47#define SR_ST_BP_MASK           0x1c            /* Block Protect */
  48#define SR_ST_BP_SHIFT          2
  49#define SR_ST_SRWD              0x80            /* Status Register Write Disable */
  50
  51/* Status register bits for Atmel flashes */
  52#define SR_AT_READY             0x80
  53#define SR_AT_MISMATCH          0x40
  54#define SR_AT_ID_MASK           0x38
  55#define SR_AT_ID_SHIFT          3
  56
  57struct bcma_drv_cc;
  58
  59enum bcm47xxsflash_type {
  60        BCM47XXSFLASH_TYPE_ATMEL,
  61        BCM47XXSFLASH_TYPE_ST,
  62};
  63
  64struct bcm47xxsflash {
  65        struct bcma_drv_cc *bcma_cc;
  66        int (*cc_read)(struct bcm47xxsflash *b47s, u16 offset);
  67        void (*cc_write)(struct bcm47xxsflash *b47s, u16 offset, u32 value);
  68
  69        enum bcm47xxsflash_type type;
  70
  71        void __iomem *window;
  72
  73        u32 blocksize;
  74        u16 numblocks;
  75        u32 size;
  76
  77        struct mtd_info mtd;
  78};
  79
  80#endif /* BCM47XXSFLASH */
  81