LXR linux/drivers/net/ethernet/mellanox/mlx5/core/mlx5

   1/*
   2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd.  All rights reserved.
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and/or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 */
  32
  33#ifndef __MLX5_CORE_H__
  34#define __MLX5_CORE_H__
  35
  36#include <linux/types.h>
  37#include <linux/kernel.h>
  38#include <linux/sched.h>
  39#include <linux/if_link.h>
  40#include <linux/firmware.h>
  41
  42#define DRIVER_NAME "mlx5_core"
  43#define DRIVER_VERSION "5.0-0"
  44
  45#define MLX5_TOTAL_VPORTS(mdev) (1 + pci_sriov_get_totalvfs(mdev->pdev))
  46
  47extern uint mlx5_core_debug_mask;
  48
  49#define mlx5_core_dbg(__dev, format, ...)                               \
  50        dev_dbg(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format,         \
  51                 __func__, __LINE__, current->pid,                      \
  52                 ##__VA_ARGS__)
  53
  54#define mlx5_core_dbg_mask(__dev, mask, format, ...)                    \
  55do {                                                                    \
  56        if ((mask) & mlx5_core_debug_mask)                              \
  57                mlx5_core_dbg(__dev, format, ##__VA_ARGS__);            \
  58} while (0)
  59
  60#define mlx5_core_err(__dev, format, ...)                               \
  61        dev_err(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
  62                __func__, __LINE__, current->pid,       \
  63               ##__VA_ARGS__)
  64
  65#define mlx5_core_warn(__dev, format, ...)                              \
  66        dev_warn(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format,        \
  67                 __func__, __LINE__, current->pid,                      \
  68                ##__VA_ARGS__)
  69
  70#define mlx5_core_info(__dev, format, ...)                              \
  71        dev_info(&(__dev)->pdev->dev, format, ##__VA_ARGS__)
  72
  73enum {
  74        MLX5_CMD_DATA, /* print command payload only */
  75        MLX5_CMD_TIME, /* print command execution time */
  76};
  77
  78enum {
  79        MLX5_DRIVER_STATUS_ABORTED = 0xfe,
  80        MLX5_DRIVER_SYND = 0xbadd00de,
  81};
  82
  83int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
  84int mlx5_query_board_id(struct mlx5_core_dev *dev);
  85int mlx5_cmd_init_hca(struct mlx5_core_dev *dev);
  86int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
  87int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev);
  88void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
  89                     unsigned long param);
  90void mlx5_core_page_fault(struct mlx5_core_dev *dev,
  91                          struct mlx5_pagefault *pfault);
  92void mlx5_port_module_event(struct mlx5_core_dev *dev, struct mlx5_eqe *eqe);
  93void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force);
  94void mlx5_disable_device(struct mlx5_core_dev *dev);
  95void mlx5_recover_device(struct mlx5_core_dev *dev);
  96int mlx5_sriov_init(struct mlx5_core_dev *dev);
  97void mlx5_sriov_cleanup(struct mlx5_core_dev *dev);
  98int mlx5_sriov_attach(struct mlx5_core_dev *dev);
  99void mlx5_sriov_detach(struct mlx5_core_dev *dev);
 100int mlx5_core_sriov_configure(struct pci_dev *dev, int num_vfs);
 101bool mlx5_sriov_is_enabled(struct mlx5_core_dev *dev);
 102int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id);
 103int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id);
 104int mlx5_create_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
 105                                       void *context, u32 *element_id);
 106int mlx5_modify_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
 107                                       void *context, u32 element_id,
 108                                       u32 modify_bitmask);
 109int mlx5_destroy_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
 110                                        u32 element_id);
 111int mlx5_wait_for_vf_pages(struct mlx5_core_dev *dev);
 112u64 mlx5_read_internal_timer(struct mlx5_core_dev *dev);
 113u32 mlx5_get_msix_vec(struct mlx5_core_dev *dev, int vecidx);
 114struct mlx5_eq *mlx5_eqn2eq(struct mlx5_core_dev *dev, int eqn);
 115void mlx5_cq_tasklet_cb(unsigned long data);
 116
 117int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam, u8 feature_group,
 118                        u8 access_reg_group);
 119int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcap, u8 feature_group,
 120                        u8 access_reg_group);
 121
 122void mlx5_lag_add(struct mlx5_core_dev *dev, struct net_device *netdev);
 123void mlx5_lag_remove(struct mlx5_core_dev *dev);
 124
 125void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv);
 126void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv);
 127void mlx5_attach_device(struct mlx5_core_dev *dev);
 128void mlx5_detach_device(struct mlx5_core_dev *dev);
 129bool mlx5_device_registered(struct mlx5_core_dev *dev);
 130int mlx5_register_device(struct mlx5_core_dev *dev);
 131void mlx5_unregister_device(struct mlx5_core_dev *dev);
 132void mlx5_add_dev_by_protocol(struct mlx5_core_dev *dev, int protocol);
 133void mlx5_remove_dev_by_protocol(struct mlx5_core_dev *dev, int protocol);
 134struct mlx5_core_dev *mlx5_get_next_phys_dev(struct mlx5_core_dev *dev);
 135void mlx5_dev_list_lock(void);
 136void mlx5_dev_list_unlock(void);
 137int mlx5_dev_list_trylock(void);
 138int mlx5_encap_alloc(struct mlx5_core_dev *dev,
 139                     int header_type,
 140                     size_t size,
 141                     void *encap_header,
 142                     u32 *encap_id);
 143void mlx5_encap_dealloc(struct mlx5_core_dev *dev, u32 encap_id);
 144
 145int mlx5_modify_header_alloc(struct mlx5_core_dev *dev,
 146                             u8 namespace, u8 num_actions,
 147                             void *modify_actions, u32 *modify_header_id);
 148void mlx5_modify_header_dealloc(struct mlx5_core_dev *dev, u32 modify_header_id);
 149
 150bool mlx5_lag_intf_add(struct mlx5_interface *intf, struct mlx5_priv *priv);
 151
 152int mlx5_query_mtpps(struct mlx5_core_dev *dev, u32 *mtpps, u32 mtpps_size);
 153int mlx5_set_mtpps(struct mlx5_core_dev *mdev, u32 *mtpps, u32 mtpps_size);
 154int mlx5_query_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 *arm, u8 *mode);
 155int mlx5_set_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 arm, u8 mode);
 156
 157#define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) &&                \
 158                            MLX5_CAP_GEN((mdev), pps_modify) &&         \
 159                            MLX5_CAP_MCAM_FEATURE((mdev), mtpps_fs) &&  \
 160                            MLX5_CAP_MCAM_FEATURE((mdev), mtpps_enh_out_per_adj))
 161
 162int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw);
 163
 164void mlx5e_init(void);
 165void mlx5e_cleanup(void);
 166
 167static inline int mlx5_lag_is_lacp_owner(struct mlx5_core_dev *dev)
 168{
 169        /* LACP owner conditions:
 170         * 1) Function is physical.
 171         * 2) LAG is supported by FW.
 172         * 3) LAG is managed by driver (currently the only option).
 173         */
 174        return  MLX5_CAP_GEN(dev, vport_group_manager) &&
 175                   (MLX5_CAP_GEN(dev, num_lag_ports) > 1) &&
 176                    MLX5_CAP_GEN(dev, lag_master);
 177}
 178
 179int mlx5_lag_allow(struct mlx5_core_dev *dev);
 180int mlx5_lag_forbid(struct mlx5_core_dev *dev);
 181
 182#endif /* __MLX5_CORE_H__ */
 183