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18#ifndef _WMI_H_
19#define _WMI_H_
20
21#include <linux/types.h>
22#include <net/mac80211.h>
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64struct wmi_cmd_hdr {
65 __le32 cmd_id;
66} __packed;
67
68#define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF
69#define WMI_CMD_HDR_CMD_ID_LSB 0
70#define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
71#define WMI_CMD_HDR_PLT_PRIV_LSB 24
72
73#define HTC_PROTOCOL_VERSION 0x0002
74#define WMI_PROTOCOL_VERSION 0x0002
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82
83typedef __s32 __bitwise a_sle32;
84
85static inline a_sle32 a_cpu_to_sle32(s32 val)
86{
87 return (__force a_sle32)cpu_to_le32(val);
88}
89
90static inline s32 a_sle32_to_cpu(a_sle32 val)
91{
92 return le32_to_cpu((__force __le32)val);
93}
94
95enum wmi_service {
96 WMI_SERVICE_BEACON_OFFLOAD = 0,
97 WMI_SERVICE_SCAN_OFFLOAD,
98 WMI_SERVICE_ROAM_OFFLOAD,
99 WMI_SERVICE_BCN_MISS_OFFLOAD,
100 WMI_SERVICE_STA_PWRSAVE,
101 WMI_SERVICE_STA_ADVANCED_PWRSAVE,
102 WMI_SERVICE_AP_UAPSD,
103 WMI_SERVICE_AP_DFS,
104 WMI_SERVICE_11AC,
105 WMI_SERVICE_BLOCKACK,
106 WMI_SERVICE_PHYERR,
107 WMI_SERVICE_BCN_FILTER,
108 WMI_SERVICE_RTT,
109 WMI_SERVICE_RATECTRL,
110 WMI_SERVICE_WOW,
111 WMI_SERVICE_RATECTRL_CACHE,
112 WMI_SERVICE_IRAM_TIDS,
113 WMI_SERVICE_ARPNS_OFFLOAD,
114 WMI_SERVICE_NLO,
115 WMI_SERVICE_GTK_OFFLOAD,
116 WMI_SERVICE_SCAN_SCH,
117 WMI_SERVICE_CSA_OFFLOAD,
118 WMI_SERVICE_CHATTER,
119 WMI_SERVICE_COEX_FREQAVOID,
120 WMI_SERVICE_PACKET_POWER_SAVE,
121 WMI_SERVICE_FORCE_FW_HANG,
122 WMI_SERVICE_GPIO,
123 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
124 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
125 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
126 WMI_SERVICE_STA_KEEP_ALIVE,
127 WMI_SERVICE_TX_ENCAP,
128 WMI_SERVICE_BURST,
129 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
130 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
131 WMI_SERVICE_ROAM_SCAN_OFFLOAD,
132 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
133 WMI_SERVICE_EARLY_RX,
134 WMI_SERVICE_STA_SMPS,
135 WMI_SERVICE_FWTEST,
136 WMI_SERVICE_STA_WMMAC,
137 WMI_SERVICE_TDLS,
138 WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
139 WMI_SERVICE_ADAPTIVE_OCS,
140 WMI_SERVICE_BA_SSN_SUPPORT,
141 WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
142 WMI_SERVICE_WLAN_HB,
143 WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
144 WMI_SERVICE_BATCH_SCAN,
145 WMI_SERVICE_QPOWER,
146 WMI_SERVICE_PLMREQ,
147 WMI_SERVICE_THERMAL_MGMT,
148 WMI_SERVICE_RMC,
149 WMI_SERVICE_MHF_OFFLOAD,
150 WMI_SERVICE_COEX_SAR,
151 WMI_SERVICE_BCN_TXRATE_OVERRIDE,
152 WMI_SERVICE_NAN,
153 WMI_SERVICE_L1SS_STAT,
154 WMI_SERVICE_ESTIMATE_LINKSPEED,
155 WMI_SERVICE_OBSS_SCAN,
156 WMI_SERVICE_TDLS_OFFCHAN,
157 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
158 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
159 WMI_SERVICE_IBSS_PWRSAVE,
160 WMI_SERVICE_LPASS,
161 WMI_SERVICE_EXTSCAN,
162 WMI_SERVICE_D0WOW,
163 WMI_SERVICE_HSOFFLOAD,
164 WMI_SERVICE_ROAM_HO_OFFLOAD,
165 WMI_SERVICE_RX_FULL_REORDER,
166 WMI_SERVICE_DHCP_OFFLOAD,
167 WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
168 WMI_SERVICE_MDNS_OFFLOAD,
169 WMI_SERVICE_SAP_AUTH_OFFLOAD,
170 WMI_SERVICE_ATF,
171 WMI_SERVICE_COEX_GPIO,
172 WMI_SERVICE_ENHANCED_PROXY_STA,
173 WMI_SERVICE_TT,
174 WMI_SERVICE_PEER_CACHING,
175 WMI_SERVICE_AUX_SPECTRAL_INTF,
176 WMI_SERVICE_AUX_CHAN_LOAD_INTF,
177 WMI_SERVICE_BSS_CHANNEL_INFO_64,
178 WMI_SERVICE_EXT_RES_CFG_SUPPORT,
179 WMI_SERVICE_MESH_11S,
180 WMI_SERVICE_MESH_NON_11S,
181 WMI_SERVICE_PEER_STATS,
182 WMI_SERVICE_RESTRT_CHNL_SUPPORT,
183 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
184 WMI_SERVICE_TX_MODE_PUSH_ONLY,
185 WMI_SERVICE_TX_MODE_PUSH_PULL,
186 WMI_SERVICE_TX_MODE_DYNAMIC,
187
188
189 WMI_SERVICE_MAX,
190};
191
192enum wmi_10x_service {
193 WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
194 WMI_10X_SERVICE_SCAN_OFFLOAD,
195 WMI_10X_SERVICE_ROAM_OFFLOAD,
196 WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
197 WMI_10X_SERVICE_STA_PWRSAVE,
198 WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
199 WMI_10X_SERVICE_AP_UAPSD,
200 WMI_10X_SERVICE_AP_DFS,
201 WMI_10X_SERVICE_11AC,
202 WMI_10X_SERVICE_BLOCKACK,
203 WMI_10X_SERVICE_PHYERR,
204 WMI_10X_SERVICE_BCN_FILTER,
205 WMI_10X_SERVICE_RTT,
206 WMI_10X_SERVICE_RATECTRL,
207 WMI_10X_SERVICE_WOW,
208 WMI_10X_SERVICE_RATECTRL_CACHE,
209 WMI_10X_SERVICE_IRAM_TIDS,
210 WMI_10X_SERVICE_BURST,
211
212
213 WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
214 WMI_10X_SERVICE_FORCE_FW_HANG,
215 WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
216 WMI_10X_SERVICE_ATF,
217 WMI_10X_SERVICE_COEX_GPIO,
218 WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
219 WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
220 WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
221 WMI_10X_SERVICE_MESH,
222 WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
223 WMI_10X_SERVICE_PEER_STATS,
224};
225
226enum wmi_main_service {
227 WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
228 WMI_MAIN_SERVICE_SCAN_OFFLOAD,
229 WMI_MAIN_SERVICE_ROAM_OFFLOAD,
230 WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
231 WMI_MAIN_SERVICE_STA_PWRSAVE,
232 WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
233 WMI_MAIN_SERVICE_AP_UAPSD,
234 WMI_MAIN_SERVICE_AP_DFS,
235 WMI_MAIN_SERVICE_11AC,
236 WMI_MAIN_SERVICE_BLOCKACK,
237 WMI_MAIN_SERVICE_PHYERR,
238 WMI_MAIN_SERVICE_BCN_FILTER,
239 WMI_MAIN_SERVICE_RTT,
240 WMI_MAIN_SERVICE_RATECTRL,
241 WMI_MAIN_SERVICE_WOW,
242 WMI_MAIN_SERVICE_RATECTRL_CACHE,
243 WMI_MAIN_SERVICE_IRAM_TIDS,
244 WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
245 WMI_MAIN_SERVICE_NLO,
246 WMI_MAIN_SERVICE_GTK_OFFLOAD,
247 WMI_MAIN_SERVICE_SCAN_SCH,
248 WMI_MAIN_SERVICE_CSA_OFFLOAD,
249 WMI_MAIN_SERVICE_CHATTER,
250 WMI_MAIN_SERVICE_COEX_FREQAVOID,
251 WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
252 WMI_MAIN_SERVICE_FORCE_FW_HANG,
253 WMI_MAIN_SERVICE_GPIO,
254 WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
255 WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
256 WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
257 WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
258 WMI_MAIN_SERVICE_TX_ENCAP,
259};
260
261enum wmi_10_4_service {
262 WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
263 WMI_10_4_SERVICE_SCAN_OFFLOAD,
264 WMI_10_4_SERVICE_ROAM_OFFLOAD,
265 WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
266 WMI_10_4_SERVICE_STA_PWRSAVE,
267 WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
268 WMI_10_4_SERVICE_AP_UAPSD,
269 WMI_10_4_SERVICE_AP_DFS,
270 WMI_10_4_SERVICE_11AC,
271 WMI_10_4_SERVICE_BLOCKACK,
272 WMI_10_4_SERVICE_PHYERR,
273 WMI_10_4_SERVICE_BCN_FILTER,
274 WMI_10_4_SERVICE_RTT,
275 WMI_10_4_SERVICE_RATECTRL,
276 WMI_10_4_SERVICE_WOW,
277 WMI_10_4_SERVICE_RATECTRL_CACHE,
278 WMI_10_4_SERVICE_IRAM_TIDS,
279 WMI_10_4_SERVICE_BURST,
280 WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
281 WMI_10_4_SERVICE_GTK_OFFLOAD,
282 WMI_10_4_SERVICE_SCAN_SCH,
283 WMI_10_4_SERVICE_CSA_OFFLOAD,
284 WMI_10_4_SERVICE_CHATTER,
285 WMI_10_4_SERVICE_COEX_FREQAVOID,
286 WMI_10_4_SERVICE_PACKET_POWER_SAVE,
287 WMI_10_4_SERVICE_FORCE_FW_HANG,
288 WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
289 WMI_10_4_SERVICE_GPIO,
290 WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
291 WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
292 WMI_10_4_SERVICE_STA_KEEP_ALIVE,
293 WMI_10_4_SERVICE_TX_ENCAP,
294 WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
295 WMI_10_4_SERVICE_EARLY_RX,
296 WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
297 WMI_10_4_SERVICE_TT,
298 WMI_10_4_SERVICE_ATF,
299 WMI_10_4_SERVICE_PEER_CACHING,
300 WMI_10_4_SERVICE_COEX_GPIO,
301 WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
302 WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
303 WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
304 WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
305 WMI_10_4_SERVICE_MESH_NON_11S,
306 WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
307 WMI_10_4_SERVICE_PEER_STATS,
308 WMI_10_4_SERVICE_MESH_11S,
309 WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
310 WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
311 WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
312 WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
313};
314
315static inline char *wmi_service_name(int service_id)
316{
317#define SVCSTR(x) case x: return #x
318
319 switch (service_id) {
320 SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
321 SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
322 SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
323 SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
324 SVCSTR(WMI_SERVICE_STA_PWRSAVE);
325 SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
326 SVCSTR(WMI_SERVICE_AP_UAPSD);
327 SVCSTR(WMI_SERVICE_AP_DFS);
328 SVCSTR(WMI_SERVICE_11AC);
329 SVCSTR(WMI_SERVICE_BLOCKACK);
330 SVCSTR(WMI_SERVICE_PHYERR);
331 SVCSTR(WMI_SERVICE_BCN_FILTER);
332 SVCSTR(WMI_SERVICE_RTT);
333 SVCSTR(WMI_SERVICE_RATECTRL);
334 SVCSTR(WMI_SERVICE_WOW);
335 SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
336 SVCSTR(WMI_SERVICE_IRAM_TIDS);
337 SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
338 SVCSTR(WMI_SERVICE_NLO);
339 SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
340 SVCSTR(WMI_SERVICE_SCAN_SCH);
341 SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
342 SVCSTR(WMI_SERVICE_CHATTER);
343 SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
344 SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
345 SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
346 SVCSTR(WMI_SERVICE_GPIO);
347 SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
348 SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
349 SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
350 SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
351 SVCSTR(WMI_SERVICE_TX_ENCAP);
352 SVCSTR(WMI_SERVICE_BURST);
353 SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
354 SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
355 SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
356 SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
357 SVCSTR(WMI_SERVICE_EARLY_RX);
358 SVCSTR(WMI_SERVICE_STA_SMPS);
359 SVCSTR(WMI_SERVICE_FWTEST);
360 SVCSTR(WMI_SERVICE_STA_WMMAC);
361 SVCSTR(WMI_SERVICE_TDLS);
362 SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
363 SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
364 SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
365 SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
366 SVCSTR(WMI_SERVICE_WLAN_HB);
367 SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
368 SVCSTR(WMI_SERVICE_BATCH_SCAN);
369 SVCSTR(WMI_SERVICE_QPOWER);
370 SVCSTR(WMI_SERVICE_PLMREQ);
371 SVCSTR(WMI_SERVICE_THERMAL_MGMT);
372 SVCSTR(WMI_SERVICE_RMC);
373 SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
374 SVCSTR(WMI_SERVICE_COEX_SAR);
375 SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
376 SVCSTR(WMI_SERVICE_NAN);
377 SVCSTR(WMI_SERVICE_L1SS_STAT);
378 SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
379 SVCSTR(WMI_SERVICE_OBSS_SCAN);
380 SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
381 SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
382 SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
383 SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
384 SVCSTR(WMI_SERVICE_LPASS);
385 SVCSTR(WMI_SERVICE_EXTSCAN);
386 SVCSTR(WMI_SERVICE_D0WOW);
387 SVCSTR(WMI_SERVICE_HSOFFLOAD);
388 SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
389 SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
390 SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
391 SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
392 SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
393 SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
394 SVCSTR(WMI_SERVICE_ATF);
395 SVCSTR(WMI_SERVICE_COEX_GPIO);
396 SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
397 SVCSTR(WMI_SERVICE_TT);
398 SVCSTR(WMI_SERVICE_PEER_CACHING);
399 SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
400 SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
401 SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
402 SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT);
403 SVCSTR(WMI_SERVICE_MESH_11S);
404 SVCSTR(WMI_SERVICE_MESH_NON_11S);
405 SVCSTR(WMI_SERVICE_PEER_STATS);
406 SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT);
407 SVCSTR(WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT);
408 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY);
409 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL);
410 SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC);
411 default:
412 return NULL;
413 }
414
415#undef SVCSTR
416}
417
418#define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
419 ((svc_id) < (len) && \
420 __le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \
421 BIT((svc_id) % (sizeof(u32))))
422
423#define SVCMAP(x, y, len) \
424 do { \
425 if (WMI_SERVICE_IS_ENABLED((in), (x), (len))) \
426 __set_bit(y, out); \
427 } while (0)
428
429static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
430 size_t len)
431{
432 SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
433 WMI_SERVICE_BEACON_OFFLOAD, len);
434 SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
435 WMI_SERVICE_SCAN_OFFLOAD, len);
436 SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
437 WMI_SERVICE_ROAM_OFFLOAD, len);
438 SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
439 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
440 SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
441 WMI_SERVICE_STA_PWRSAVE, len);
442 SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
443 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
444 SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
445 WMI_SERVICE_AP_UAPSD, len);
446 SVCMAP(WMI_10X_SERVICE_AP_DFS,
447 WMI_SERVICE_AP_DFS, len);
448 SVCMAP(WMI_10X_SERVICE_11AC,
449 WMI_SERVICE_11AC, len);
450 SVCMAP(WMI_10X_SERVICE_BLOCKACK,
451 WMI_SERVICE_BLOCKACK, len);
452 SVCMAP(WMI_10X_SERVICE_PHYERR,
453 WMI_SERVICE_PHYERR, len);
454 SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
455 WMI_SERVICE_BCN_FILTER, len);
456 SVCMAP(WMI_10X_SERVICE_RTT,
457 WMI_SERVICE_RTT, len);
458 SVCMAP(WMI_10X_SERVICE_RATECTRL,
459 WMI_SERVICE_RATECTRL, len);
460 SVCMAP(WMI_10X_SERVICE_WOW,
461 WMI_SERVICE_WOW, len);
462 SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
463 WMI_SERVICE_RATECTRL_CACHE, len);
464 SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
465 WMI_SERVICE_IRAM_TIDS, len);
466 SVCMAP(WMI_10X_SERVICE_BURST,
467 WMI_SERVICE_BURST, len);
468 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
469 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
470 SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
471 WMI_SERVICE_FORCE_FW_HANG, len);
472 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
473 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
474 SVCMAP(WMI_10X_SERVICE_ATF,
475 WMI_SERVICE_ATF, len);
476 SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
477 WMI_SERVICE_COEX_GPIO, len);
478 SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
479 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
480 SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
481 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
482 SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
483 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
484 SVCMAP(WMI_10X_SERVICE_MESH,
485 WMI_SERVICE_MESH_11S, len);
486 SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
487 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
488 SVCMAP(WMI_10X_SERVICE_PEER_STATS,
489 WMI_SERVICE_PEER_STATS, len);
490}
491
492static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
493 size_t len)
494{
495 SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
496 WMI_SERVICE_BEACON_OFFLOAD, len);
497 SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
498 WMI_SERVICE_SCAN_OFFLOAD, len);
499 SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
500 WMI_SERVICE_ROAM_OFFLOAD, len);
501 SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
502 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
503 SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
504 WMI_SERVICE_STA_PWRSAVE, len);
505 SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
506 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
507 SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
508 WMI_SERVICE_AP_UAPSD, len);
509 SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
510 WMI_SERVICE_AP_DFS, len);
511 SVCMAP(WMI_MAIN_SERVICE_11AC,
512 WMI_SERVICE_11AC, len);
513 SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
514 WMI_SERVICE_BLOCKACK, len);
515 SVCMAP(WMI_MAIN_SERVICE_PHYERR,
516 WMI_SERVICE_PHYERR, len);
517 SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
518 WMI_SERVICE_BCN_FILTER, len);
519 SVCMAP(WMI_MAIN_SERVICE_RTT,
520 WMI_SERVICE_RTT, len);
521 SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
522 WMI_SERVICE_RATECTRL, len);
523 SVCMAP(WMI_MAIN_SERVICE_WOW,
524 WMI_SERVICE_WOW, len);
525 SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
526 WMI_SERVICE_RATECTRL_CACHE, len);
527 SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
528 WMI_SERVICE_IRAM_TIDS, len);
529 SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
530 WMI_SERVICE_ARPNS_OFFLOAD, len);
531 SVCMAP(WMI_MAIN_SERVICE_NLO,
532 WMI_SERVICE_NLO, len);
533 SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
534 WMI_SERVICE_GTK_OFFLOAD, len);
535 SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
536 WMI_SERVICE_SCAN_SCH, len);
537 SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
538 WMI_SERVICE_CSA_OFFLOAD, len);
539 SVCMAP(WMI_MAIN_SERVICE_CHATTER,
540 WMI_SERVICE_CHATTER, len);
541 SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
542 WMI_SERVICE_COEX_FREQAVOID, len);
543 SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
544 WMI_SERVICE_PACKET_POWER_SAVE, len);
545 SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
546 WMI_SERVICE_FORCE_FW_HANG, len);
547 SVCMAP(WMI_MAIN_SERVICE_GPIO,
548 WMI_SERVICE_GPIO, len);
549 SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
550 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
551 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
552 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
553 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
554 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
555 SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
556 WMI_SERVICE_STA_KEEP_ALIVE, len);
557 SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
558 WMI_SERVICE_TX_ENCAP, len);
559}
560
561static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
562 size_t len)
563{
564 SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
565 WMI_SERVICE_BEACON_OFFLOAD, len);
566 SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
567 WMI_SERVICE_SCAN_OFFLOAD, len);
568 SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
569 WMI_SERVICE_ROAM_OFFLOAD, len);
570 SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
571 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
572 SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
573 WMI_SERVICE_STA_PWRSAVE, len);
574 SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
575 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
576 SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
577 WMI_SERVICE_AP_UAPSD, len);
578 SVCMAP(WMI_10_4_SERVICE_AP_DFS,
579 WMI_SERVICE_AP_DFS, len);
580 SVCMAP(WMI_10_4_SERVICE_11AC,
581 WMI_SERVICE_11AC, len);
582 SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
583 WMI_SERVICE_BLOCKACK, len);
584 SVCMAP(WMI_10_4_SERVICE_PHYERR,
585 WMI_SERVICE_PHYERR, len);
586 SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
587 WMI_SERVICE_BCN_FILTER, len);
588 SVCMAP(WMI_10_4_SERVICE_RTT,
589 WMI_SERVICE_RTT, len);
590 SVCMAP(WMI_10_4_SERVICE_RATECTRL,
591 WMI_SERVICE_RATECTRL, len);
592 SVCMAP(WMI_10_4_SERVICE_WOW,
593 WMI_SERVICE_WOW, len);
594 SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
595 WMI_SERVICE_RATECTRL_CACHE, len);
596 SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
597 WMI_SERVICE_IRAM_TIDS, len);
598 SVCMAP(WMI_10_4_SERVICE_BURST,
599 WMI_SERVICE_BURST, len);
600 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
601 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
602 SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
603 WMI_SERVICE_GTK_OFFLOAD, len);
604 SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
605 WMI_SERVICE_SCAN_SCH, len);
606 SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
607 WMI_SERVICE_CSA_OFFLOAD, len);
608 SVCMAP(WMI_10_4_SERVICE_CHATTER,
609 WMI_SERVICE_CHATTER, len);
610 SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
611 WMI_SERVICE_COEX_FREQAVOID, len);
612 SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
613 WMI_SERVICE_PACKET_POWER_SAVE, len);
614 SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
615 WMI_SERVICE_FORCE_FW_HANG, len);
616 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
617 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
618 SVCMAP(WMI_10_4_SERVICE_GPIO,
619 WMI_SERVICE_GPIO, len);
620 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
621 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
622 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
623 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
624 SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
625 WMI_SERVICE_STA_KEEP_ALIVE, len);
626 SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
627 WMI_SERVICE_TX_ENCAP, len);
628 SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
629 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
630 SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
631 WMI_SERVICE_EARLY_RX, len);
632 SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
633 WMI_SERVICE_ENHANCED_PROXY_STA, len);
634 SVCMAP(WMI_10_4_SERVICE_TT,
635 WMI_SERVICE_TT, len);
636 SVCMAP(WMI_10_4_SERVICE_ATF,
637 WMI_SERVICE_ATF, len);
638 SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
639 WMI_SERVICE_PEER_CACHING, len);
640 SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
641 WMI_SERVICE_COEX_GPIO, len);
642 SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
643 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
644 SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
645 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
646 SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
647 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
648 SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
649 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
650 SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S,
651 WMI_SERVICE_MESH_NON_11S, len);
652 SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
653 WMI_SERVICE_RESTRT_CHNL_SUPPORT, len);
654 SVCMAP(WMI_10_4_SERVICE_PEER_STATS,
655 WMI_SERVICE_PEER_STATS, len);
656 SVCMAP(WMI_10_4_SERVICE_MESH_11S,
657 WMI_SERVICE_MESH_11S, len);
658 SVCMAP(WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
659 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, len);
660 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
661 WMI_SERVICE_TX_MODE_PUSH_ONLY, len);
662 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
663 WMI_SERVICE_TX_MODE_PUSH_PULL, len);
664 SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
665 WMI_SERVICE_TX_MODE_DYNAMIC, len);
666}
667
668#undef SVCMAP
669
670
671struct wmi_mac_addr {
672 union {
673 u8 addr[6];
674 struct {
675 u32 word0;
676 u32 word1;
677 } __packed;
678 } __packed;
679} __packed;
680
681struct wmi_cmd_map {
682 u32 init_cmdid;
683 u32 start_scan_cmdid;
684 u32 stop_scan_cmdid;
685 u32 scan_chan_list_cmdid;
686 u32 scan_sch_prio_tbl_cmdid;
687 u32 pdev_set_regdomain_cmdid;
688 u32 pdev_set_channel_cmdid;
689 u32 pdev_set_param_cmdid;
690 u32 pdev_pktlog_enable_cmdid;
691 u32 pdev_pktlog_disable_cmdid;
692 u32 pdev_set_wmm_params_cmdid;
693 u32 pdev_set_ht_cap_ie_cmdid;
694 u32 pdev_set_vht_cap_ie_cmdid;
695 u32 pdev_set_dscp_tid_map_cmdid;
696 u32 pdev_set_quiet_mode_cmdid;
697 u32 pdev_green_ap_ps_enable_cmdid;
698 u32 pdev_get_tpc_config_cmdid;
699 u32 pdev_set_base_macaddr_cmdid;
700 u32 vdev_create_cmdid;
701 u32 vdev_delete_cmdid;
702 u32 vdev_start_request_cmdid;
703 u32 vdev_restart_request_cmdid;
704 u32 vdev_up_cmdid;
705 u32 vdev_stop_cmdid;
706 u32 vdev_down_cmdid;
707 u32 vdev_set_param_cmdid;
708 u32 vdev_install_key_cmdid;
709 u32 peer_create_cmdid;
710 u32 peer_delete_cmdid;
711 u32 peer_flush_tids_cmdid;
712 u32 peer_set_param_cmdid;
713 u32 peer_assoc_cmdid;
714 u32 peer_add_wds_entry_cmdid;
715 u32 peer_remove_wds_entry_cmdid;
716 u32 peer_mcast_group_cmdid;
717 u32 bcn_tx_cmdid;
718 u32 pdev_send_bcn_cmdid;
719 u32 bcn_tmpl_cmdid;
720 u32 bcn_filter_rx_cmdid;
721 u32 prb_req_filter_rx_cmdid;
722 u32 mgmt_tx_cmdid;
723 u32 prb_tmpl_cmdid;
724 u32 addba_clear_resp_cmdid;
725 u32 addba_send_cmdid;
726 u32 addba_status_cmdid;
727 u32 delba_send_cmdid;
728 u32 addba_set_resp_cmdid;
729 u32 send_singleamsdu_cmdid;
730 u32 sta_powersave_mode_cmdid;
731 u32 sta_powersave_param_cmdid;
732 u32 sta_mimo_ps_mode_cmdid;
733 u32 pdev_dfs_enable_cmdid;
734 u32 pdev_dfs_disable_cmdid;
735 u32 roam_scan_mode;
736 u32 roam_scan_rssi_threshold;
737 u32 roam_scan_period;
738 u32 roam_scan_rssi_change_threshold;
739 u32 roam_ap_profile;
740 u32 ofl_scan_add_ap_profile;
741 u32 ofl_scan_remove_ap_profile;
742 u32 ofl_scan_period;
743 u32 p2p_dev_set_device_info;
744 u32 p2p_dev_set_discoverability;
745 u32 p2p_go_set_beacon_ie;
746 u32 p2p_go_set_probe_resp_ie;
747 u32 p2p_set_vendor_ie_data_cmdid;
748 u32 ap_ps_peer_param_cmdid;
749 u32 ap_ps_peer_uapsd_coex_cmdid;
750 u32 peer_rate_retry_sched_cmdid;
751 u32 wlan_profile_trigger_cmdid;
752 u32 wlan_profile_set_hist_intvl_cmdid;
753 u32 wlan_profile_get_profile_data_cmdid;
754 u32 wlan_profile_enable_profile_id_cmdid;
755 u32 wlan_profile_list_profile_id_cmdid;
756 u32 pdev_suspend_cmdid;
757 u32 pdev_resume_cmdid;
758 u32 add_bcn_filter_cmdid;
759 u32 rmv_bcn_filter_cmdid;
760 u32 wow_add_wake_pattern_cmdid;
761 u32 wow_del_wake_pattern_cmdid;
762 u32 wow_enable_disable_wake_event_cmdid;
763 u32 wow_enable_cmdid;
764 u32 wow_hostwakeup_from_sleep_cmdid;
765 u32 rtt_measreq_cmdid;
766 u32 rtt_tsf_cmdid;
767 u32 vdev_spectral_scan_configure_cmdid;
768 u32 vdev_spectral_scan_enable_cmdid;
769 u32 request_stats_cmdid;
770 u32 set_arp_ns_offload_cmdid;
771 u32 network_list_offload_config_cmdid;
772 u32 gtk_offload_cmdid;
773 u32 csa_offload_enable_cmdid;
774 u32 csa_offload_chanswitch_cmdid;
775 u32 chatter_set_mode_cmdid;
776 u32 peer_tid_addba_cmdid;
777 u32 peer_tid_delba_cmdid;
778 u32 sta_dtim_ps_method_cmdid;
779 u32 sta_uapsd_auto_trig_cmdid;
780 u32 sta_keepalive_cmd;
781 u32 echo_cmdid;
782 u32 pdev_utf_cmdid;
783 u32 dbglog_cfg_cmdid;
784 u32 pdev_qvit_cmdid;
785 u32 pdev_ftm_intg_cmdid;
786 u32 vdev_set_keepalive_cmdid;
787 u32 vdev_get_keepalive_cmdid;
788 u32 force_fw_hang_cmdid;
789 u32 gpio_config_cmdid;
790 u32 gpio_output_cmdid;
791 u32 pdev_get_temperature_cmdid;
792 u32 vdev_set_wmm_params_cmdid;
793 u32 tdls_set_state_cmdid;
794 u32 tdls_peer_update_cmdid;
795 u32 adaptive_qcs_cmdid;
796 u32 scan_update_request_cmdid;
797 u32 vdev_standby_response_cmdid;
798 u32 vdev_resume_response_cmdid;
799 u32 wlan_peer_caching_add_peer_cmdid;
800 u32 wlan_peer_caching_evict_peer_cmdid;
801 u32 wlan_peer_caching_restore_peer_cmdid;
802 u32 wlan_peer_caching_print_all_peers_info_cmdid;
803 u32 peer_update_wds_entry_cmdid;
804 u32 peer_add_proxy_sta_entry_cmdid;
805 u32 rtt_keepalive_cmdid;
806 u32 oem_req_cmdid;
807 u32 nan_cmdid;
808 u32 vdev_ratemask_cmdid;
809 u32 qboost_cfg_cmdid;
810 u32 pdev_smart_ant_enable_cmdid;
811 u32 pdev_smart_ant_set_rx_antenna_cmdid;
812 u32 peer_smart_ant_set_tx_antenna_cmdid;
813 u32 peer_smart_ant_set_train_info_cmdid;
814 u32 peer_smart_ant_set_node_config_ops_cmdid;
815 u32 pdev_set_antenna_switch_table_cmdid;
816 u32 pdev_set_ctl_table_cmdid;
817 u32 pdev_set_mimogain_table_cmdid;
818 u32 pdev_ratepwr_table_cmdid;
819 u32 pdev_ratepwr_chainmsk_table_cmdid;
820 u32 pdev_fips_cmdid;
821 u32 tt_set_conf_cmdid;
822 u32 fwtest_cmdid;
823 u32 vdev_atf_request_cmdid;
824 u32 peer_atf_request_cmdid;
825 u32 pdev_get_ani_cck_config_cmdid;
826 u32 pdev_get_ani_ofdm_config_cmdid;
827 u32 pdev_reserve_ast_entry_cmdid;
828 u32 pdev_get_nfcal_power_cmdid;
829 u32 pdev_get_tpc_cmdid;
830 u32 pdev_get_ast_info_cmdid;
831 u32 vdev_set_dscp_tid_map_cmdid;
832 u32 pdev_get_info_cmdid;
833 u32 vdev_get_info_cmdid;
834 u32 vdev_filter_neighbor_rx_packets_cmdid;
835 u32 mu_cal_start_cmdid;
836 u32 set_cca_params_cmdid;
837 u32 pdev_bss_chan_info_request_cmdid;
838 u32 pdev_enable_adaptive_cca_cmdid;
839 u32 ext_resource_cfg_cmdid;
840};
841
842
843
844
845enum wmi_cmd_group {
846
847 WMI_GRP_START = 0x3,
848 WMI_GRP_SCAN = WMI_GRP_START,
849 WMI_GRP_PDEV,
850 WMI_GRP_VDEV,
851 WMI_GRP_PEER,
852 WMI_GRP_MGMT,
853 WMI_GRP_BA_NEG,
854 WMI_GRP_STA_PS,
855 WMI_GRP_DFS,
856 WMI_GRP_ROAM,
857 WMI_GRP_OFL_SCAN,
858 WMI_GRP_P2P,
859 WMI_GRP_AP_PS,
860 WMI_GRP_RATE_CTRL,
861 WMI_GRP_PROFILE,
862 WMI_GRP_SUSPEND,
863 WMI_GRP_BCN_FILTER,
864 WMI_GRP_WOW,
865 WMI_GRP_RTT,
866 WMI_GRP_SPECTRAL,
867 WMI_GRP_STATS,
868 WMI_GRP_ARP_NS_OFL,
869 WMI_GRP_NLO_OFL,
870 WMI_GRP_GTK_OFL,
871 WMI_GRP_CSA_OFL,
872 WMI_GRP_CHATTER,
873 WMI_GRP_TID_ADDBA,
874 WMI_GRP_MISC,
875 WMI_GRP_GPIO,
876};
877
878#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
879#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
880
881#define WMI_CMD_UNSUPPORTED 0
882
883
884enum wmi_cmd_id {
885 WMI_INIT_CMDID = 0x1,
886
887
888 WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
889 WMI_STOP_SCAN_CMDID,
890 WMI_SCAN_CHAN_LIST_CMDID,
891 WMI_SCAN_SCH_PRIO_TBL_CMDID,
892
893
894 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
895 WMI_PDEV_SET_CHANNEL_CMDID,
896 WMI_PDEV_SET_PARAM_CMDID,
897 WMI_PDEV_PKTLOG_ENABLE_CMDID,
898 WMI_PDEV_PKTLOG_DISABLE_CMDID,
899 WMI_PDEV_SET_WMM_PARAMS_CMDID,
900 WMI_PDEV_SET_HT_CAP_IE_CMDID,
901 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
902 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
903 WMI_PDEV_SET_QUIET_MODE_CMDID,
904 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
905 WMI_PDEV_GET_TPC_CONFIG_CMDID,
906 WMI_PDEV_SET_BASE_MACADDR_CMDID,
907
908
909 WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
910 WMI_VDEV_DELETE_CMDID,
911 WMI_VDEV_START_REQUEST_CMDID,
912 WMI_VDEV_RESTART_REQUEST_CMDID,
913 WMI_VDEV_UP_CMDID,
914 WMI_VDEV_STOP_CMDID,
915 WMI_VDEV_DOWN_CMDID,
916 WMI_VDEV_SET_PARAM_CMDID,
917 WMI_VDEV_INSTALL_KEY_CMDID,
918
919
920 WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
921 WMI_PEER_DELETE_CMDID,
922 WMI_PEER_FLUSH_TIDS_CMDID,
923 WMI_PEER_SET_PARAM_CMDID,
924 WMI_PEER_ASSOC_CMDID,
925 WMI_PEER_ADD_WDS_ENTRY_CMDID,
926 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
927 WMI_PEER_MCAST_GROUP_CMDID,
928
929
930 WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
931 WMI_PDEV_SEND_BCN_CMDID,
932 WMI_BCN_TMPL_CMDID,
933 WMI_BCN_FILTER_RX_CMDID,
934 WMI_PRB_REQ_FILTER_RX_CMDID,
935 WMI_MGMT_TX_CMDID,
936 WMI_PRB_TMPL_CMDID,
937
938
939 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
940 WMI_ADDBA_SEND_CMDID,
941 WMI_ADDBA_STATUS_CMDID,
942 WMI_DELBA_SEND_CMDID,
943 WMI_ADDBA_SET_RESP_CMDID,
944 WMI_SEND_SINGLEAMSDU_CMDID,
945
946
947 WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
948 WMI_STA_POWERSAVE_PARAM_CMDID,
949 WMI_STA_MIMO_PS_MODE_CMDID,
950
951
952 WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
953 WMI_PDEV_DFS_DISABLE_CMDID,
954
955
956 WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
957 WMI_ROAM_SCAN_RSSI_THRESHOLD,
958 WMI_ROAM_SCAN_PERIOD,
959 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
960 WMI_ROAM_AP_PROFILE,
961
962
963 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
964 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
965 WMI_OFL_SCAN_PERIOD,
966
967
968 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
969 WMI_P2P_DEV_SET_DISCOVERABILITY,
970 WMI_P2P_GO_SET_BEACON_IE,
971 WMI_P2P_GO_SET_PROBE_RESP_IE,
972 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
973
974
975 WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
976 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
977
978
979 WMI_PEER_RATE_RETRY_SCHED_CMDID =
980 WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
981
982
983 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
984 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
985 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
986 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
987 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
988
989
990 WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
991 WMI_PDEV_RESUME_CMDID,
992
993
994 WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
995 WMI_RMV_BCN_FILTER_CMDID,
996
997
998 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
999 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
1000 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1001 WMI_WOW_ENABLE_CMDID,
1002 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1003
1004
1005 WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
1006 WMI_RTT_TSF_CMDID,
1007
1008
1009 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
1010 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1011
1012
1013 WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
1014
1015
1016 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
1017
1018
1019 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
1020
1021
1022 WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
1023
1024
1025 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
1026 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
1027
1028
1029 WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
1030
1031
1032 WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
1033 WMI_PEER_TID_DELBA_CMDID,
1034
1035
1036 WMI_STA_DTIM_PS_METHOD_CMDID,
1037
1038 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
1039
1040
1041
1042
1043 WMI_STA_KEEPALIVE_CMD,
1044
1045
1046 WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
1047 WMI_PDEV_UTF_CMDID,
1048 WMI_DBGLOG_CFG_CMDID,
1049 WMI_PDEV_QVIT_CMDID,
1050 WMI_PDEV_FTM_INTG_CMDID,
1051 WMI_VDEV_SET_KEEPALIVE_CMDID,
1052 WMI_VDEV_GET_KEEPALIVE_CMDID,
1053 WMI_FORCE_FW_HANG_CMDID,
1054
1055
1056 WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
1057 WMI_GPIO_OUTPUT_CMDID,
1058};
1059
1060enum wmi_event_id {
1061 WMI_SERVICE_READY_EVENTID = 0x1,
1062 WMI_READY_EVENTID,
1063
1064
1065 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
1066
1067
1068 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
1069 WMI_CHAN_INFO_EVENTID,
1070 WMI_PHYERR_EVENTID,
1071
1072
1073 WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
1074 WMI_VDEV_STOPPED_EVENTID,
1075 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
1076
1077
1078 WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
1079
1080
1081 WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
1082 WMI_HOST_SWBA_EVENTID,
1083 WMI_TBTTOFFSET_UPDATE_EVENTID,
1084
1085
1086 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
1087 WMI_TX_ADDBA_COMPLETE_EVENTID,
1088
1089
1090 WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
1091 WMI_PROFILE_MATCH,
1092
1093
1094 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
1095
1096
1097 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
1098 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
1099 WMI_RTT_ERROR_REPORT_EVENTID,
1100
1101
1102 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
1103 WMI_GTK_REKEY_FAIL_EVENTID,
1104
1105
1106 WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
1107
1108
1109 WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
1110 WMI_PDEV_UTF_EVENTID,
1111 WMI_DEBUG_MESG_EVENTID,
1112 WMI_UPDATE_STATS_EVENTID,
1113 WMI_DEBUG_PRINT_EVENTID,
1114 WMI_DCS_INTERFERENCE_EVENTID,
1115 WMI_PDEV_QVIT_EVENTID,
1116 WMI_WLAN_PROFILE_DATA_EVENTID,
1117 WMI_PDEV_FTM_INTG_EVENTID,
1118 WMI_WLAN_FREQ_AVOID_EVENTID,
1119 WMI_VDEV_GET_KEEPALIVE_EVENTID,
1120
1121
1122 WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
1123};
1124
1125
1126enum wmi_10x_cmd_id {
1127 WMI_10X_START_CMDID = 0x9000,
1128 WMI_10X_END_CMDID = 0x9FFF,
1129
1130
1131 WMI_10X_INIT_CMDID,
1132
1133
1134
1135 WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
1136 WMI_10X_STOP_SCAN_CMDID,
1137 WMI_10X_SCAN_CHAN_LIST_CMDID,
1138 WMI_10X_ECHO_CMDID,
1139
1140
1141 WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
1142 WMI_10X_PDEV_SET_CHANNEL_CMDID,
1143 WMI_10X_PDEV_SET_PARAM_CMDID,
1144 WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
1145 WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
1146 WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
1147 WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
1148 WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
1149 WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
1150 WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
1151 WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
1152 WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1153 WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
1154
1155
1156 WMI_10X_VDEV_CREATE_CMDID,
1157 WMI_10X_VDEV_DELETE_CMDID,
1158 WMI_10X_VDEV_START_REQUEST_CMDID,
1159 WMI_10X_VDEV_RESTART_REQUEST_CMDID,
1160 WMI_10X_VDEV_UP_CMDID,
1161 WMI_10X_VDEV_STOP_CMDID,
1162 WMI_10X_VDEV_DOWN_CMDID,
1163 WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
1164 WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
1165 WMI_10X_VDEV_SET_PARAM_CMDID,
1166 WMI_10X_VDEV_INSTALL_KEY_CMDID,
1167
1168
1169 WMI_10X_PEER_CREATE_CMDID,
1170 WMI_10X_PEER_DELETE_CMDID,
1171 WMI_10X_PEER_FLUSH_TIDS_CMDID,
1172 WMI_10X_PEER_SET_PARAM_CMDID,
1173 WMI_10X_PEER_ASSOC_CMDID,
1174 WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
1175 WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
1176 WMI_10X_PEER_MCAST_GROUP_CMDID,
1177
1178
1179
1180 WMI_10X_BCN_TX_CMDID,
1181 WMI_10X_BCN_PRB_TMPL_CMDID,
1182 WMI_10X_BCN_FILTER_RX_CMDID,
1183 WMI_10X_PRB_REQ_FILTER_RX_CMDID,
1184 WMI_10X_MGMT_TX_CMDID,
1185
1186
1187 WMI_10X_ADDBA_CLEAR_RESP_CMDID,
1188 WMI_10X_ADDBA_SEND_CMDID,
1189 WMI_10X_ADDBA_STATUS_CMDID,
1190 WMI_10X_DELBA_SEND_CMDID,
1191 WMI_10X_ADDBA_SET_RESP_CMDID,
1192 WMI_10X_SEND_SINGLEAMSDU_CMDID,
1193
1194
1195 WMI_10X_STA_POWERSAVE_MODE_CMDID,
1196 WMI_10X_STA_POWERSAVE_PARAM_CMDID,
1197 WMI_10X_STA_MIMO_PS_MODE_CMDID,
1198
1199
1200 WMI_10X_DBGLOG_CFG_CMDID,
1201
1202
1203 WMI_10X_PDEV_DFS_ENABLE_CMDID,
1204 WMI_10X_PDEV_DFS_DISABLE_CMDID,
1205
1206
1207 WMI_10X_PDEV_QVIT_CMDID,
1208
1209
1210 WMI_10X_ROAM_SCAN_MODE,
1211 WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
1212 WMI_10X_ROAM_SCAN_PERIOD,
1213 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1214 WMI_10X_ROAM_AP_PROFILE,
1215 WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
1216 WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
1217 WMI_10X_OFL_SCAN_PERIOD,
1218
1219
1220 WMI_10X_P2P_DEV_SET_DEVICE_INFO,
1221 WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
1222 WMI_10X_P2P_GO_SET_BEACON_IE,
1223 WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
1224
1225
1226 WMI_10X_AP_PS_PEER_PARAM_CMDID,
1227 WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
1228
1229
1230 WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
1231
1232
1233 WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
1234 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1235 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1236 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1237 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1238
1239
1240 WMI_10X_PDEV_SUSPEND_CMDID,
1241 WMI_10X_PDEV_RESUME_CMDID,
1242
1243
1244 WMI_10X_ADD_BCN_FILTER_CMDID,
1245 WMI_10X_RMV_BCN_FILTER_CMDID,
1246
1247
1248 WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
1249 WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
1250 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1251 WMI_10X_WOW_ENABLE_CMDID,
1252 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1253
1254
1255 WMI_10X_RTT_MEASREQ_CMDID,
1256 WMI_10X_RTT_TSF_CMDID,
1257
1258
1259 WMI_10X_PDEV_SEND_BCN_CMDID,
1260
1261
1262 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1263 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1264 WMI_10X_REQUEST_STATS_CMDID,
1265
1266
1267 WMI_10X_GPIO_CONFIG_CMDID,
1268 WMI_10X_GPIO_OUTPUT_CMDID,
1269
1270 WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
1271};
1272
1273enum wmi_10x_event_id {
1274 WMI_10X_SERVICE_READY_EVENTID = 0x8000,
1275 WMI_10X_READY_EVENTID,
1276 WMI_10X_START_EVENTID = 0x9000,
1277 WMI_10X_END_EVENTID = 0x9FFF,
1278
1279
1280 WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
1281 WMI_10X_ECHO_EVENTID,
1282 WMI_10X_DEBUG_MESG_EVENTID,
1283 WMI_10X_UPDATE_STATS_EVENTID,
1284
1285
1286 WMI_10X_INST_RSSI_STATS_EVENTID,
1287
1288
1289 WMI_10X_VDEV_START_RESP_EVENTID,
1290 WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1291 WMI_10X_VDEV_RESUME_REQ_EVENTID,
1292 WMI_10X_VDEV_STOPPED_EVENTID,
1293
1294
1295 WMI_10X_PEER_STA_KICKOUT_EVENTID,
1296
1297
1298 WMI_10X_HOST_SWBA_EVENTID,
1299 WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1300 WMI_10X_MGMT_RX_EVENTID,
1301
1302
1303 WMI_10X_CHAN_INFO_EVENTID,
1304
1305
1306 WMI_10X_PHYERR_EVENTID,
1307
1308
1309 WMI_10X_ROAM_EVENTID,
1310
1311
1312 WMI_10X_PROFILE_MATCH,
1313
1314
1315 WMI_10X_DEBUG_PRINT_EVENTID,
1316
1317 WMI_10X_PDEV_QVIT_EVENTID,
1318
1319 WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1320
1321
1322 WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1323 WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1324 WMI_10X_RTT_ERROR_REPORT_EVENTID,
1325
1326 WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1327 WMI_10X_DCS_INTERFERENCE_EVENTID,
1328
1329
1330 WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1331
1332 WMI_10X_GPIO_INPUT_EVENTID,
1333 WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1,
1334};
1335
1336enum wmi_10_2_cmd_id {
1337 WMI_10_2_START_CMDID = 0x9000,
1338 WMI_10_2_END_CMDID = 0x9FFF,
1339 WMI_10_2_INIT_CMDID,
1340 WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
1341 WMI_10_2_STOP_SCAN_CMDID,
1342 WMI_10_2_SCAN_CHAN_LIST_CMDID,
1343 WMI_10_2_ECHO_CMDID,
1344 WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1345 WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1346 WMI_10_2_PDEV_SET_PARAM_CMDID,
1347 WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1348 WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1349 WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1350 WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1351 WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1352 WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1353 WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1354 WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1355 WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1356 WMI_10_2_VDEV_CREATE_CMDID,
1357 WMI_10_2_VDEV_DELETE_CMDID,
1358 WMI_10_2_VDEV_START_REQUEST_CMDID,
1359 WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1360 WMI_10_2_VDEV_UP_CMDID,
1361 WMI_10_2_VDEV_STOP_CMDID,
1362 WMI_10_2_VDEV_DOWN_CMDID,
1363 WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
1364 WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
1365 WMI_10_2_VDEV_SET_PARAM_CMDID,
1366 WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1367 WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
1368 WMI_10_2_PEER_CREATE_CMDID,
1369 WMI_10_2_PEER_DELETE_CMDID,
1370 WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1371 WMI_10_2_PEER_SET_PARAM_CMDID,
1372 WMI_10_2_PEER_ASSOC_CMDID,
1373 WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1374 WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
1375 WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1376 WMI_10_2_PEER_MCAST_GROUP_CMDID,
1377 WMI_10_2_BCN_TX_CMDID,
1378 WMI_10_2_BCN_PRB_TMPL_CMDID,
1379 WMI_10_2_BCN_FILTER_RX_CMDID,
1380 WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1381 WMI_10_2_MGMT_TX_CMDID,
1382 WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1383 WMI_10_2_ADDBA_SEND_CMDID,
1384 WMI_10_2_ADDBA_STATUS_CMDID,
1385 WMI_10_2_DELBA_SEND_CMDID,
1386 WMI_10_2_ADDBA_SET_RESP_CMDID,
1387 WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1388 WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1389 WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1390 WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1391 WMI_10_2_DBGLOG_CFG_CMDID,
1392 WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1393 WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1394 WMI_10_2_PDEV_QVIT_CMDID,
1395 WMI_10_2_ROAM_SCAN_MODE,
1396 WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1397 WMI_10_2_ROAM_SCAN_PERIOD,
1398 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1399 WMI_10_2_ROAM_AP_PROFILE,
1400 WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1401 WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1402 WMI_10_2_OFL_SCAN_PERIOD,
1403 WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1404 WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1405 WMI_10_2_P2P_GO_SET_BEACON_IE,
1406 WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1407 WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1408 WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
1409 WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1410 WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1411 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1412 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1413 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1414 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1415 WMI_10_2_PDEV_SUSPEND_CMDID,
1416 WMI_10_2_PDEV_RESUME_CMDID,
1417 WMI_10_2_ADD_BCN_FILTER_CMDID,
1418 WMI_10_2_RMV_BCN_FILTER_CMDID,
1419 WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1420 WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1421 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1422 WMI_10_2_WOW_ENABLE_CMDID,
1423 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1424 WMI_10_2_RTT_MEASREQ_CMDID,
1425 WMI_10_2_RTT_TSF_CMDID,
1426 WMI_10_2_RTT_KEEPALIVE_CMDID,
1427 WMI_10_2_PDEV_SEND_BCN_CMDID,
1428 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1429 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1430 WMI_10_2_REQUEST_STATS_CMDID,
1431 WMI_10_2_GPIO_CONFIG_CMDID,
1432 WMI_10_2_GPIO_OUTPUT_CMDID,
1433 WMI_10_2_VDEV_RATEMASK_CMDID,
1434 WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
1435 WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1436 WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1437 WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1438 WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1439 WMI_10_2_FORCE_FW_HANG_CMDID,
1440 WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1441 WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
1442 WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1443 WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
1444 WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1445 WMI_10_2_PDEV_GET_INFO,
1446 WMI_10_2_VDEV_GET_INFO,
1447 WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1448 WMI_10_2_PEER_ATF_REQUEST_CMDID,
1449 WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
1450 WMI_10_2_MU_CAL_START_CMDID,
1451 WMI_10_2_SET_LTEU_CONFIG_CMDID,
1452 WMI_10_2_SET_CCA_PARAMS,
1453 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1454 WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
1455};
1456
1457enum wmi_10_2_event_id {
1458 WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
1459 WMI_10_2_READY_EVENTID,
1460 WMI_10_2_DEBUG_MESG_EVENTID,
1461 WMI_10_2_START_EVENTID = 0x9000,
1462 WMI_10_2_END_EVENTID = 0x9FFF,
1463 WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
1464 WMI_10_2_ECHO_EVENTID,
1465 WMI_10_2_UPDATE_STATS_EVENTID,
1466 WMI_10_2_INST_RSSI_STATS_EVENTID,
1467 WMI_10_2_VDEV_START_RESP_EVENTID,
1468 WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
1469 WMI_10_2_VDEV_RESUME_REQ_EVENTID,
1470 WMI_10_2_VDEV_STOPPED_EVENTID,
1471 WMI_10_2_PEER_STA_KICKOUT_EVENTID,
1472 WMI_10_2_HOST_SWBA_EVENTID,
1473 WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
1474 WMI_10_2_MGMT_RX_EVENTID,
1475 WMI_10_2_CHAN_INFO_EVENTID,
1476 WMI_10_2_PHYERR_EVENTID,
1477 WMI_10_2_ROAM_EVENTID,
1478 WMI_10_2_PROFILE_MATCH,
1479 WMI_10_2_DEBUG_PRINT_EVENTID,
1480 WMI_10_2_PDEV_QVIT_EVENTID,
1481 WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
1482 WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
1483 WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
1484 WMI_10_2_RTT_ERROR_REPORT_EVENTID,
1485 WMI_10_2_RTT_KEEPALIVE_EVENTID,
1486 WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
1487 WMI_10_2_DCS_INTERFERENCE_EVENTID,
1488 WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
1489 WMI_10_2_GPIO_INPUT_EVENTID,
1490 WMI_10_2_PEER_RATECODE_LIST_EVENTID,
1491 WMI_10_2_GENERIC_BUFFER_EVENTID,
1492 WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
1493 WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
1494 WMI_10_2_WDS_PEER_EVENTID,
1495 WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1496 WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1497 WMI_10_2_MU_REPORT_EVENTID,
1498 WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID,
1499 WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
1500};
1501
1502enum wmi_10_4_cmd_id {
1503 WMI_10_4_START_CMDID = 0x9000,
1504 WMI_10_4_END_CMDID = 0x9FFF,
1505 WMI_10_4_INIT_CMDID,
1506 WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
1507 WMI_10_4_STOP_SCAN_CMDID,
1508 WMI_10_4_SCAN_CHAN_LIST_CMDID,
1509 WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
1510 WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
1511 WMI_10_4_ECHO_CMDID,
1512 WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
1513 WMI_10_4_PDEV_SET_CHANNEL_CMDID,
1514 WMI_10_4_PDEV_SET_PARAM_CMDID,
1515 WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
1516 WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
1517 WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
1518 WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
1519 WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
1520 WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
1521 WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
1522 WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
1523 WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1524 WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
1525 WMI_10_4_VDEV_CREATE_CMDID,
1526 WMI_10_4_VDEV_DELETE_CMDID,
1527 WMI_10_4_VDEV_START_REQUEST_CMDID,
1528 WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
1529 WMI_10_4_VDEV_UP_CMDID,
1530 WMI_10_4_VDEV_STOP_CMDID,
1531 WMI_10_4_VDEV_DOWN_CMDID,
1532 WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
1533 WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
1534 WMI_10_4_VDEV_SET_PARAM_CMDID,
1535 WMI_10_4_VDEV_INSTALL_KEY_CMDID,
1536 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
1537 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
1538 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
1539 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
1540 WMI_10_4_PEER_CREATE_CMDID,
1541 WMI_10_4_PEER_DELETE_CMDID,
1542 WMI_10_4_PEER_FLUSH_TIDS_CMDID,
1543 WMI_10_4_PEER_SET_PARAM_CMDID,
1544 WMI_10_4_PEER_ASSOC_CMDID,
1545 WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
1546 WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
1547 WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
1548 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
1549 WMI_10_4_PEER_MCAST_GROUP_CMDID,
1550 WMI_10_4_BCN_TX_CMDID,
1551 WMI_10_4_PDEV_SEND_BCN_CMDID,
1552 WMI_10_4_BCN_PRB_TMPL_CMDID,
1553 WMI_10_4_BCN_FILTER_RX_CMDID,
1554 WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
1555 WMI_10_4_MGMT_TX_CMDID,
1556 WMI_10_4_PRB_TMPL_CMDID,
1557 WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
1558 WMI_10_4_ADDBA_SEND_CMDID,
1559 WMI_10_4_ADDBA_STATUS_CMDID,
1560 WMI_10_4_DELBA_SEND_CMDID,
1561 WMI_10_4_ADDBA_SET_RESP_CMDID,
1562 WMI_10_4_SEND_SINGLEAMSDU_CMDID,
1563 WMI_10_4_STA_POWERSAVE_MODE_CMDID,
1564 WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
1565 WMI_10_4_STA_MIMO_PS_MODE_CMDID,
1566 WMI_10_4_DBGLOG_CFG_CMDID,
1567 WMI_10_4_PDEV_DFS_ENABLE_CMDID,
1568 WMI_10_4_PDEV_DFS_DISABLE_CMDID,
1569 WMI_10_4_PDEV_QVIT_CMDID,
1570 WMI_10_4_ROAM_SCAN_MODE,
1571 WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
1572 WMI_10_4_ROAM_SCAN_PERIOD,
1573 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1574 WMI_10_4_ROAM_AP_PROFILE,
1575 WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
1576 WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
1577 WMI_10_4_OFL_SCAN_PERIOD,
1578 WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
1579 WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
1580 WMI_10_4_P2P_GO_SET_BEACON_IE,
1581 WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
1582 WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
1583 WMI_10_4_AP_PS_PEER_PARAM_CMDID,
1584 WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
1585 WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
1586 WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
1587 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1588 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1589 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1590 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1591 WMI_10_4_PDEV_SUSPEND_CMDID,
1592 WMI_10_4_PDEV_RESUME_CMDID,
1593 WMI_10_4_ADD_BCN_FILTER_CMDID,
1594 WMI_10_4_RMV_BCN_FILTER_CMDID,
1595 WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
1596 WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
1597 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1598 WMI_10_4_WOW_ENABLE_CMDID,
1599 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1600 WMI_10_4_RTT_MEASREQ_CMDID,
1601 WMI_10_4_RTT_TSF_CMDID,
1602 WMI_10_4_RTT_KEEPALIVE_CMDID,
1603 WMI_10_4_OEM_REQ_CMDID,
1604 WMI_10_4_NAN_CMDID,
1605 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1606 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1607 WMI_10_4_REQUEST_STATS_CMDID,
1608 WMI_10_4_GPIO_CONFIG_CMDID,
1609 WMI_10_4_GPIO_OUTPUT_CMDID,
1610 WMI_10_4_VDEV_RATEMASK_CMDID,
1611 WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
1612 WMI_10_4_GTK_OFFLOAD_CMDID,
1613 WMI_10_4_QBOOST_CFG_CMDID,
1614 WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
1615 WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
1616 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1617 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1618 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1619 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1620 WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
1621 WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
1622 WMI_10_4_FORCE_FW_HANG_CMDID,
1623 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1624 WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
1625 WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1626 WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
1627 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1628 WMI_10_4_PDEV_FIPS_CMDID,
1629 WMI_10_4_TT_SET_CONF_CMDID,
1630 WMI_10_4_FWTEST_CMDID,
1631 WMI_10_4_VDEV_ATF_REQUEST_CMDID,
1632 WMI_10_4_PEER_ATF_REQUEST_CMDID,
1633 WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
1634 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
1635 WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
1636 WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
1637 WMI_10_4_PDEV_GET_TPC_CMDID,
1638 WMI_10_4_PDEV_GET_AST_INFO_CMDID,
1639 WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
1640 WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
1641 WMI_10_4_PDEV_GET_INFO_CMDID,
1642 WMI_10_4_VDEV_GET_INFO_CMDID,
1643 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
1644 WMI_10_4_MU_CAL_START_CMDID,
1645 WMI_10_4_SET_CCA_PARAMS_CMDID,
1646 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1647 WMI_10_4_EXT_RESOURCE_CFG_CMDID,
1648 WMI_10_4_VDEV_SET_IE_CMDID,
1649 WMI_10_4_SET_LTEU_CONFIG_CMDID,
1650 WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
1651};
1652
1653enum wmi_10_4_event_id {
1654 WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
1655 WMI_10_4_READY_EVENTID,
1656 WMI_10_4_DEBUG_MESG_EVENTID,
1657 WMI_10_4_START_EVENTID = 0x9000,
1658 WMI_10_4_END_EVENTID = 0x9FFF,
1659 WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
1660 WMI_10_4_ECHO_EVENTID,
1661 WMI_10_4_UPDATE_STATS_EVENTID,
1662 WMI_10_4_INST_RSSI_STATS_EVENTID,
1663 WMI_10_4_VDEV_START_RESP_EVENTID,
1664 WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
1665 WMI_10_4_VDEV_RESUME_REQ_EVENTID,
1666 WMI_10_4_VDEV_STOPPED_EVENTID,
1667 WMI_10_4_PEER_STA_KICKOUT_EVENTID,
1668 WMI_10_4_HOST_SWBA_EVENTID,
1669 WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
1670 WMI_10_4_MGMT_RX_EVENTID,
1671 WMI_10_4_CHAN_INFO_EVENTID,
1672 WMI_10_4_PHYERR_EVENTID,
1673 WMI_10_4_ROAM_EVENTID,
1674 WMI_10_4_PROFILE_MATCH,
1675 WMI_10_4_DEBUG_PRINT_EVENTID,
1676 WMI_10_4_PDEV_QVIT_EVENTID,
1677 WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
1678 WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
1679 WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
1680 WMI_10_4_RTT_ERROR_REPORT_EVENTID,
1681 WMI_10_4_RTT_KEEPALIVE_EVENTID,
1682 WMI_10_4_OEM_CAPABILITY_EVENTID,
1683 WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
1684 WMI_10_4_OEM_ERROR_REPORT_EVENTID,
1685 WMI_10_4_NAN_EVENTID,
1686 WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
1687 WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
1688 WMI_10_4_GTK_REKEY_FAIL_EVENTID,
1689 WMI_10_4_DCS_INTERFERENCE_EVENTID,
1690 WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
1691 WMI_10_4_CSA_HANDLING_EVENTID,
1692 WMI_10_4_GPIO_INPUT_EVENTID,
1693 WMI_10_4_PEER_RATECODE_LIST_EVENTID,
1694 WMI_10_4_GENERIC_BUFFER_EVENTID,
1695 WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
1696 WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
1697 WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
1698 WMI_10_4_WDS_PEER_EVENTID,
1699 WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
1700 WMI_10_4_PDEV_FIPS_EVENTID,
1701 WMI_10_4_TT_STATS_EVENTID,
1702 WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
1703 WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
1704 WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
1705 WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
1706 WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
1707 WMI_10_4_PDEV_TPC_EVENTID,
1708 WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
1709 WMI_10_4_PDEV_TEMPERATURE_EVENTID,
1710 WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
1711 WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
1712 WMI_10_4_MU_REPORT_EVENTID,
1713 WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
1714};
1715
1716enum wmi_phy_mode {
1717 MODE_11A = 0,
1718 MODE_11G = 1,
1719 MODE_11B = 2,
1720 MODE_11GONLY = 3,
1721 MODE_11NA_HT20 = 4,
1722 MODE_11NG_HT20 = 5,
1723 MODE_11NA_HT40 = 6,
1724 MODE_11NG_HT40 = 7,
1725 MODE_11AC_VHT20 = 8,
1726 MODE_11AC_VHT40 = 9,
1727 MODE_11AC_VHT80 = 10,
1728
1729 MODE_11AC_VHT20_2G = 11,
1730 MODE_11AC_VHT40_2G = 12,
1731 MODE_11AC_VHT80_2G = 13,
1732 MODE_11AC_VHT80_80 = 14,
1733 MODE_11AC_VHT160 = 15,
1734 MODE_UNKNOWN = 16,
1735 MODE_MAX = 16
1736};
1737
1738static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
1739{
1740 switch (mode) {
1741 case MODE_11A:
1742 return "11a";
1743 case MODE_11G:
1744 return "11g";
1745 case MODE_11B:
1746 return "11b";
1747 case MODE_11GONLY:
1748 return "11gonly";
1749 case MODE_11NA_HT20:
1750 return "11na-ht20";
1751 case MODE_11NG_HT20:
1752 return "11ng-ht20";
1753 case MODE_11NA_HT40:
1754 return "11na-ht40";
1755 case MODE_11NG_HT40:
1756 return "11ng-ht40";
1757 case MODE_11AC_VHT20:
1758 return "11ac-vht20";
1759 case MODE_11AC_VHT40:
1760 return "11ac-vht40";
1761 case MODE_11AC_VHT80:
1762 return "11ac-vht80";
1763 case MODE_11AC_VHT160:
1764 return "11ac-vht160";
1765 case MODE_11AC_VHT80_80:
1766 return "11ac-vht80+80";
1767 case MODE_11AC_VHT20_2G:
1768 return "11ac-vht20-2g";
1769 case MODE_11AC_VHT40_2G:
1770 return "11ac-vht40-2g";
1771 case MODE_11AC_VHT80_2G:
1772 return "11ac-vht80-2g";
1773 case MODE_UNKNOWN:
1774
1775 break;
1776
1777
1778
1779
1780 };
1781
1782 return "<unknown>";
1783}
1784
1785#define WMI_CHAN_LIST_TAG 0x1
1786#define WMI_SSID_LIST_TAG 0x2
1787#define WMI_BSSID_LIST_TAG 0x3
1788#define WMI_IE_TAG 0x4
1789
1790struct wmi_channel {
1791 __le32 mhz;
1792 __le32 band_center_freq1;
1793 __le32 band_center_freq2;
1794 union {
1795 __le32 flags;
1796 struct {
1797 u8 mode;
1798 } __packed;
1799 } __packed;
1800 union {
1801 __le32 reginfo0;
1802 struct {
1803
1804 u8 min_power;
1805 u8 max_power;
1806 u8 reg_power;
1807 u8 reg_classid;
1808 } __packed;
1809 } __packed;
1810 union {
1811 __le32 reginfo1;
1812 struct {
1813 u8 antenna_max;
1814 u8 max_tx_power;
1815 } __packed;
1816 } __packed;
1817} __packed;
1818
1819struct wmi_channel_arg {
1820 u32 freq;
1821 u32 band_center_freq1;
1822 u32 band_center_freq2;
1823 bool passive;
1824 bool allow_ibss;
1825 bool allow_ht;
1826 bool allow_vht;
1827 bool ht40plus;
1828 bool chan_radar;
1829
1830 u32 min_power;
1831 u32 max_power;
1832 u32 max_reg_power;
1833 u32 max_antenna_gain;
1834 u32 reg_class_id;
1835 enum wmi_phy_mode mode;
1836};
1837
1838enum wmi_channel_change_cause {
1839 WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
1840 WMI_CHANNEL_CHANGE_CAUSE_CSA,
1841};
1842
1843#define WMI_CHAN_FLAG_HT40_PLUS (1 << 6)
1844#define WMI_CHAN_FLAG_PASSIVE (1 << 7)
1845#define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8)
1846#define WMI_CHAN_FLAG_AP_DISABLED (1 << 9)
1847#define WMI_CHAN_FLAG_DFS (1 << 10)
1848#define WMI_CHAN_FLAG_ALLOW_HT (1 << 11)
1849#define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12)
1850
1851
1852#define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
1853
1854#define WMI_MAX_SPATIAL_STREAM 3
1855
1856
1857#define WMI_HT_CAP_ENABLED 0x0001
1858#define WMI_HT_CAP_HT20_SGI 0x0002
1859#define WMI_HT_CAP_DYNAMIC_SMPS 0x0004
1860#define WMI_HT_CAP_TX_STBC 0x0008
1861#define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
1862#define WMI_HT_CAP_RX_STBC 0x0030
1863#define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
1864#define WMI_HT_CAP_LDPC 0x0040
1865#define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080
1866#define WMI_HT_CAP_MPDU_DENSITY 0x0700
1867#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
1868#define WMI_HT_CAP_HT40_SGI 0x0800
1869
1870#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
1871 WMI_HT_CAP_HT20_SGI | \
1872 WMI_HT_CAP_HT40_SGI | \
1873 WMI_HT_CAP_TX_STBC | \
1874 WMI_HT_CAP_RX_STBC | \
1875 WMI_HT_CAP_LDPC)
1876
1877
1878
1879
1880
1881
1882
1883
1884#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
1885#define WMI_VHT_CAP_RX_LDPC 0x00000010
1886#define WMI_VHT_CAP_SGI_80MHZ 0x00000020
1887#define WMI_VHT_CAP_SGI_160MHZ 0x00000040
1888#define WMI_VHT_CAP_TX_STBC 0x00000080
1889#define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
1890#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
1891#define WMI_VHT_CAP_SU_BFER 0x00000800
1892#define WMI_VHT_CAP_SU_BFEE 0x00001000
1893#define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000
1894#define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13
1895#define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000
1896#define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16
1897#define WMI_VHT_CAP_MU_BFER 0x00080000
1898#define WMI_VHT_CAP_MU_BFEE 0x00100000
1899#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
1900#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23
1901#define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
1902#define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
1903
1904
1905#define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000
1906#define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001
1907#define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
1908
1909#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
1910 WMI_VHT_CAP_RX_LDPC | \
1911 WMI_VHT_CAP_SGI_80MHZ | \
1912 WMI_VHT_CAP_TX_STBC | \
1913 WMI_VHT_CAP_RX_STBC_MASK | \
1914 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
1915 WMI_VHT_CAP_RX_FIXED_ANT | \
1916 WMI_VHT_CAP_TX_FIXED_ANT)
1917
1918
1919
1920
1921
1922#define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1))
1923#define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000
1924#define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16
1925
1926enum {
1927 REGDMN_MODE_11A = 0x00001,
1928 REGDMN_MODE_TURBO = 0x00002,
1929 REGDMN_MODE_11B = 0x00004,
1930 REGDMN_MODE_PUREG = 0x00008,
1931 REGDMN_MODE_11G = 0x00008,
1932 REGDMN_MODE_108G = 0x00020,
1933 REGDMN_MODE_108A = 0x00040,
1934 REGDMN_MODE_XR = 0x00100,
1935 REGDMN_MODE_11A_HALF_RATE = 0x00200,
1936 REGDMN_MODE_11A_QUARTER_RATE = 0x00400,
1937 REGDMN_MODE_11NG_HT20 = 0x00800,
1938 REGDMN_MODE_11NA_HT20 = 0x01000,
1939 REGDMN_MODE_11NG_HT40PLUS = 0x02000,
1940 REGDMN_MODE_11NG_HT40MINUS = 0x04000,
1941 REGDMN_MODE_11NA_HT40PLUS = 0x08000,
1942 REGDMN_MODE_11NA_HT40MINUS = 0x10000,
1943 REGDMN_MODE_11AC_VHT20 = 0x20000,
1944 REGDMN_MODE_11AC_VHT40PLUS = 0x40000,
1945 REGDMN_MODE_11AC_VHT40MINUS = 0x80000,
1946 REGDMN_MODE_11AC_VHT80 = 0x100000,
1947 REGDMN_MODE_11AC_VHT160 = 0x200000,
1948 REGDMN_MODE_11AC_VHT80_80 = 0x400000,
1949 REGDMN_MODE_ALL = 0xffffffff
1950};
1951
1952#define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001
1953#define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002
1954#define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004
1955
1956
1957#define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
1958#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
1959#define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100
1960#define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
1961#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
1962#define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
1963
1964struct hal_reg_capabilities {
1965
1966 __le32 eeprom_rd;
1967
1968 __le32 eeprom_rd_ext;
1969
1970 __le32 regcap1;
1971
1972 __le32 regcap2;
1973
1974 __le32 wireless_modes;
1975 __le32 low_2ghz_chan;
1976 __le32 high_2ghz_chan;
1977 __le32 low_5ghz_chan;
1978 __le32 high_5ghz_chan;
1979} __packed;
1980
1981enum wlan_mode_capability {
1982 WHAL_WLAN_11A_CAPABILITY = 0x1,
1983 WHAL_WLAN_11G_CAPABILITY = 0x2,
1984 WHAL_WLAN_11AG_CAPABILITY = 0x3,
1985};
1986
1987
1988struct wlan_host_mem_req {
1989
1990 __le32 req_id;
1991
1992 __le32 unit_size;
1993
1994
1995
1996
1997 __le32 num_unit_info;
1998
1999
2000
2001
2002
2003
2004
2005 __le32 num_units;
2006} __packed;
2007
2008
2009
2010
2011
2012
2013struct wmi_service_ready_event {
2014 __le32 sw_version;
2015 __le32 sw_version_1;
2016 __le32 abi_version;
2017
2018 __le32 phy_capability;
2019
2020 __le32 max_frag_entry;
2021 __le32 wmi_service_bitmap[16];
2022 __le32 num_rf_chains;
2023
2024
2025
2026
2027 __le32 ht_cap_info;
2028 __le32 vht_cap_info;
2029 __le32 vht_supp_mcs;
2030 __le32 hw_min_tx_power;
2031 __le32 hw_max_tx_power;
2032 struct hal_reg_capabilities hal_reg_capabilities;
2033 __le32 sys_cap_info;
2034 __le32 min_pkt_size_enable;
2035
2036
2037
2038
2039 __le32 max_bcn_ie_size;
2040
2041
2042
2043
2044
2045
2046 __le32 num_mem_reqs;
2047 struct wlan_host_mem_req mem_reqs[0];
2048} __packed;
2049
2050
2051struct wmi_10x_service_ready_event {
2052 __le32 sw_version;
2053 __le32 abi_version;
2054
2055
2056 __le32 phy_capability;
2057
2058
2059 __le32 max_frag_entry;
2060 __le32 wmi_service_bitmap[16];
2061 __le32 num_rf_chains;
2062
2063
2064
2065
2066
2067 __le32 ht_cap_info;
2068 __le32 vht_cap_info;
2069 __le32 vht_supp_mcs;
2070 __le32 hw_min_tx_power;
2071 __le32 hw_max_tx_power;
2072
2073 struct hal_reg_capabilities hal_reg_capabilities;
2074
2075 __le32 sys_cap_info;
2076 __le32 min_pkt_size_enable;
2077
2078
2079
2080
2081
2082
2083
2084 __le32 num_mem_reqs;
2085
2086 struct wlan_host_mem_req mem_reqs[0];
2087} __packed;
2088
2089#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
2090#define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ)
2091
2092struct wmi_ready_event {
2093 __le32 sw_version;
2094 __le32 abi_version;
2095 struct wmi_mac_addr mac_addr;
2096 __le32 status;
2097} __packed;
2098
2099struct wmi_resource_config {
2100
2101 __le32 num_vdevs;
2102
2103
2104 __le32 num_peers;
2105
2106
2107
2108
2109
2110
2111
2112
2113 __le32 num_offload_peers;
2114
2115
2116 __le32 num_offload_reorder_bufs;
2117
2118
2119 __le32 num_peer_keys;
2120
2121
2122 __le32 num_tids;
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134 __le32 ast_skid_limit;
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144 __le32 tx_chain_mask;
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156 __le32 rx_chain_mask;
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168 __le32 rx_timeout_pri_vi;
2169 __le32 rx_timeout_pri_vo;
2170 __le32 rx_timeout_pri_be;
2171 __le32 rx_timeout_pri_bk;
2172
2173
2174
2175
2176
2177
2178
2179
2180 __le32 rx_decap_mode;
2181
2182
2183 __le32 scan_max_pending_reqs;
2184
2185
2186 __le32 bmiss_offload_max_vdev;
2187
2188
2189 __le32 roam_offload_max_vdev;
2190
2191
2192 __le32 roam_offload_max_ap_profiles;
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206 __le32 num_mcast_groups;
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217 __le32 num_mcast_table_elems;
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237 __le32 mcast2ucast_mode;
2238
2239
2240
2241
2242
2243
2244
2245
2246 __le32 tx_dbg_log_size;
2247
2248
2249 __le32 num_wds_entries;
2250
2251
2252
2253
2254
2255 __le32 dma_burst_size;
2256
2257
2258
2259
2260
2261 __le32 mac_aggr_delim;
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272 __le32 rx_skip_defrag_timeout_dup_detection_check;
2273
2274
2275
2276
2277
2278
2279 __le32 vow_config;
2280
2281
2282 __le32 gtk_offload_max_vdev;
2283
2284
2285 __le32 num_msdu_desc;
2286
2287
2288
2289
2290
2291
2292
2293 __le32 max_frag_entries;
2294} __packed;
2295
2296struct wmi_resource_config_10x {
2297
2298 __le32 num_vdevs;
2299
2300
2301 __le32 num_peers;
2302
2303
2304 __le32 num_peer_keys;
2305
2306
2307 __le32 num_tids;
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319 __le32 ast_skid_limit;
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329 __le32 tx_chain_mask;
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341 __le32 rx_chain_mask;
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353 __le32 rx_timeout_pri_vi;
2354 __le32 rx_timeout_pri_vo;
2355 __le32 rx_timeout_pri_be;
2356 __le32 rx_timeout_pri_bk;
2357
2358
2359
2360
2361
2362
2363
2364
2365 __le32 rx_decap_mode;
2366
2367
2368 __le32 scan_max_pending_reqs;
2369
2370
2371 __le32 bmiss_offload_max_vdev;
2372
2373
2374 __le32 roam_offload_max_vdev;
2375
2376
2377 __le32 roam_offload_max_ap_profiles;
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391 __le32 num_mcast_groups;
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402 __le32 num_mcast_table_elems;
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422 __le32 mcast2ucast_mode;
2423
2424
2425
2426
2427
2428
2429
2430
2431 __le32 tx_dbg_log_size;
2432
2433
2434 __le32 num_wds_entries;
2435
2436
2437
2438
2439
2440 __le32 dma_burst_size;
2441
2442
2443
2444
2445
2446 __le32 mac_aggr_delim;
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457 __le32 rx_skip_defrag_timeout_dup_detection_check;
2458
2459
2460
2461
2462
2463
2464 __le32 vow_config;
2465
2466
2467 __le32 num_msdu_desc;
2468
2469
2470
2471
2472
2473
2474
2475 __le32 max_frag_entries;
2476} __packed;
2477
2478enum wmi_10_2_feature_mask {
2479 WMI_10_2_RX_BATCH_MODE = BIT(0),
2480 WMI_10_2_ATF_CONFIG = BIT(1),
2481 WMI_10_2_COEX_GPIO = BIT(3),
2482 WMI_10_2_BSS_CHAN_INFO = BIT(6),
2483 WMI_10_2_PEER_STATS = BIT(7),
2484};
2485
2486struct wmi_resource_config_10_2 {
2487 struct wmi_resource_config_10x common;
2488 __le32 max_peer_ext_stats;
2489 __le32 smart_ant_cap;
2490 __le32 bk_min_free;
2491 __le32 be_min_free;
2492 __le32 vi_min_free;
2493 __le32 vo_min_free;
2494 __le32 feature_mask;
2495} __packed;
2496
2497#define NUM_UNITS_IS_NUM_VDEVS BIT(0)
2498#define NUM_UNITS_IS_NUM_PEERS BIT(1)
2499#define NUM_UNITS_IS_NUM_ACTIVE_PEERS BIT(2)
2500
2501struct wmi_resource_config_10_4 {
2502
2503 __le32 num_vdevs;
2504
2505
2506 __le32 num_peers;
2507
2508
2509 __le32 num_active_peers;
2510
2511
2512
2513
2514
2515
2516
2517 __le32 num_offload_peers;
2518
2519
2520
2521
2522 __le32 num_offload_reorder_buffs;
2523
2524
2525 __le32 num_peer_keys;
2526
2527
2528 __le32 num_tids;
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538 __le32 ast_skid_limit;
2539
2540
2541
2542
2543
2544
2545
2546 __le32 tx_chain_mask;
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556 __le32 rx_chain_mask;
2557
2558
2559
2560
2561
2562
2563
2564
2565 __le32 rx_timeout_pri[4];
2566
2567
2568
2569
2570
2571
2572 __le32 rx_decap_mode;
2573
2574 __le32 scan_max_pending_req;
2575
2576 __le32 bmiss_offload_max_vdev;
2577
2578 __le32 roam_offload_max_vdev;
2579
2580 __le32 roam_offload_max_ap_profiles;
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591 __le32 num_mcast_groups;
2592
2593
2594
2595
2596
2597
2598
2599
2600 __le32 num_mcast_table_elems;
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617 __le32 mcast2ucast_mode;
2618
2619
2620
2621
2622
2623
2624 __le32 tx_dbg_log_size;
2625
2626
2627 __le32 num_wds_entries;
2628
2629
2630 __le32 dma_burst_size;
2631
2632
2633
2634
2635 __le32 mac_aggr_delim;
2636
2637
2638
2639
2640
2641
2642
2643
2644 __le32 rx_skip_defrag_timeout_dup_detection_check;
2645
2646
2647
2648
2649 __le32 vow_config;
2650
2651
2652 __le32 gtk_offload_max_vdev;
2653
2654
2655 __le32 num_msdu_desc;
2656
2657
2658
2659
2660
2661
2662 __le32 max_frag_entries;
2663
2664
2665
2666
2667
2668 __le32 max_peer_ext_stats;
2669
2670
2671
2672
2673
2674
2675 __le32 smart_ant_cap;
2676
2677
2678
2679
2680 __le32 bk_minfree;
2681 __le32 be_minfree;
2682 __le32 vi_minfree;
2683 __le32 vo_minfree;
2684
2685
2686
2687
2688
2689 __le32 rx_batchmode;
2690
2691
2692
2693
2694
2695 __le32 tt_support;
2696
2697
2698
2699
2700
2701 __le32 atf_config;
2702
2703
2704
2705
2706
2707 __le32 iphdr_pad_config;
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718 __le32 qwrap_config;
2719} __packed;
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730enum wmi_10_4_feature_mask {
2731 WMI_10_4_LTEU_SUPPORT = BIT(0),
2732 WMI_10_4_COEX_GPIO_SUPPORT = BIT(1),
2733 WMI_10_4_AUX_RADIO_SPECTRAL_INTF = BIT(2),
2734 WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF = BIT(3),
2735 WMI_10_4_BSS_CHANNEL_INFO_64 = BIT(4),
2736 WMI_10_4_PEER_STATS = BIT(5),
2737};
2738
2739struct wmi_ext_resource_config_10_4_cmd {
2740
2741 __le32 host_platform_config;
2742
2743 __le32 fw_feature_bitmap;
2744};
2745
2746
2747struct host_memory_chunk {
2748
2749 __le32 req_id;
2750
2751 __le32 ptr;
2752
2753 __le32 size;
2754} __packed;
2755
2756struct wmi_host_mem_chunks {
2757 __le32 count;
2758
2759 struct host_memory_chunk items[1];
2760} __packed;
2761
2762struct wmi_init_cmd {
2763 struct wmi_resource_config resource_config;
2764 struct wmi_host_mem_chunks mem_chunks;
2765} __packed;
2766
2767
2768struct wmi_init_cmd_10x {
2769 struct wmi_resource_config_10x resource_config;
2770 struct wmi_host_mem_chunks mem_chunks;
2771} __packed;
2772
2773struct wmi_init_cmd_10_2 {
2774 struct wmi_resource_config_10_2 resource_config;
2775 struct wmi_host_mem_chunks mem_chunks;
2776} __packed;
2777
2778struct wmi_init_cmd_10_4 {
2779 struct wmi_resource_config_10_4 resource_config;
2780 struct wmi_host_mem_chunks mem_chunks;
2781} __packed;
2782
2783struct wmi_chan_list_entry {
2784 __le16 freq;
2785 u8 phy_mode;
2786 u8 reserved;
2787} __packed;
2788
2789
2790struct wmi_chan_list {
2791 __le32 tag;
2792 __le32 num_chan;
2793 struct wmi_chan_list_entry channel_list[0];
2794} __packed;
2795
2796struct wmi_bssid_list {
2797 __le32 tag;
2798 __le32 num_bssid;
2799 struct wmi_mac_addr bssid_list[0];
2800} __packed;
2801
2802struct wmi_ie_data {
2803 __le32 tag;
2804 __le32 ie_len;
2805 u8 ie_data[0];
2806} __packed;
2807
2808struct wmi_ssid {
2809 __le32 ssid_len;
2810 u8 ssid[32];
2811} __packed;
2812
2813struct wmi_ssid_list {
2814 __le32 tag;
2815 __le32 num_ssids;
2816 struct wmi_ssid ssids[0];
2817} __packed;
2818
2819
2820#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
2821
2822
2823
2824#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
2825
2826#define WLAN_SCAN_PARAMS_MAX_SSID 16
2827#define WLAN_SCAN_PARAMS_MAX_BSSID 4
2828#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
2829
2830
2831
2832
2833#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
2834
2835
2836enum wmi_scan_priority {
2837 WMI_SCAN_PRIORITY_VERY_LOW = 0,
2838 WMI_SCAN_PRIORITY_LOW,
2839 WMI_SCAN_PRIORITY_MEDIUM,
2840 WMI_SCAN_PRIORITY_HIGH,
2841 WMI_SCAN_PRIORITY_VERY_HIGH,
2842 WMI_SCAN_PRIORITY_COUNT
2843};
2844
2845struct wmi_start_scan_common {
2846
2847 __le32 scan_id;
2848
2849 __le32 scan_req_id;
2850
2851 __le32 vdev_id;
2852
2853 __le32 scan_priority;
2854
2855 __le32 notify_scan_events;
2856
2857 __le32 dwell_time_active;
2858
2859 __le32 dwell_time_passive;
2860
2861
2862
2863
2864 __le32 min_rest_time;
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878 __le32 max_rest_time;
2879
2880
2881
2882
2883
2884
2885
2886 __le32 repeat_probe_time;
2887
2888 __le32 probe_spacing_time;
2889
2890
2891
2892
2893 __le32 idle_time;
2894
2895 __le32 max_scan_time;
2896
2897
2898
2899
2900 __le32 probe_delay;
2901
2902 __le32 scan_ctrl_flags;
2903} __packed;
2904
2905struct wmi_start_scan_tlvs {
2906
2907
2908
2909 u8 tlvs[0];
2910} __packed;
2911
2912struct wmi_start_scan_cmd {
2913 struct wmi_start_scan_common common;
2914 __le32 burst_duration_ms;
2915 struct wmi_start_scan_tlvs tlvs;
2916} __packed;
2917
2918
2919struct wmi_10x_start_scan_cmd {
2920 struct wmi_start_scan_common common;
2921 struct wmi_start_scan_tlvs tlvs;
2922} __packed;
2923
2924struct wmi_ssid_arg {
2925 int len;
2926 const u8 *ssid;
2927};
2928
2929struct wmi_bssid_arg {
2930 const u8 *bssid;
2931};
2932
2933struct wmi_start_scan_arg {
2934 u32 scan_id;
2935 u32 scan_req_id;
2936 u32 vdev_id;
2937 u32 scan_priority;
2938 u32 notify_scan_events;
2939 u32 dwell_time_active;
2940 u32 dwell_time_passive;
2941 u32 min_rest_time;
2942 u32 max_rest_time;
2943 u32 repeat_probe_time;
2944 u32 probe_spacing_time;
2945 u32 idle_time;
2946 u32 max_scan_time;
2947 u32 probe_delay;
2948 u32 scan_ctrl_flags;
2949 u32 burst_duration_ms;
2950
2951 u32 ie_len;
2952 u32 n_channels;
2953 u32 n_ssids;
2954 u32 n_bssids;
2955
2956 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
2957 u16 channels[64];
2958 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
2959 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
2960};
2961
2962
2963
2964
2965#define WMI_SCAN_FLAG_PASSIVE 0x1
2966
2967#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
2968
2969#define WMI_SCAN_ADD_CCK_RATES 0x4
2970
2971#define WMI_SCAN_ADD_OFDM_RATES 0x8
2972
2973#define WMI_SCAN_CHAN_STAT_EVENT 0x10
2974
2975#define WMI_SCAN_FILTER_PROBE_REQ 0x20
2976
2977#define WMI_SCAN_BYPASS_DFS_CHN 0x40
2978
2979
2980
2981#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
2982
2983
2984#define WMI_SCAN_CLASS_MASK 0xFF000000
2985
2986enum wmi_stop_scan_type {
2987 WMI_SCAN_STOP_ONE = 0x00000000,
2988 WMI_SCAN_STOP_VDEV_ALL = 0x01000000,
2989 WMI_SCAN_STOP_ALL = 0x04000000,
2990};
2991
2992struct wmi_stop_scan_cmd {
2993 __le32 scan_req_id;
2994 __le32 scan_id;
2995 __le32 req_type;
2996 __le32 vdev_id;
2997} __packed;
2998
2999struct wmi_stop_scan_arg {
3000 u32 req_id;
3001 enum wmi_stop_scan_type req_type;
3002 union {
3003 u32 scan_id;
3004 u32 vdev_id;
3005 } u;
3006};
3007
3008struct wmi_scan_chan_list_cmd {
3009 __le32 num_scan_chans;
3010 struct wmi_channel chan_info[0];
3011} __packed;
3012
3013struct wmi_scan_chan_list_arg {
3014 u32 n_channels;
3015 struct wmi_channel_arg *channels;
3016};
3017
3018enum wmi_bss_filter {
3019 WMI_BSS_FILTER_NONE = 0,
3020 WMI_BSS_FILTER_ALL,
3021 WMI_BSS_FILTER_PROFILE,
3022 WMI_BSS_FILTER_ALL_BUT_PROFILE,
3023 WMI_BSS_FILTER_CURRENT_BSS,
3024 WMI_BSS_FILTER_ALL_BUT_BSS,
3025 WMI_BSS_FILTER_PROBED_SSID,
3026 WMI_BSS_FILTER_LAST_BSS,
3027};
3028
3029enum wmi_scan_event_type {
3030 WMI_SCAN_EVENT_STARTED = BIT(0),
3031 WMI_SCAN_EVENT_COMPLETED = BIT(1),
3032 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
3033 WMI_SCAN_EVENT_FOREIGN_CHANNEL = BIT(3),
3034 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
3035
3036 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
3037 WMI_SCAN_EVENT_START_FAILED = BIT(6),
3038 WMI_SCAN_EVENT_RESTARTED = BIT(7),
3039 WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
3040 WMI_SCAN_EVENT_MAX = BIT(15),
3041};
3042
3043enum wmi_scan_completion_reason {
3044 WMI_SCAN_REASON_COMPLETED,
3045 WMI_SCAN_REASON_CANCELLED,
3046 WMI_SCAN_REASON_PREEMPTED,
3047 WMI_SCAN_REASON_TIMEDOUT,
3048 WMI_SCAN_REASON_INTERNAL_FAILURE,
3049 WMI_SCAN_REASON_MAX,
3050};
3051
3052struct wmi_scan_event {
3053 __le32 event_type;
3054 __le32 reason;
3055 __le32 channel_freq;
3056 __le32 scan_req_id;
3057 __le32 scan_id;
3058 __le32 vdev_id;
3059} __packed;
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069#define WMI_MGMT_RX_HDR_HEADROOM 52
3070
3071
3072
3073
3074
3075
3076
3077
3078struct wmi_mgmt_rx_hdr_v1 {
3079 __le32 channel;
3080 __le32 snr;
3081 __le32 rate;
3082 __le32 phy_mode;
3083 __le32 buf_len;
3084 __le32 status;
3085} __packed;
3086
3087struct wmi_mgmt_rx_hdr_v2 {
3088 struct wmi_mgmt_rx_hdr_v1 v1;
3089 __le32 rssi_ctl[4];
3090} __packed;
3091
3092struct wmi_mgmt_rx_event_v1 {
3093 struct wmi_mgmt_rx_hdr_v1 hdr;
3094 u8 buf[0];
3095} __packed;
3096
3097struct wmi_mgmt_rx_event_v2 {
3098 struct wmi_mgmt_rx_hdr_v2 hdr;
3099 u8 buf[0];
3100} __packed;
3101
3102struct wmi_10_4_mgmt_rx_hdr {
3103 __le32 channel;
3104 __le32 snr;
3105 u8 rssi_ctl[4];
3106 __le32 rate;
3107 __le32 phy_mode;
3108 __le32 buf_len;
3109 __le32 status;
3110} __packed;
3111
3112struct wmi_10_4_mgmt_rx_event {
3113 struct wmi_10_4_mgmt_rx_hdr hdr;
3114 u8 buf[0];
3115} __packed;
3116
3117struct wmi_mgmt_rx_ext_info {
3118 __le64 rx_mac_timestamp;
3119} __packed __aligned(4);
3120
3121#define WMI_RX_STATUS_OK 0x00
3122#define WMI_RX_STATUS_ERR_CRC 0x01
3123#define WMI_RX_STATUS_ERR_DECRYPT 0x08
3124#define WMI_RX_STATUS_ERR_MIC 0x10
3125#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
3126
3127#define WMI_RX_STATUS_EXT_INFO 0x40
3128
3129#define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26
3130#define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24
3131#define PHY_ERROR_GEN_RADAR 0x05
3132
3133#define PHY_ERROR_10_4_RADAR_MASK 0x4
3134#define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000
3135
3136enum phy_err_type {
3137 PHY_ERROR_UNKNOWN,
3138 PHY_ERROR_SPECTRAL_SCAN,
3139 PHY_ERROR_FALSE_RADAR_EXT,
3140 PHY_ERROR_RADAR
3141};
3142
3143struct wmi_phyerr {
3144 __le32 tsf_timestamp;
3145 __le16 freq1;
3146 __le16 freq2;
3147 u8 rssi_combined;
3148 u8 chan_width_mhz;
3149 u8 phy_err_code;
3150 u8 rsvd0;
3151 __le32 rssi_chains[4];
3152 __le16 nf_chains[4];
3153 __le32 buf_len;
3154 u8 buf[0];
3155} __packed;
3156
3157struct wmi_phyerr_event {
3158 __le32 num_phyerrs;
3159 __le32 tsf_l32;
3160 __le32 tsf_u32;
3161 struct wmi_phyerr phyerrs[0];
3162} __packed;
3163
3164struct wmi_10_4_phyerr_event {
3165 __le32 tsf_l32;
3166 __le32 tsf_u32;
3167 __le16 freq1;
3168 __le16 freq2;
3169 u8 rssi_combined;
3170 u8 chan_width_mhz;
3171 u8 phy_err_code;
3172 u8 rsvd0;
3173 __le32 rssi_chains[4];
3174 __le16 nf_chains[4];
3175 __le32 phy_err_mask[2];
3176 __le32 tsf_timestamp;
3177 __le32 buf_len;
3178 u8 buf[0];
3179} __packed;
3180
3181#define PHYERR_TLV_SIG 0xBB
3182#define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
3183#define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
3184#define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9
3185
3186struct phyerr_radar_report {
3187 __le32 reg0;
3188 __le32 reg1;
3189} __packed;
3190
3191#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
3192#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31
3193
3194#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000
3195#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30
3196
3197#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000
3198#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20
3199
3200#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000
3201#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16
3202
3203#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00
3204#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10
3205
3206#define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF
3207#define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0
3208
3209#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000
3210#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31
3211
3212#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000
3213#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24
3214
3215#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000
3216#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16
3217
3218#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00
3219#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8
3220
3221#define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF
3222#define RADAR_REPORT_REG1_PULSE_DUR_LSB 0
3223
3224struct phyerr_fft_report {
3225 __le32 reg0;
3226 __le32 reg1;
3227} __packed;
3228
3229#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000
3230#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23
3231
3232#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000
3233#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14
3234
3235#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000
3236#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12
3237
3238#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF
3239#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0
3240
3241#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000
3242#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26
3243
3244#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000
3245#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18
3246
3247#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00
3248#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8
3249
3250#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF
3251#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0
3252
3253struct phyerr_tlv {
3254 __le16 len;
3255 u8 tag;
3256 u8 sig;
3257} __packed;
3258
3259#define DFS_RSSI_POSSIBLY_FALSE 50
3260#define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40
3261
3262struct wmi_mgmt_tx_hdr {
3263 __le32 vdev_id;
3264 struct wmi_mac_addr peer_macaddr;
3265 __le32 tx_rate;
3266 __le32 tx_power;
3267 __le32 buf_len;
3268} __packed;
3269
3270struct wmi_mgmt_tx_cmd {
3271 struct wmi_mgmt_tx_hdr hdr;
3272 u8 buf[0];
3273} __packed;
3274
3275struct wmi_echo_event {
3276 __le32 value;
3277} __packed;
3278
3279struct wmi_echo_cmd {
3280 __le32 value;
3281} __packed;
3282
3283struct wmi_pdev_set_regdomain_cmd {
3284 __le32 reg_domain;
3285 __le32 reg_domain_2G;
3286 __le32 reg_domain_5G;
3287 __le32 conformance_test_limit_2G;
3288 __le32 conformance_test_limit_5G;
3289} __packed;
3290
3291enum wmi_dfs_region {
3292
3293 WMI_UNINIT_DFS_DOMAIN = 0,
3294
3295
3296 WMI_FCC_DFS_DOMAIN = 1,
3297
3298
3299 WMI_ETSI_DFS_DOMAIN = 2,
3300
3301
3302 WMI_MKK4_DFS_DOMAIN = 3,
3303};
3304
3305struct wmi_pdev_set_regdomain_cmd_10x {
3306 __le32 reg_domain;
3307 __le32 reg_domain_2G;
3308 __le32 reg_domain_5G;
3309 __le32 conformance_test_limit_2G;
3310 __le32 conformance_test_limit_5G;
3311
3312
3313 __le32 dfs_domain;
3314} __packed;
3315
3316
3317struct wmi_pdev_set_quiet_cmd {
3318
3319 __le32 period;
3320
3321
3322 __le32 duration;
3323
3324
3325 __le32 next_start;
3326
3327
3328 __le32 enabled;
3329} __packed;
3330
3331
3332
3333
3334enum ath10k_protmode {
3335 ATH10K_PROT_NONE = 0,
3336 ATH10K_PROT_CTSONLY = 1,
3337 ATH10K_PROT_RTSCTS = 2,
3338};
3339
3340enum wmi_rtscts_profile {
3341 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
3342 WMI_RTSCTS_FOR_SECOND_RATESERIES,
3343 WMI_RTSCTS_ACROSS_SW_RETRIES
3344};
3345
3346#define WMI_RTSCTS_ENABLED 1
3347#define WMI_RTSCTS_SET_MASK 0x0f
3348#define WMI_RTSCTS_SET_LSB 0
3349
3350#define WMI_RTSCTS_PROFILE_MASK 0xf0
3351#define WMI_RTSCTS_PROFILE_LSB 4
3352
3353enum wmi_beacon_gen_mode {
3354 WMI_BEACON_STAGGERED_MODE = 0,
3355 WMI_BEACON_BURST_MODE = 1
3356};
3357
3358enum wmi_csa_event_ies_present_flag {
3359 WMI_CSA_IE_PRESENT = 0x00000001,
3360 WMI_XCSA_IE_PRESENT = 0x00000002,
3361 WMI_WBW_IE_PRESENT = 0x00000004,
3362 WMI_CSWARP_IE_PRESENT = 0x00000008,
3363};
3364
3365
3366struct wmi_csa_event {
3367 __le32 i_fc_dur;
3368
3369
3370 struct wmi_mac_addr i_addr1;
3371 struct wmi_mac_addr i_addr2;
3372 __le32 csa_ie[2];
3373 __le32 xcsa_ie[2];
3374 __le32 wb_ie[2];
3375 __le32 cswarp_ie;
3376 __le32 ies_present_flag;
3377} __packed;
3378
3379
3380#define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3381#define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3382#define PEER_DEFAULT_STATS_UPDATE_PERIOD 500
3383
3384struct wmi_pdev_param_map {
3385 u32 tx_chain_mask;
3386 u32 rx_chain_mask;
3387 u32 txpower_limit2g;
3388 u32 txpower_limit5g;
3389 u32 txpower_scale;
3390 u32 beacon_gen_mode;
3391 u32 beacon_tx_mode;
3392 u32 resmgr_offchan_mode;
3393 u32 protection_mode;
3394 u32 dynamic_bw;
3395 u32 non_agg_sw_retry_th;
3396 u32 agg_sw_retry_th;
3397 u32 sta_kickout_th;
3398 u32 ac_aggrsize_scaling;
3399 u32 ltr_enable;
3400 u32 ltr_ac_latency_be;
3401 u32 ltr_ac_latency_bk;
3402 u32 ltr_ac_latency_vi;
3403 u32 ltr_ac_latency_vo;
3404 u32 ltr_ac_latency_timeout;
3405 u32 ltr_sleep_override;
3406 u32 ltr_rx_override;
3407 u32 ltr_tx_activity_timeout;
3408 u32 l1ss_enable;
3409 u32 dsleep_enable;
3410 u32 pcielp_txbuf_flush;
3411 u32 pcielp_txbuf_watermark;
3412 u32 pcielp_txbuf_tmo_en;
3413 u32 pcielp_txbuf_tmo_value;
3414 u32 pdev_stats_update_period;
3415 u32 vdev_stats_update_period;
3416 u32 peer_stats_update_period;
3417 u32 bcnflt_stats_update_period;
3418 u32 pmf_qos;
3419 u32 arp_ac_override;
3420 u32 dcs;
3421 u32 ani_enable;
3422 u32 ani_poll_period;
3423 u32 ani_listen_period;
3424 u32 ani_ofdm_level;
3425 u32 ani_cck_level;
3426 u32 dyntxchain;
3427 u32 proxy_sta;
3428 u32 idle_ps_config;
3429 u32 power_gating_sleep;
3430 u32 fast_channel_reset;
3431 u32 burst_dur;
3432 u32 burst_enable;
3433 u32 cal_period;
3434 u32 aggr_burst;
3435 u32 rx_decap_mode;
3436 u32 smart_antenna_default_antenna;
3437 u32 igmpmld_override;
3438 u32 igmpmld_tid;
3439 u32 antenna_gain;
3440 u32 rx_filter;
3441 u32 set_mcast_to_ucast_tid;
3442 u32 proxy_sta_mode;
3443 u32 set_mcast2ucast_mode;
3444 u32 set_mcast2ucast_buffer;
3445 u32 remove_mcast2ucast_buffer;
3446 u32 peer_sta_ps_statechg_enable;
3447 u32 igmpmld_ac_override;
3448 u32 block_interbss;
3449 u32 set_disable_reset_cmdid;
3450 u32 set_msdu_ttl_cmdid;
3451 u32 set_ppdu_duration_cmdid;
3452 u32 txbf_sound_period_cmdid;
3453 u32 set_promisc_mode_cmdid;
3454 u32 set_burst_mode_cmdid;
3455 u32 en_stats;
3456 u32 mu_group_policy;
3457 u32 noise_detection;
3458 u32 noise_threshold;
3459 u32 dpd_enable;
3460 u32 set_mcast_bcast_echo;
3461 u32 atf_strict_sch;
3462 u32 atf_sched_duration;
3463 u32 ant_plzn;
3464 u32 mgmt_retry_limit;
3465 u32 sensitivity_level;
3466 u32 signed_txpower_2g;
3467 u32 signed_txpower_5g;
3468 u32 enable_per_tid_amsdu;
3469 u32 enable_per_tid_ampdu;
3470 u32 cca_threshold;
3471 u32 rts_fixed_rate;
3472 u32 pdev_reset;
3473 u32 wapi_mbssid_offset;
3474 u32 arp_srcaddr;
3475 u32 arp_dstaddr;
3476 u32 enable_btcoex;
3477};
3478
3479#define WMI_PDEV_PARAM_UNSUPPORTED 0
3480
3481enum wmi_pdev_param {
3482
3483 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3484
3485 WMI_PDEV_PARAM_RX_CHAIN_MASK,
3486
3487 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
3488
3489 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
3490
3491 WMI_PDEV_PARAM_TXPOWER_SCALE,
3492
3493 WMI_PDEV_PARAM_BEACON_GEN_MODE,
3494
3495 WMI_PDEV_PARAM_BEACON_TX_MODE,
3496
3497
3498
3499
3500 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3501
3502
3503
3504
3505 WMI_PDEV_PARAM_PROTECTION_MODE,
3506
3507
3508
3509
3510
3511
3512 WMI_PDEV_PARAM_DYNAMIC_BW,
3513
3514 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3515
3516 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
3517
3518 WMI_PDEV_PARAM_STA_KICKOUT_TH,
3519
3520 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3521
3522 WMI_PDEV_PARAM_LTR_ENABLE,
3523
3524 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
3525
3526 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
3527
3528 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
3529
3530 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
3531
3532 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3533
3534 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3535
3536 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
3537
3538 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3539
3540 WMI_PDEV_PARAM_L1SS_ENABLE,
3541
3542 WMI_PDEV_PARAM_DSLEEP_ENABLE,
3543
3544 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3545
3546 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3547
3548 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3549
3550 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3551
3552 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3553
3554 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3555
3556 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3557
3558 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3559
3560 WMI_PDEV_PARAM_PMF_QOS,
3561
3562 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
3563
3564 WMI_PDEV_PARAM_DCS,
3565
3566 WMI_PDEV_PARAM_ANI_ENABLE,
3567
3568 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
3569
3570 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
3571
3572 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
3573
3574 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
3575
3576 WMI_PDEV_PARAM_DYNTXCHAIN,
3577
3578 WMI_PDEV_PARAM_PROXY_STA,
3579
3580 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
3581
3582 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
3583};
3584
3585enum wmi_10x_pdev_param {
3586
3587 WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3588
3589 WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
3590
3591 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
3592
3593 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
3594
3595 WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
3596
3597 WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
3598
3599 WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
3600
3601
3602
3603
3604 WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3605
3606
3607
3608
3609 WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3610
3611 WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3612
3613 WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3614
3615 WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3616
3617 WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
3618
3619 WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3620
3621 WMI_10X_PDEV_PARAM_LTR_ENABLE,
3622
3623 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
3624
3625 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
3626
3627 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
3628
3629 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
3630
3631 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3632
3633 WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3634
3635 WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
3636
3637 WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3638
3639 WMI_10X_PDEV_PARAM_L1SS_ENABLE,
3640
3641 WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
3642
3643 WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3644
3645 WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3646
3647 WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3648
3649 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3650
3651 WMI_10X_PDEV_PARAM_PMF_QOS,
3652
3653 WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
3654
3655 WMI_10X_PDEV_PARAM_DCS,
3656
3657 WMI_10X_PDEV_PARAM_ANI_ENABLE,
3658
3659 WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
3660
3661 WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
3662
3663 WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
3664
3665 WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
3666
3667 WMI_10X_PDEV_PARAM_DYNTXCHAIN,
3668
3669 WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
3670
3671 WMI_10X_PDEV_PARAM_BURST_DUR,
3672
3673 WMI_10X_PDEV_PARAM_BURST_ENABLE,
3674
3675
3676 WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
3677 WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
3678 WMI_10X_PDEV_PARAM_IGMPMLD_TID,
3679 WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
3680 WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
3681 WMI_10X_PDEV_PARAM_RX_FILTER,
3682 WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
3683 WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
3684 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
3685 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
3686 WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
3687 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
3688 WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
3689 WMI_10X_PDEV_PARAM_CAL_PERIOD
3690};
3691
3692enum wmi_10_4_pdev_param {
3693 WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3694 WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
3695 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
3696 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
3697 WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
3698 WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
3699 WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
3700 WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3701 WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
3702 WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
3703 WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3704 WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
3705 WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
3706 WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3707 WMI_10_4_PDEV_PARAM_LTR_ENABLE,
3708 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
3709 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
3710 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
3711 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
3712 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3713 WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3714 WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
3715 WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3716 WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
3717 WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
3718 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3719 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3720 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3721 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3722 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3723 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3724 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3725 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3726 WMI_10_4_PDEV_PARAM_PMF_QOS,
3727 WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
3728 WMI_10_4_PDEV_PARAM_DCS,
3729 WMI_10_4_PDEV_PARAM_ANI_ENABLE,
3730 WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
3731 WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
3732 WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
3733 WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
3734 WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
3735 WMI_10_4_PDEV_PARAM_PROXY_STA,
3736 WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
3737 WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
3738 WMI_10_4_PDEV_PARAM_AGGR_BURST,
3739 WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
3740 WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
3741 WMI_10_4_PDEV_PARAM_BURST_DUR,
3742 WMI_10_4_PDEV_PARAM_BURST_ENABLE,
3743 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
3744 WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
3745 WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
3746 WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
3747 WMI_10_4_PDEV_PARAM_RX_FILTER,
3748 WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
3749 WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
3750 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
3751 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
3752 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
3753 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
3754 WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
3755 WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
3756 WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
3757 WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
3758 WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
3759 WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
3760 WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
3761 WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
3762 WMI_10_4_PDEV_PARAM_EN_STATS,
3763 WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
3764 WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
3765 WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
3766 WMI_10_4_PDEV_PARAM_DPD_ENABLE,
3767 WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
3768 WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
3769 WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
3770 WMI_10_4_PDEV_PARAM_ANT_PLZN,
3771 WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
3772 WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
3773 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
3774 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
3775 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
3776 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
3777 WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
3778 WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
3779 WMI_10_4_PDEV_PARAM_CAL_PERIOD,
3780 WMI_10_4_PDEV_PARAM_PDEV_RESET,
3781 WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
3782 WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
3783 WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
3784 WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB,
3785 WMI_10_4_PDEV_PARAM_RX_BATCHMODE,
3786 WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY,
3787 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
3788 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
3789 WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE,
3790 WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
3791 WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY,
3792 WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
3793};
3794
3795struct wmi_pdev_set_param_cmd {
3796 __le32 param_id;
3797 __le32 param_value;
3798} __packed;
3799
3800
3801#define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
3802
3803struct wmi_pdev_get_tpc_config_cmd {
3804
3805 __le32 param;
3806} __packed;
3807
3808#define WMI_TPC_CONFIG_PARAM 1
3809#define WMI_TPC_RATE_MAX 160
3810#define WMI_TPC_TX_N_CHAIN 4
3811#define WMI_TPC_PREAM_TABLE_MAX 10
3812#define WMI_TPC_FLAG 3
3813#define WMI_TPC_BUF_SIZE 10
3814
3815enum wmi_tpc_table_type {
3816 WMI_TPC_TABLE_TYPE_CDD = 0,
3817 WMI_TPC_TABLE_TYPE_STBC = 1,
3818 WMI_TPC_TABLE_TYPE_TXBF = 2,
3819};
3820
3821enum wmi_tpc_config_event_flag {
3822 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1,
3823 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2,
3824 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4,
3825};
3826
3827struct wmi_pdev_tpc_config_event {
3828 __le32 reg_domain;
3829 __le32 chan_freq;
3830 __le32 phy_mode;
3831 __le32 twice_antenna_reduction;
3832 __le32 twice_max_rd_power;
3833 a_sle32 twice_antenna_gain;
3834 __le32 power_limit;
3835 __le32 rate_max;
3836 __le32 num_tx_chain;
3837 __le32 ctl;
3838 __le32 flags;
3839 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
3840 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
3841 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
3842 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
3843 u8 rates_array[WMI_TPC_RATE_MAX];
3844} __packed;
3845
3846
3847enum wmi_tp_scale {
3848 WMI_TP_SCALE_MAX = 0,
3849 WMI_TP_SCALE_50 = 1,
3850 WMI_TP_SCALE_25 = 2,
3851 WMI_TP_SCALE_12 = 3,
3852 WMI_TP_SCALE_MIN = 4,
3853 WMI_TP_SCALE_SIZE = 5,
3854};
3855
3856struct wmi_pdev_chanlist_update_event {
3857
3858 __le32 num_chan;
3859
3860 struct wmi_channel channel_list[1];
3861} __packed;
3862
3863#define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
3864
3865struct wmi_debug_mesg_event {
3866
3867 char bufp[WMI_MAX_DEBUG_MESG];
3868} __packed;
3869
3870enum {
3871
3872 VDEV_SUBTYPE_P2PDEV = 0,
3873
3874 VDEV_SUBTYPE_P2PCLI,
3875
3876 VDEV_SUBTYPE_P2PGO,
3877
3878 VDEV_SUBTYPE_BT,
3879};
3880
3881struct wmi_pdev_set_channel_cmd {
3882
3883 struct wmi_channel chan;
3884} __packed;
3885
3886struct wmi_pdev_pktlog_enable_cmd {
3887 __le32 ev_bitmap;
3888} __packed;
3889
3890
3891#define WMI_DSCP_MAP_MAX (64)
3892struct wmi_pdev_set_dscp_tid_map_cmd {
3893
3894 __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
3895} __packed;
3896
3897enum mcast_bcast_rate_id {
3898 WMI_SET_MCAST_RATE,
3899 WMI_SET_BCAST_RATE
3900};
3901
3902struct mcast_bcast_rate {
3903 enum mcast_bcast_rate_id rate_id;
3904 __le32 rate;
3905} __packed;
3906
3907struct wmi_wmm_params {
3908 __le32 cwmin;
3909 __le32 cwmax;
3910 __le32 aifs;
3911 __le32 txop;
3912 __le32 acm;
3913 __le32 no_ack;
3914} __packed;
3915
3916struct wmi_pdev_set_wmm_params {
3917 struct wmi_wmm_params ac_be;
3918 struct wmi_wmm_params ac_bk;
3919 struct wmi_wmm_params ac_vi;
3920 struct wmi_wmm_params ac_vo;
3921} __packed;
3922
3923struct wmi_wmm_params_arg {
3924 u32 cwmin;
3925 u32 cwmax;
3926 u32 aifs;
3927 u32 txop;
3928 u32 acm;
3929 u32 no_ack;
3930};
3931
3932struct wmi_wmm_params_all_arg {
3933 struct wmi_wmm_params_arg ac_be;
3934 struct wmi_wmm_params_arg ac_bk;
3935 struct wmi_wmm_params_arg ac_vi;
3936 struct wmi_wmm_params_arg ac_vo;
3937};
3938
3939struct wmi_pdev_stats_tx {
3940
3941 __le32 comp_queued;
3942
3943
3944 __le32 comp_delivered;
3945
3946
3947 __le32 msdu_enqued;
3948
3949
3950 __le32 mpdu_enqued;
3951
3952
3953 __le32 wmm_drop;
3954
3955
3956 __le32 local_enqued;
3957
3958
3959 __le32 local_freed;
3960
3961
3962 __le32 hw_queued;
3963
3964
3965 __le32 hw_reaped;
3966
3967
3968 __le32 underrun;
3969
3970
3971 __le32 tx_abort;
3972
3973
3974 __le32 mpdus_requed;
3975
3976
3977 __le32 tx_ko;
3978
3979
3980 __le32 data_rc;
3981
3982
3983 __le32 self_triggers;
3984
3985
3986 __le32 sw_retry_failure;
3987
3988
3989 __le32 illgl_rate_phy_err;
3990
3991
3992 __le32 pdev_cont_xretry;
3993
3994
3995 __le32 pdev_tx_timeout;
3996
3997
3998 __le32 pdev_resets;
3999
4000
4001 __le32 stateless_tid_alloc_failure;
4002
4003 __le32 phy_underrun;
4004
4005
4006 __le32 txop_ovf;
4007} __packed;
4008
4009struct wmi_10_4_pdev_stats_tx {
4010
4011 __le32 comp_queued;
4012
4013
4014 __le32 comp_delivered;
4015
4016
4017 __le32 msdu_enqued;
4018
4019
4020 __le32 mpdu_enqued;
4021
4022
4023 __le32 wmm_drop;
4024
4025
4026 __le32 local_enqued;
4027
4028
4029 __le32 local_freed;
4030
4031
4032 __le32 hw_queued;
4033
4034
4035 __le32 hw_reaped;
4036
4037
4038 __le32 underrun;
4039
4040
4041 __le32 hw_paused;
4042
4043
4044 __le32 tx_abort;
4045
4046
4047 __le32 mpdus_requed;
4048
4049
4050 __le32 tx_ko;
4051
4052
4053 __le32 data_rc;
4054
4055
4056 __le32 self_triggers;
4057
4058
4059 __le32 sw_retry_failure;
4060
4061
4062 __le32 illgl_rate_phy_err;
4063
4064
4065 __le32 pdev_cont_xretry;
4066
4067
4068 __le32 pdev_tx_timeout;
4069
4070
4071 __le32 pdev_resets;
4072
4073
4074 __le32 stateless_tid_alloc_failure;
4075
4076 __le32 phy_underrun;
4077
4078
4079 __le32 txop_ovf;
4080
4081
4082 __le32 seq_posted;
4083
4084
4085 __le32 seq_failed_queueing;
4086
4087
4088 __le32 seq_completed;
4089
4090
4091 __le32 seq_restarted;
4092
4093
4094 __le32 mu_seq_posted;
4095
4096
4097 __le32 mpdus_sw_flush;
4098
4099
4100 __le32 mpdus_hw_filter;
4101
4102
4103
4104
4105 __le32 mpdus_truncated;
4106
4107
4108 __le32 mpdus_ack_failed;
4109
4110
4111 __le32 mpdus_expired;
4112} __packed;
4113
4114struct wmi_pdev_stats_rx {
4115
4116 __le32 mid_ppdu_route_change;
4117
4118
4119 __le32 status_rcvd;
4120
4121
4122 __le32 r0_frags;
4123 __le32 r1_frags;
4124 __le32 r2_frags;
4125 __le32 r3_frags;
4126
4127
4128 __le32 htt_msdus;
4129 __le32 htt_mpdus;
4130
4131
4132 __le32 loc_msdus;
4133 __le32 loc_mpdus;
4134
4135
4136 __le32 oversize_amsdu;
4137
4138
4139 __le32 phy_errs;
4140
4141
4142 __le32 phy_err_drop;
4143
4144
4145 __le32 mpdu_errs;
4146} __packed;
4147
4148struct wmi_pdev_stats_peer {
4149
4150 __le32 dummy;
4151} __packed;
4152
4153enum wmi_stats_id {
4154 WMI_STAT_PEER = BIT(0),
4155 WMI_STAT_AP = BIT(1),
4156 WMI_STAT_PDEV = BIT(2),
4157 WMI_STAT_VDEV = BIT(3),
4158 WMI_STAT_BCNFLT = BIT(4),
4159 WMI_STAT_VDEV_RATE = BIT(5),
4160};
4161
4162enum wmi_10_4_stats_id {
4163 WMI_10_4_STAT_PEER = BIT(0),
4164 WMI_10_4_STAT_AP = BIT(1),
4165 WMI_10_4_STAT_INST = BIT(2),
4166 WMI_10_4_STAT_PEER_EXTD = BIT(3),
4167};
4168
4169struct wlan_inst_rssi_args {
4170 __le16 cfg_retry_count;
4171 __le16 retry_count;
4172};
4173
4174struct wmi_request_stats_cmd {
4175 __le32 stats_id;
4176
4177 __le32 vdev_id;
4178
4179
4180 struct wmi_mac_addr peer_macaddr;
4181
4182
4183 struct wlan_inst_rssi_args inst_rssi_args;
4184} __packed;
4185
4186
4187enum {
4188
4189 WMI_PDEV_SUSPEND,
4190
4191
4192 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
4193};
4194
4195struct wmi_pdev_suspend_cmd {
4196
4197 __le32 suspend_opt;
4198} __packed;
4199
4200struct wmi_stats_event {
4201 __le32 stats_id;
4202
4203
4204
4205
4206 __le32 num_pdev_stats;
4207
4208
4209
4210
4211 __le32 num_vdev_stats;
4212
4213
4214
4215
4216 __le32 num_peer_stats;
4217 __le32 num_bcnflt_stats;
4218
4219
4220
4221
4222
4223
4224
4225
4226
4227 u8 data[0];
4228} __packed;
4229
4230struct wmi_10_2_stats_event {
4231 __le32 stats_id;
4232 __le32 num_pdev_stats;
4233 __le32 num_pdev_ext_stats;
4234 __le32 num_vdev_stats;
4235 __le32 num_peer_stats;
4236 __le32 num_bcnflt_stats;
4237 u8 data[0];
4238} __packed;
4239
4240
4241
4242
4243
4244struct wmi_pdev_stats_base {
4245 __le32 chan_nf;
4246 __le32 tx_frame_count;
4247 __le32 rx_frame_count;
4248 __le32 rx_clear_count;
4249 __le32 cycle_count;
4250 __le32 phy_err_count;
4251 __le32 chan_tx_pwr;
4252} __packed;
4253
4254struct wmi_pdev_stats {
4255 struct wmi_pdev_stats_base base;
4256 struct wmi_pdev_stats_tx tx;
4257 struct wmi_pdev_stats_rx rx;
4258 struct wmi_pdev_stats_peer peer;
4259} __packed;
4260
4261struct wmi_pdev_stats_extra {
4262 __le32 ack_rx_bad;
4263 __le32 rts_bad;
4264 __le32 rts_good;
4265 __le32 fcs_bad;
4266 __le32 no_beacons;
4267 __le32 mib_int_count;
4268} __packed;
4269
4270struct wmi_10x_pdev_stats {
4271 struct wmi_pdev_stats_base base;
4272 struct wmi_pdev_stats_tx tx;
4273 struct wmi_pdev_stats_rx rx;
4274 struct wmi_pdev_stats_peer peer;
4275 struct wmi_pdev_stats_extra extra;
4276} __packed;
4277
4278struct wmi_pdev_stats_mem {
4279 __le32 dram_free;
4280 __le32 iram_free;
4281} __packed;
4282
4283struct wmi_10_2_pdev_stats {
4284 struct wmi_pdev_stats_base base;
4285 struct wmi_pdev_stats_tx tx;
4286 __le32 mc_drop;
4287 struct wmi_pdev_stats_rx rx;
4288 __le32 pdev_rx_timeout;
4289 struct wmi_pdev_stats_mem mem;
4290 struct wmi_pdev_stats_peer peer;
4291 struct wmi_pdev_stats_extra extra;
4292} __packed;
4293
4294struct wmi_10_4_pdev_stats {
4295 struct wmi_pdev_stats_base base;
4296 struct wmi_10_4_pdev_stats_tx tx;
4297 struct wmi_pdev_stats_rx rx;
4298 __le32 rx_ovfl_errs;
4299 struct wmi_pdev_stats_mem mem;
4300 __le32 sram_free_size;
4301 struct wmi_pdev_stats_extra extra;
4302} __packed;
4303
4304
4305
4306
4307
4308struct wmi_vdev_stats {
4309 __le32 vdev_id;
4310} __packed;
4311
4312
4313
4314
4315
4316struct wmi_peer_stats {
4317 struct wmi_mac_addr peer_macaddr;
4318 __le32 peer_rssi;
4319 __le32 peer_tx_rate;
4320} __packed;
4321
4322struct wmi_10x_peer_stats {
4323 struct wmi_peer_stats old;
4324 __le32 peer_rx_rate;
4325} __packed;
4326
4327struct wmi_10_2_peer_stats {
4328 struct wmi_peer_stats old;
4329 __le32 peer_rx_rate;
4330 __le32 current_per;
4331 __le32 retries;
4332 __le32 tx_rate_count;
4333 __le32 max_4ms_frame_len;
4334 __le32 total_sub_frames;
4335 __le32 tx_bytes;
4336 __le32 num_pkt_loss_overflow[4];
4337 __le32 num_pkt_loss_excess_retry[4];
4338} __packed;
4339
4340struct wmi_10_2_4_peer_stats {
4341 struct wmi_10_2_peer_stats common;
4342 __le32 peer_rssi_changed;
4343} __packed;
4344
4345struct wmi_10_2_4_ext_peer_stats {
4346 struct wmi_10_2_peer_stats common;
4347 __le32 peer_rssi_changed;
4348 __le32 rx_duration;
4349} __packed;
4350
4351struct wmi_10_4_peer_stats {
4352 struct wmi_mac_addr peer_macaddr;
4353 __le32 peer_rssi;
4354 __le32 peer_rssi_seq_num;
4355 __le32 peer_tx_rate;
4356 __le32 peer_rx_rate;
4357 __le32 current_per;
4358 __le32 retries;
4359 __le32 tx_rate_count;
4360 __le32 max_4ms_frame_len;
4361 __le32 total_sub_frames;
4362 __le32 tx_bytes;
4363 __le32 num_pkt_loss_overflow[4];
4364 __le32 num_pkt_loss_excess_retry[4];
4365 __le32 peer_rssi_changed;
4366} __packed;
4367
4368struct wmi_10_4_peer_extd_stats {
4369 struct wmi_mac_addr peer_macaddr;
4370 __le32 inactive_time;
4371 __le32 peer_chain_rssi;
4372 __le32 rx_duration;
4373 __le32 reserved[10];
4374} __packed;
4375
4376struct wmi_10_4_bss_bcn_stats {
4377 __le32 vdev_id;
4378 __le32 bss_bcns_dropped;
4379 __le32 bss_bcn_delivered;
4380} __packed;
4381
4382struct wmi_10_4_bss_bcn_filter_stats {
4383 __le32 bcns_dropped;
4384 __le32 bcns_delivered;
4385 __le32 active_filters;
4386 struct wmi_10_4_bss_bcn_stats bss_stats;
4387} __packed;
4388
4389struct wmi_10_2_pdev_ext_stats {
4390 __le32 rx_rssi_comb;
4391 __le32 rx_rssi[4];
4392 __le32 rx_mcs[10];
4393 __le32 tx_mcs[10];
4394 __le32 ack_rssi;
4395} __packed;
4396
4397struct wmi_vdev_create_cmd {
4398 __le32 vdev_id;
4399 __le32 vdev_type;
4400 __le32 vdev_subtype;
4401 struct wmi_mac_addr vdev_macaddr;
4402} __packed;
4403
4404enum wmi_vdev_type {
4405 WMI_VDEV_TYPE_AP = 1,
4406 WMI_VDEV_TYPE_STA = 2,
4407 WMI_VDEV_TYPE_IBSS = 3,
4408 WMI_VDEV_TYPE_MONITOR = 4,
4409};
4410
4411enum wmi_vdev_subtype {
4412 WMI_VDEV_SUBTYPE_NONE,
4413 WMI_VDEV_SUBTYPE_P2P_DEVICE,
4414 WMI_VDEV_SUBTYPE_P2P_CLIENT,
4415 WMI_VDEV_SUBTYPE_P2P_GO,
4416 WMI_VDEV_SUBTYPE_PROXY_STA,
4417 WMI_VDEV_SUBTYPE_MESH_11S,
4418 WMI_VDEV_SUBTYPE_MESH_NON_11S,
4419};
4420
4421enum wmi_vdev_subtype_legacy {
4422 WMI_VDEV_SUBTYPE_LEGACY_NONE = 0,
4423 WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV = 1,
4424 WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI = 2,
4425 WMI_VDEV_SUBTYPE_LEGACY_P2P_GO = 3,
4426 WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4,
4427};
4428
4429enum wmi_vdev_subtype_10_2_4 {
4430 WMI_VDEV_SUBTYPE_10_2_4_NONE = 0,
4431 WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV = 1,
4432 WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI = 2,
4433 WMI_VDEV_SUBTYPE_10_2_4_P2P_GO = 3,
4434 WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4,
4435 WMI_VDEV_SUBTYPE_10_2_4_MESH_11S = 5,
4436};
4437
4438enum wmi_vdev_subtype_10_4 {
4439 WMI_VDEV_SUBTYPE_10_4_NONE = 0,
4440 WMI_VDEV_SUBTYPE_10_4_P2P_DEV = 1,
4441 WMI_VDEV_SUBTYPE_10_4_P2P_CLI = 2,
4442 WMI_VDEV_SUBTYPE_10_4_P2P_GO = 3,
4443 WMI_VDEV_SUBTYPE_10_4_PROXY_STA = 4,
4444 WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5,
4445 WMI_VDEV_SUBTYPE_10_4_MESH_11S = 6,
4446};
4447
4448
4449
4450
4451
4452
4453
4454
4455#define WMI_VDEV_START_HIDDEN_SSID (1 << 0)
4456
4457
4458
4459
4460
4461
4462
4463#define WMI_VDEV_START_PMF_ENABLED (1 << 1)
4464
4465struct wmi_p2p_noa_descriptor {
4466 __le32 type_count;
4467 __le32 duration;
4468 __le32 interval;
4469 __le32 start_time;
4470} __packed;
4471
4472struct wmi_vdev_start_request_cmd {
4473
4474 struct wmi_channel chan;
4475
4476 __le32 vdev_id;
4477
4478 __le32 requestor_id;
4479
4480 __le32 beacon_interval;
4481
4482 __le32 dtim_period;
4483
4484 __le32 flags;
4485
4486 struct wmi_ssid ssid;
4487
4488 __le32 bcn_tx_rate;
4489
4490 __le32 bcn_tx_power;
4491
4492 __le32 num_noa_descriptors;
4493
4494
4495
4496
4497 __le32 disable_hw_ack;
4498
4499 struct wmi_p2p_noa_descriptor noa_descriptors[2];
4500} __packed;
4501
4502struct wmi_vdev_restart_request_cmd {
4503 struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
4504} __packed;
4505
4506struct wmi_vdev_start_request_arg {
4507 u32 vdev_id;
4508 struct wmi_channel_arg channel;
4509 u32 bcn_intval;
4510 u32 dtim_period;
4511 u8 *ssid;
4512 u32 ssid_len;
4513 u32 bcn_tx_rate;
4514 u32 bcn_tx_power;
4515 bool disable_hw_ack;
4516 bool hidden_ssid;
4517 bool pmf_enabled;
4518};
4519
4520struct wmi_vdev_delete_cmd {
4521
4522 __le32 vdev_id;
4523} __packed;
4524
4525struct wmi_vdev_up_cmd {
4526 __le32 vdev_id;
4527 __le32 vdev_assoc_id;
4528 struct wmi_mac_addr vdev_bssid;
4529} __packed;
4530
4531struct wmi_vdev_stop_cmd {
4532 __le32 vdev_id;
4533} __packed;
4534
4535struct wmi_vdev_down_cmd {
4536 __le32 vdev_id;
4537} __packed;
4538
4539struct wmi_vdev_standby_response_cmd {
4540
4541 __le32 vdev_id;
4542} __packed;
4543
4544struct wmi_vdev_resume_response_cmd {
4545
4546 __le32 vdev_id;
4547} __packed;
4548
4549struct wmi_vdev_set_param_cmd {
4550 __le32 vdev_id;
4551 __le32 param_id;
4552 __le32 param_value;
4553} __packed;
4554
4555#define WMI_MAX_KEY_INDEX 3
4556#define WMI_MAX_KEY_LEN 32
4557
4558#define WMI_KEY_PAIRWISE 0x00
4559#define WMI_KEY_GROUP 0x01
4560#define WMI_KEY_TX_USAGE 0x02
4561
4562struct wmi_key_seq_counter {
4563 __le32 key_seq_counter_l;
4564 __le32 key_seq_counter_h;
4565} __packed;
4566
4567#define WMI_CIPHER_NONE 0x0
4568#define WMI_CIPHER_WEP 0x1
4569#define WMI_CIPHER_TKIP 0x2
4570#define WMI_CIPHER_AES_OCB 0x3
4571#define WMI_CIPHER_AES_CCM 0x4
4572#define WMI_CIPHER_WAPI 0x5
4573#define WMI_CIPHER_CKIP 0x6
4574#define WMI_CIPHER_AES_CMAC 0x7
4575
4576struct wmi_vdev_install_key_cmd {
4577 __le32 vdev_id;
4578 struct wmi_mac_addr peer_macaddr;
4579 __le32 key_idx;
4580 __le32 key_flags;
4581 __le32 key_cipher;
4582 struct wmi_key_seq_counter key_rsc_counter;
4583 struct wmi_key_seq_counter key_global_rsc_counter;
4584 struct wmi_key_seq_counter key_tsc_counter;
4585 u8 wpi_key_rsc_counter[16];
4586 u8 wpi_key_tsc_counter[16];
4587 __le32 key_len;
4588 __le32 key_txmic_len;
4589 __le32 key_rxmic_len;
4590
4591
4592 u8 key_data[0];
4593} __packed;
4594
4595struct wmi_vdev_install_key_arg {
4596 u32 vdev_id;
4597 const u8 *macaddr;
4598 u32 key_idx;
4599 u32 key_flags;
4600 u32 key_cipher;
4601 u32 key_len;
4602 u32 key_txmic_len;
4603 u32 key_rxmic_len;
4604 const void *key_data;
4605};
4606
4607
4608
4609
4610
4611
4612
4613
4614
4615
4616
4617
4618
4619
4620enum wmi_rate_preamble {
4621 WMI_RATE_PREAMBLE_OFDM,
4622 WMI_RATE_PREAMBLE_CCK,
4623 WMI_RATE_PREAMBLE_HT,
4624 WMI_RATE_PREAMBLE_VHT,
4625};
4626
4627#define ATH10K_HW_NSS(rate) (1 + (((rate) >> 4) & 0x3))
4628#define ATH10K_HW_PREAMBLE(rate) (((rate) >> 6) & 0x3)
4629#define ATH10K_HW_MCS_RATE(rate) ((rate) & 0xf)
4630#define ATH10K_HW_LEGACY_RATE(rate) ((rate) & 0x3f)
4631#define ATH10K_HW_BW(flags) (((flags) >> 3) & 0x3)
4632#define ATH10K_HW_GI(flags) (((flags) >> 5) & 0x1)
4633#define ATH10K_HW_RATECODE(rate, nss, preamble) \
4634 (((preamble) << 6) | ((nss) << 4) | (rate))
4635
4636#define VHT_MCS_NUM 10
4637#define VHT_BW_NUM 4
4638#define VHT_NSS_NUM 4
4639
4640
4641#define WMI_FIXED_RATE_NONE (0xff)
4642
4643struct wmi_vdev_param_map {
4644 u32 rts_threshold;
4645 u32 fragmentation_threshold;
4646 u32 beacon_interval;
4647 u32 listen_interval;
4648 u32 multicast_rate;
4649 u32 mgmt_tx_rate;
4650 u32 slot_time;
4651 u32 preamble;
4652 u32 swba_time;
4653 u32 wmi_vdev_stats_update_period;
4654 u32 wmi_vdev_pwrsave_ageout_time;
4655 u32 wmi_vdev_host_swba_interval;
4656 u32 dtim_period;
4657 u32 wmi_vdev_oc_scheduler_air_time_limit;
4658 u32 wds;
4659 u32 atim_window;
4660 u32 bmiss_count_max;
4661 u32 bmiss_first_bcnt;
4662 u32 bmiss_final_bcnt;
4663 u32 feature_wmm;
4664 u32 chwidth;
4665 u32 chextoffset;
4666 u32 disable_htprotection;
4667 u32 sta_quickkickout;
4668 u32 mgmt_rate;
4669 u32 protection_mode;
4670 u32 fixed_rate;
4671 u32 sgi;
4672 u32 ldpc;
4673 u32 tx_stbc;
4674 u32 rx_stbc;
4675 u32 intra_bss_fwd;
4676 u32 def_keyid;
4677 u32 nss;
4678 u32 bcast_data_rate;
4679 u32 mcast_data_rate;
4680 u32 mcast_indicate;
4681 u32 dhcp_indicate;
4682 u32 unknown_dest_indicate;
4683 u32 ap_keepalive_min_idle_inactive_time_secs;
4684 u32 ap_keepalive_max_idle_inactive_time_secs;
4685 u32 ap_keepalive_max_unresponsive_time_secs;
4686 u32 ap_enable_nawds;
4687 u32 mcast2ucast_set;
4688 u32 enable_rtscts;
4689 u32 txbf;
4690 u32 packet_powersave;
4691 u32 drop_unencry;
4692 u32 tx_encap_type;
4693 u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
4694 u32 rc_num_retries;
4695 u32 cabq_maxdur;
4696 u32 mfptest_set;
4697 u32 rts_fixed_rate;
4698 u32 vht_sgimask;
4699 u32 vht80_ratemask;
4700 u32 early_rx_adjust_enable;
4701 u32 early_rx_tgt_bmiss_num;
4702 u32 early_rx_bmiss_sample_cycle;
4703 u32 early_rx_slop_step;
4704 u32 early_rx_init_slop;
4705 u32 early_rx_adjust_pause;
4706 u32 proxy_sta;
4707 u32 meru_vc;
4708 u32 rx_decap_type;
4709 u32 bw_nss_ratemask;
4710 u32 inc_tsf;
4711 u32 dec_tsf;
4712};
4713
4714#define WMI_VDEV_PARAM_UNSUPPORTED 0
4715
4716
4717enum wmi_vdev_param {
4718
4719 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
4720
4721 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
4722
4723 WMI_VDEV_PARAM_BEACON_INTERVAL,
4724
4725 WMI_VDEV_PARAM_LISTEN_INTERVAL,
4726
4727 WMI_VDEV_PARAM_MULTICAST_RATE,
4728
4729 WMI_VDEV_PARAM_MGMT_TX_RATE,
4730
4731 WMI_VDEV_PARAM_SLOT_TIME,
4732
4733 WMI_VDEV_PARAM_PREAMBLE,
4734
4735 WMI_VDEV_PARAM_SWBA_TIME,
4736
4737 WMI_VDEV_STATS_UPDATE_PERIOD,
4738
4739 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
4740
4741
4742
4743
4744 WMI_VDEV_HOST_SWBA_INTERVAL,
4745
4746 WMI_VDEV_PARAM_DTIM_PERIOD,
4747
4748
4749
4750
4751 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
4752
4753 WMI_VDEV_PARAM_WDS,
4754
4755 WMI_VDEV_PARAM_ATIM_WINDOW,
4756
4757 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
4758
4759 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
4760
4761 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
4762
4763 WMI_VDEV_PARAM_FEATURE_WMM,
4764
4765 WMI_VDEV_PARAM_CHWIDTH,
4766
4767 WMI_VDEV_PARAM_CHEXTOFFSET,
4768
4769 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
4770
4771 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
4772
4773 WMI_VDEV_PARAM_MGMT_RATE,
4774
4775 WMI_VDEV_PARAM_PROTECTION_MODE,
4776
4777 WMI_VDEV_PARAM_FIXED_RATE,
4778
4779 WMI_VDEV_PARAM_SGI,
4780
4781 WMI_VDEV_PARAM_LDPC,
4782
4783 WMI_VDEV_PARAM_TX_STBC,
4784
4785 WMI_VDEV_PARAM_RX_STBC,
4786
4787 WMI_VDEV_PARAM_INTRA_BSS_FWD,
4788
4789 WMI_VDEV_PARAM_DEF_KEYID,
4790
4791 WMI_VDEV_PARAM_NSS,
4792
4793 WMI_VDEV_PARAM_BCAST_DATA_RATE,
4794
4795 WMI_VDEV_PARAM_MCAST_DATA_RATE,
4796
4797 WMI_VDEV_PARAM_MCAST_INDICATE,
4798
4799 WMI_VDEV_PARAM_DHCP_INDICATE,
4800
4801 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
4802
4803
4804 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
4805
4806
4807
4808
4809
4810
4811
4812
4813
4814
4815
4816 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
4817
4818
4819
4820
4821
4822
4823
4824 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
4825
4826
4827 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
4828
4829 WMI_VDEV_PARAM_ENABLE_RTSCTS,
4830
4831 WMI_VDEV_PARAM_TXBF,
4832
4833
4834 WMI_VDEV_PARAM_PACKET_POWERSAVE,
4835
4836
4837
4838
4839
4840 WMI_VDEV_PARAM_DROP_UNENCRY,
4841
4842
4843
4844
4845 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
4846};
4847
4848
4849enum wmi_10x_vdev_param {
4850
4851 WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
4852
4853 WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
4854
4855 WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
4856
4857 WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
4858
4859 WMI_10X_VDEV_PARAM_MULTICAST_RATE,
4860
4861 WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
4862
4863 WMI_10X_VDEV_PARAM_SLOT_TIME,
4864
4865 WMI_10X_VDEV_PARAM_PREAMBLE,
4866
4867 WMI_10X_VDEV_PARAM_SWBA_TIME,
4868
4869 WMI_10X_VDEV_STATS_UPDATE_PERIOD,
4870
4871 WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
4872
4873
4874
4875
4876 WMI_10X_VDEV_HOST_SWBA_INTERVAL,
4877
4878 WMI_10X_VDEV_PARAM_DTIM_PERIOD,
4879
4880
4881
4882
4883 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
4884
4885 WMI_10X_VDEV_PARAM_WDS,
4886
4887 WMI_10X_VDEV_PARAM_ATIM_WINDOW,
4888
4889 WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
4890
4891 WMI_10X_VDEV_PARAM_FEATURE_WMM,
4892
4893 WMI_10X_VDEV_PARAM_CHWIDTH,
4894
4895 WMI_10X_VDEV_PARAM_CHEXTOFFSET,
4896
4897 WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
4898
4899 WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
4900
4901 WMI_10X_VDEV_PARAM_MGMT_RATE,
4902
4903 WMI_10X_VDEV_PARAM_PROTECTION_MODE,
4904
4905 WMI_10X_VDEV_PARAM_FIXED_RATE,
4906
4907 WMI_10X_VDEV_PARAM_SGI,
4908
4909 WMI_10X_VDEV_PARAM_LDPC,
4910
4911 WMI_10X_VDEV_PARAM_TX_STBC,
4912
4913 WMI_10X_VDEV_PARAM_RX_STBC,
4914
4915 WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
4916
4917 WMI_10X_VDEV_PARAM_DEF_KEYID,
4918
4919 WMI_10X_VDEV_PARAM_NSS,
4920
4921 WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
4922
4923 WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
4924
4925 WMI_10X_VDEV_PARAM_MCAST_INDICATE,
4926
4927 WMI_10X_VDEV_PARAM_DHCP_INDICATE,
4928
4929 WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
4930
4931
4932 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
4933
4934
4935
4936
4937
4938
4939
4940
4941
4942
4943
4944 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
4945
4946
4947
4948
4949
4950
4951
4952 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
4953
4954
4955 WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
4956
4957 WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
4958
4959 WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
4960
4961 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
4962
4963
4964 WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
4965 WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
4966 WMI_10X_VDEV_PARAM_MFPTEST_SET,
4967 WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
4968 WMI_10X_VDEV_PARAM_VHT_SGIMASK,
4969 WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
4970 WMI_10X_VDEV_PARAM_TSF_INCREMENT,
4971};
4972
4973enum wmi_10_4_vdev_param {
4974 WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
4975 WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
4976 WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
4977 WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
4978 WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
4979 WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
4980 WMI_10_4_VDEV_PARAM_SLOT_TIME,
4981 WMI_10_4_VDEV_PARAM_PREAMBLE,
4982 WMI_10_4_VDEV_PARAM_SWBA_TIME,
4983 WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
4984 WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
4985 WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
4986 WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
4987 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
4988 WMI_10_4_VDEV_PARAM_WDS,
4989 WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
4990 WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
4991 WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
4992 WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
4993 WMI_10_4_VDEV_PARAM_FEATURE_WMM,
4994 WMI_10_4_VDEV_PARAM_CHWIDTH,
4995 WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
4996 WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
4997 WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
4998 WMI_10_4_VDEV_PARAM_MGMT_RATE,
4999 WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
5000 WMI_10_4_VDEV_PARAM_FIXED_RATE,
5001 WMI_10_4_VDEV_PARAM_SGI,
5002 WMI_10_4_VDEV_PARAM_LDPC,
5003 WMI_10_4_VDEV_PARAM_TX_STBC,
5004 WMI_10_4_VDEV_PARAM_RX_STBC,
5005 WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
5006 WMI_10_4_VDEV_PARAM_DEF_KEYID,
5007 WMI_10_4_VDEV_PARAM_NSS,
5008 WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
5009 WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
5010 WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
5011 WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
5012 WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5013 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5014 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5015 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5016 WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
5017 WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
5018 WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
5019 WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
5020 WMI_10_4_VDEV_PARAM_TXBF,
5021 WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
5022 WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
5023 WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
5024 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
5025 WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
5026 WMI_10_4_VDEV_PARAM_MFPTEST_SET,
5027 WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
5028 WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
5029 WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
5030 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
5031 WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
5032 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
5033 WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
5034 WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
5035 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
5036 WMI_10_4_VDEV_PARAM_PROXY_STA,
5037 WMI_10_4_VDEV_PARAM_MERU_VC,
5038 WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
5039 WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
5040 WMI_10_4_VDEV_PARAM_SENSOR_AP,
5041 WMI_10_4_VDEV_PARAM_BEACON_RATE,
5042 WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS,
5043 WMI_10_4_VDEV_PARAM_STA_KICKOUT,
5044 WMI_10_4_VDEV_PARAM_CAPABILITIES,
5045 WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
5046 WMI_10_4_VDEV_PARAM_RX_FILTER,
5047 WMI_10_4_VDEV_PARAM_MGMT_TX_POWER,
5048 WMI_10_4_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
5049 WMI_10_4_VDEV_PARAM_DISABLE_DYN_BW_RTS,
5050 WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
5051};
5052
5053#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
5054#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
5055#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
5056#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
5057
5058#define WMI_TXBF_STS_CAP_OFFSET_LSB 4
5059#define WMI_TXBF_STS_CAP_OFFSET_MASK 0xf0
5060#define WMI_BF_SOUND_DIM_OFFSET_LSB 8
5061#define WMI_BF_SOUND_DIM_OFFSET_MASK 0xf00
5062
5063
5064#define WMI_VDEV_SLOT_TIME_LONG 0x1
5065
5066#define WMI_VDEV_SLOT_TIME_SHORT 0x2
5067
5068#define WMI_VDEV_PREAMBLE_LONG 0x1
5069
5070#define WMI_VDEV_PREAMBLE_SHORT 0x2
5071
5072enum wmi_start_event_param {
5073 WMI_VDEV_RESP_START_EVENT = 0,
5074 WMI_VDEV_RESP_RESTART_EVENT,
5075};
5076
5077struct wmi_vdev_start_response_event {
5078 __le32 vdev_id;
5079 __le32 req_id;
5080 __le32 resp_type;
5081 __le32 status;
5082} __packed;
5083
5084struct wmi_vdev_standby_req_event {
5085
5086 __le32 vdev_id;
5087} __packed;
5088
5089struct wmi_vdev_resume_req_event {
5090
5091 __le32 vdev_id;
5092} __packed;
5093
5094struct wmi_vdev_stopped_event {
5095
5096 __le32 vdev_id;
5097} __packed;
5098
5099
5100
5101
5102
5103struct wmi_vdev_simple_event {
5104
5105 __le32 vdev_id;
5106} __packed;
5107
5108
5109
5110#define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0
5111
5112
5113#define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1
5114
5115
5116#define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2
5117
5118
5119struct wmi_vdev_spectral_conf_cmd {
5120 __le32 vdev_id;
5121
5122
5123 __le32 scan_count;
5124 __le32 scan_period;
5125 __le32 scan_priority;
5126
5127
5128 __le32 scan_fft_size;
5129 __le32 scan_gc_ena;
5130 __le32 scan_restart_ena;
5131 __le32 scan_noise_floor_ref;
5132 __le32 scan_init_delay;
5133 __le32 scan_nb_tone_thr;
5134 __le32 scan_str_bin_thr;
5135 __le32 scan_wb_rpt_mode;
5136 __le32 scan_rssi_rpt_mode;
5137 __le32 scan_rssi_thr;
5138 __le32 scan_pwr_format;
5139
5140
5141
5142
5143
5144
5145
5146
5147
5148
5149
5150
5151 __le32 scan_rpt_mode;
5152 __le32 scan_bin_scale;
5153 __le32 scan_dbm_adj;
5154 __le32 scan_chn_mask;
5155} __packed;
5156
5157struct wmi_vdev_spectral_conf_arg {
5158 u32 vdev_id;
5159 u32 scan_count;
5160 u32 scan_period;
5161 u32 scan_priority;
5162 u32 scan_fft_size;
5163 u32 scan_gc_ena;
5164 u32 scan_restart_ena;
5165 u32 scan_noise_floor_ref;
5166 u32 scan_init_delay;
5167 u32 scan_nb_tone_thr;
5168 u32 scan_str_bin_thr;
5169 u32 scan_wb_rpt_mode;
5170 u32 scan_rssi_rpt_mode;
5171 u32 scan_rssi_thr;
5172 u32 scan_pwr_format;
5173 u32 scan_rpt_mode;
5174 u32 scan_bin_scale;
5175 u32 scan_dbm_adj;
5176 u32 scan_chn_mask;
5177};
5178
5179#define WMI_SPECTRAL_ENABLE_DEFAULT 0
5180#define WMI_SPECTRAL_COUNT_DEFAULT 0
5181#define WMI_SPECTRAL_PERIOD_DEFAULT 35
5182#define WMI_SPECTRAL_PRIORITY_DEFAULT 1
5183#define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
5184#define WMI_SPECTRAL_GC_ENA_DEFAULT 1
5185#define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
5186#define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
5187#define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
5188#define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
5189#define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
5190#define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
5191#define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
5192#define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
5193#define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
5194#define WMI_SPECTRAL_RPT_MODE_DEFAULT 2
5195#define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
5196#define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
5197#define WMI_SPECTRAL_CHN_MASK_DEFAULT 1
5198
5199struct wmi_vdev_spectral_enable_cmd {
5200 __le32 vdev_id;
5201 __le32 trigger_cmd;
5202 __le32 enable_cmd;
5203} __packed;
5204
5205#define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
5206#define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
5207#define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
5208#define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
5209
5210
5211struct wmi_bcn_tx_hdr {
5212 __le32 vdev_id;
5213 __le32 tx_rate;
5214 __le32 tx_power;
5215 __le32 bcn_len;
5216} __packed;
5217
5218struct wmi_bcn_tx_cmd {
5219 struct wmi_bcn_tx_hdr hdr;
5220 u8 *bcn[0];
5221} __packed;
5222
5223struct wmi_bcn_tx_arg {
5224 u32 vdev_id;
5225 u32 tx_rate;
5226 u32 tx_power;
5227 u32 bcn_len;
5228 const void *bcn;
5229};
5230
5231enum wmi_bcn_tx_ref_flags {
5232 WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
5233 WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
5234};
5235
5236
5237
5238
5239#define WMI_BCN_TX_REF_DEF_ANTENNA 0
5240
5241struct wmi_bcn_tx_ref_cmd {
5242 __le32 vdev_id;
5243 __le32 data_len;
5244
5245 __le32 data_ptr;
5246
5247 __le32 msdu_id;
5248
5249 __le32 frame_control;
5250
5251 __le32 flags;
5252
5253 __le32 antenna_mask;
5254} __packed;
5255
5256
5257#define WMI_BCN_FILTER_ALL 0
5258#define WMI_BCN_FILTER_NONE 1
5259#define WMI_BCN_FILTER_RSSI 2
5260#define WMI_BCN_FILTER_BSSID 3
5261#define WMI_BCN_FILTER_SSID 4
5262
5263struct wmi_bcn_filter_rx_cmd {
5264
5265 __le32 bcn_filter_id;
5266
5267 __le32 bcn_filter;
5268
5269 __le32 bcn_filter_len;
5270
5271 u8 *bcn_filter_buf;
5272} __packed;
5273
5274
5275struct wmi_bcn_prb_info {
5276
5277 __le32 caps;
5278
5279 __le32 erp;
5280
5281
5282
5283
5284
5285
5286
5287
5288
5289} __packed;
5290
5291struct wmi_bcn_tmpl_cmd {
5292
5293 __le32 vdev_id;
5294
5295 __le32 tim_ie_offset;
5296
5297 struct wmi_bcn_prb_info bcn_prb_info;
5298
5299 __le32 buf_len;
5300
5301 u8 data[1];
5302} __packed;
5303
5304struct wmi_prb_tmpl_cmd {
5305
5306 __le32 vdev_id;
5307
5308 struct wmi_bcn_prb_info bcn_prb_info;
5309
5310 __le32 buf_len;
5311
5312 u8 data[1];
5313} __packed;
5314
5315enum wmi_sta_ps_mode {
5316
5317 WMI_STA_PS_MODE_DISABLED = 0,
5318
5319 WMI_STA_PS_MODE_ENABLED = 1,
5320};
5321
5322struct wmi_sta_powersave_mode_cmd {
5323
5324 __le32 vdev_id;
5325
5326
5327
5328
5329
5330 __le32 sta_ps_mode;
5331} __packed;
5332
5333enum wmi_csa_offload_en {
5334 WMI_CSA_OFFLOAD_DISABLE = 0,
5335 WMI_CSA_OFFLOAD_ENABLE = 1,
5336};
5337
5338struct wmi_csa_offload_enable_cmd {
5339 __le32 vdev_id;
5340 __le32 csa_offload_enable;
5341} __packed;
5342
5343struct wmi_csa_offload_chanswitch_cmd {
5344 __le32 vdev_id;
5345 struct wmi_channel chan;
5346} __packed;
5347
5348
5349
5350
5351
5352
5353
5354enum wmi_sta_ps_param_rx_wake_policy {
5355
5356
5357
5358
5359
5360
5361 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
5362
5363
5364
5365
5366
5367
5368
5369
5370 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
5371};
5372
5373
5374
5375
5376
5377
5378
5379
5380
5381enum wmi_sta_ps_param_tx_wake_threshold {
5382 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
5383 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
5384
5385
5386
5387
5388
5389};
5390
5391
5392
5393
5394
5395
5396
5397
5398
5399
5400enum wmi_sta_ps_param_pspoll_count {
5401 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
5402
5403
5404
5405
5406
5407
5408
5409
5410
5411
5412 WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
5413};
5414
5415
5416
5417
5418
5419
5420
5421#define WMI_UAPSD_AC_TYPE_DELI 0
5422#define WMI_UAPSD_AC_TYPE_TRIG 1
5423
5424#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5425 (type == WMI_UAPSD_AC_TYPE_DELI ? 1 << (ac << 1) : 1 << ((ac << 1) + 1))
5426
5427enum wmi_sta_ps_param_uapsd {
5428 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5429 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5430 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5431 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5432 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5433 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5434 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5435 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5436};
5437
5438#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
5439
5440struct wmi_sta_uapsd_auto_trig_param {
5441 __le32 wmm_ac;
5442 __le32 user_priority;
5443 __le32 service_interval;
5444 __le32 suspend_interval;
5445 __le32 delay_interval;
5446};
5447
5448struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
5449 __le32 vdev_id;
5450 struct wmi_mac_addr peer_macaddr;
5451 __le32 num_ac;
5452};
5453
5454struct wmi_sta_uapsd_auto_trig_arg {
5455 u32 wmm_ac;
5456 u32 user_priority;
5457 u32 service_interval;
5458 u32 suspend_interval;
5459 u32 delay_interval;
5460};
5461
5462enum wmi_sta_powersave_param {
5463
5464
5465
5466
5467
5468 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
5469
5470
5471
5472
5473
5474
5475 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
5476
5477
5478
5479
5480
5481
5482
5483 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
5484
5485
5486
5487
5488
5489
5490
5491
5492 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
5493
5494
5495
5496
5497
5498
5499 WMI_STA_PS_PARAM_UAPSD = 4,
5500};
5501
5502struct wmi_sta_powersave_param_cmd {
5503 __le32 vdev_id;
5504 __le32 param_id;
5505 __le32 param_value;
5506} __packed;
5507
5508
5509#define WMI_STA_MIMO_PS_MODE_DISABLE
5510
5511#define WMI_STA_MIMO_PS_MODE_STATIC
5512
5513#define WMI_STA_MIMO_PS_MODE_DYNAMIC
5514
5515struct wmi_sta_mimo_ps_mode_cmd {
5516
5517 __le32 vdev_id;
5518
5519 __le32 mimo_pwrsave_mode;
5520} __packed;
5521
5522
5523enum wmi_ap_ps_param_uapsd {
5524 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5525 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5526 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5527 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5528 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5529 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5530 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5531 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5532};
5533
5534
5535enum wmi_ap_ps_peer_param_max_sp {
5536 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
5537 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
5538 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
5539 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
5540 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
5541};
5542
5543
5544
5545
5546
5547enum wmi_ap_ps_peer_param {
5548
5549
5550
5551
5552
5553
5554
5555
5556
5557
5558
5559 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
5560
5561
5562
5563
5564
5565
5566
5567
5568 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
5569
5570
5571 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
5572};
5573
5574struct wmi_ap_ps_peer_cmd {
5575
5576 __le32 vdev_id;
5577
5578
5579 struct wmi_mac_addr peer_macaddr;
5580
5581
5582 __le32 param_id;
5583
5584
5585 __le32 param_value;
5586} __packed;
5587
5588
5589#define WMI_TIM_BITMAP_ARRAY_SIZE 4
5590
5591struct wmi_tim_info {
5592 __le32 tim_len;
5593 __le32 tim_mcast;
5594 __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
5595 __le32 tim_changed;
5596 __le32 tim_num_ps_pending;
5597} __packed;
5598
5599struct wmi_tim_info_arg {
5600 __le32 tim_len;
5601 __le32 tim_mcast;
5602 const __le32 *tim_bitmap;
5603 __le32 tim_changed;
5604 __le32 tim_num_ps_pending;
5605} __packed;
5606
5607
5608#define WMI_P2P_MAX_NOA_DESCRIPTORS 4
5609#define WMI_P2P_OPPPS_ENABLE_BIT BIT(0)
5610#define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1
5611#define WMI_P2P_NOA_CHANGED_BIT BIT(0)
5612
5613struct wmi_p2p_noa_info {
5614
5615
5616
5617 u8 changed;
5618
5619 u8 index;
5620
5621
5622
5623 u8 ctwindow_oppps;
5624
5625 u8 num_descriptors;
5626
5627 struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
5628} __packed;
5629
5630struct wmi_bcn_info {
5631 struct wmi_tim_info tim_info;
5632 struct wmi_p2p_noa_info p2p_noa_info;
5633} __packed;
5634
5635struct wmi_host_swba_event {
5636 __le32 vdev_map;
5637 struct wmi_bcn_info bcn_info[0];
5638} __packed;
5639
5640struct wmi_10_2_4_bcn_info {
5641 struct wmi_tim_info tim_info;
5642
5643} __packed;
5644
5645struct wmi_10_2_4_host_swba_event {
5646 __le32 vdev_map;
5647 struct wmi_10_2_4_bcn_info bcn_info[0];
5648} __packed;
5649
5650
5651#define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
5652
5653struct wmi_10_4_tim_info {
5654 __le32 tim_len;
5655 __le32 tim_mcast;
5656 __le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
5657 __le32 tim_changed;
5658 __le32 tim_num_ps_pending;
5659} __packed;
5660
5661#define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
5662
5663struct wmi_10_4_p2p_noa_info {
5664
5665
5666
5667 u8 changed;
5668
5669 u8 index;
5670
5671
5672
5673 u8 ctwindow_oppps;
5674
5675 u8 num_descriptors;
5676
5677 struct wmi_p2p_noa_descriptor
5678 noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
5679} __packed;
5680
5681struct wmi_10_4_bcn_info {
5682 struct wmi_10_4_tim_info tim_info;
5683 struct wmi_10_4_p2p_noa_info p2p_noa_info;
5684} __packed;
5685
5686struct wmi_10_4_host_swba_event {
5687 __le32 vdev_map;
5688 struct wmi_10_4_bcn_info bcn_info[0];
5689} __packed;
5690
5691#define WMI_MAX_AP_VDEV 16
5692
5693struct wmi_tbtt_offset_event {
5694 __le32 vdev_map;
5695 __le32 tbttoffset_list[WMI_MAX_AP_VDEV];
5696} __packed;
5697
5698struct wmi_peer_create_cmd {
5699 __le32 vdev_id;
5700 struct wmi_mac_addr peer_macaddr;
5701} __packed;
5702
5703enum wmi_peer_type {
5704 WMI_PEER_TYPE_DEFAULT = 0,
5705 WMI_PEER_TYPE_BSS = 1,
5706 WMI_PEER_TYPE_TDLS = 2,
5707};
5708
5709struct wmi_peer_delete_cmd {
5710 __le32 vdev_id;
5711 struct wmi_mac_addr peer_macaddr;
5712} __packed;
5713
5714struct wmi_peer_flush_tids_cmd {
5715 __le32 vdev_id;
5716 struct wmi_mac_addr peer_macaddr;
5717 __le32 peer_tid_bitmap;
5718} __packed;
5719
5720struct wmi_fixed_rate {
5721
5722
5723
5724
5725
5726
5727 __le32 rate_mode;
5728
5729
5730
5731
5732 __le32 rate_series;
5733
5734
5735
5736
5737
5738 __le32 rate_retries;
5739} __packed;
5740
5741struct wmi_peer_fixed_rate_cmd {
5742
5743 __le32 vdev_id;
5744
5745 struct wmi_mac_addr peer_macaddr;
5746
5747 struct wmi_fixed_rate peer_fixed_rate;
5748} __packed;
5749
5750#define WMI_MGMT_TID 17
5751
5752struct wmi_addba_clear_resp_cmd {
5753
5754 __le32 vdev_id;
5755
5756 struct wmi_mac_addr peer_macaddr;
5757} __packed;
5758
5759struct wmi_addba_send_cmd {
5760
5761 __le32 vdev_id;
5762
5763 struct wmi_mac_addr peer_macaddr;
5764
5765 __le32 tid;
5766
5767 __le32 buffersize;
5768} __packed;
5769
5770struct wmi_delba_send_cmd {
5771
5772 __le32 vdev_id;
5773
5774 struct wmi_mac_addr peer_macaddr;
5775
5776 __le32 tid;
5777
5778 __le32 initiator;
5779
5780 __le32 reasoncode;
5781} __packed;
5782
5783struct wmi_addba_setresponse_cmd {
5784
5785 __le32 vdev_id;
5786
5787 struct wmi_mac_addr peer_macaddr;
5788
5789 __le32 tid;
5790
5791 __le32 statuscode;
5792} __packed;
5793
5794struct wmi_send_singleamsdu_cmd {
5795
5796 __le32 vdev_id;
5797
5798 struct wmi_mac_addr peer_macaddr;
5799
5800 __le32 tid;
5801} __packed;
5802
5803enum wmi_peer_smps_state {
5804 WMI_PEER_SMPS_PS_NONE = 0x0,
5805 WMI_PEER_SMPS_STATIC = 0x1,
5806 WMI_PEER_SMPS_DYNAMIC = 0x2
5807};
5808
5809enum wmi_peer_chwidth {
5810 WMI_PEER_CHWIDTH_20MHZ = 0,
5811 WMI_PEER_CHWIDTH_40MHZ = 1,
5812 WMI_PEER_CHWIDTH_80MHZ = 2,
5813 WMI_PEER_CHWIDTH_160MHZ = 3,
5814};
5815
5816enum wmi_peer_param {
5817 WMI_PEER_SMPS_STATE = 0x1,
5818 WMI_PEER_AMPDU = 0x2,
5819 WMI_PEER_AUTHORIZE = 0x3,
5820 WMI_PEER_CHAN_WIDTH = 0x4,
5821 WMI_PEER_NSS = 0x5,
5822 WMI_PEER_USE_4ADDR = 0x6,
5823 WMI_PEER_DEBUG = 0xa,
5824 WMI_PEER_DUMMY_VAR = 0xff,
5825};
5826
5827struct wmi_peer_set_param_cmd {
5828 __le32 vdev_id;
5829 struct wmi_mac_addr peer_macaddr;
5830 __le32 param_id;
5831 __le32 param_value;
5832} __packed;
5833
5834#define MAX_SUPPORTED_RATES 128
5835
5836struct wmi_rate_set {
5837
5838 __le32 num_rates;
5839
5840
5841
5842
5843
5844 __le32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
5845} __packed;
5846
5847struct wmi_rate_set_arg {
5848 unsigned int num_rates;
5849 u8 rates[MAX_SUPPORTED_RATES];
5850};
5851
5852
5853
5854
5855
5856
5857struct wmi_vht_rate_set {
5858 __le32 rx_max_rate;
5859 __le32 rx_mcs_set;
5860 __le32 tx_max_rate;
5861 __le32 tx_mcs_set;
5862} __packed;
5863
5864struct wmi_vht_rate_set_arg {
5865 u32 rx_max_rate;
5866 u32 rx_mcs_set;
5867 u32 tx_max_rate;
5868 u32 tx_mcs_set;
5869};
5870
5871struct wmi_peer_set_rates_cmd {
5872
5873 struct wmi_mac_addr peer_macaddr;
5874
5875 struct wmi_rate_set peer_legacy_rates;
5876
5877 struct wmi_rate_set peer_ht_rates;
5878} __packed;
5879
5880struct wmi_peer_set_q_empty_callback_cmd {
5881
5882 __le32 vdev_id;
5883
5884 struct wmi_mac_addr peer_macaddr;
5885 __le32 callback_enable;
5886} __packed;
5887
5888struct wmi_peer_flags_map {
5889 u32 auth;
5890 u32 qos;
5891 u32 need_ptk_4_way;
5892 u32 need_gtk_2_way;
5893 u32 apsd;
5894 u32 ht;
5895 u32 bw40;
5896 u32 stbc;
5897 u32 ldbc;
5898 u32 dyn_mimops;
5899 u32 static_mimops;
5900 u32 spatial_mux;
5901 u32 vht;
5902 u32 bw80;
5903 u32 vht_2g;
5904 u32 pmf;
5905 u32 bw160;
5906};
5907
5908enum wmi_peer_flags {
5909 WMI_PEER_AUTH = 0x00000001,
5910 WMI_PEER_QOS = 0x00000002,
5911 WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
5912 WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
5913 WMI_PEER_APSD = 0x00000800,
5914 WMI_PEER_HT = 0x00001000,
5915 WMI_PEER_40MHZ = 0x00002000,
5916 WMI_PEER_STBC = 0x00008000,
5917 WMI_PEER_LDPC = 0x00010000,
5918 WMI_PEER_DYN_MIMOPS = 0x00020000,
5919 WMI_PEER_STATIC_MIMOPS = 0x00040000,
5920 WMI_PEER_SPATIAL_MUX = 0x00200000,
5921 WMI_PEER_VHT = 0x02000000,
5922 WMI_PEER_80MHZ = 0x04000000,
5923 WMI_PEER_VHT_2G = 0x08000000,
5924 WMI_PEER_PMF = 0x10000000,
5925 WMI_PEER_160MHZ = 0x20000000
5926};
5927
5928enum wmi_10x_peer_flags {
5929 WMI_10X_PEER_AUTH = 0x00000001,
5930 WMI_10X_PEER_QOS = 0x00000002,
5931 WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004,
5932 WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010,
5933 WMI_10X_PEER_APSD = 0x00000800,
5934 WMI_10X_PEER_HT = 0x00001000,
5935 WMI_10X_PEER_40MHZ = 0x00002000,
5936 WMI_10X_PEER_STBC = 0x00008000,
5937 WMI_10X_PEER_LDPC = 0x00010000,
5938 WMI_10X_PEER_DYN_MIMOPS = 0x00020000,
5939 WMI_10X_PEER_STATIC_MIMOPS = 0x00040000,
5940 WMI_10X_PEER_SPATIAL_MUX = 0x00200000,
5941 WMI_10X_PEER_VHT = 0x02000000,
5942 WMI_10X_PEER_80MHZ = 0x04000000,
5943 WMI_10X_PEER_160MHZ = 0x20000000
5944};
5945
5946enum wmi_10_2_peer_flags {
5947 WMI_10_2_PEER_AUTH = 0x00000001,
5948 WMI_10_2_PEER_QOS = 0x00000002,
5949 WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004,
5950 WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010,
5951 WMI_10_2_PEER_APSD = 0x00000800,
5952 WMI_10_2_PEER_HT = 0x00001000,
5953 WMI_10_2_PEER_40MHZ = 0x00002000,
5954 WMI_10_2_PEER_STBC = 0x00008000,
5955 WMI_10_2_PEER_LDPC = 0x00010000,
5956 WMI_10_2_PEER_DYN_MIMOPS = 0x00020000,
5957 WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000,
5958 WMI_10_2_PEER_SPATIAL_MUX = 0x00200000,
5959 WMI_10_2_PEER_VHT = 0x02000000,
5960 WMI_10_2_PEER_80MHZ = 0x04000000,
5961 WMI_10_2_PEER_VHT_2G = 0x08000000,
5962 WMI_10_2_PEER_PMF = 0x10000000,
5963 WMI_10_2_PEER_160MHZ = 0x20000000
5964};
5965
5966
5967
5968
5969
5970
5971
5972
5973#define WMI_RC_DS_FLAG 0x01
5974#define WMI_RC_CW40_FLAG 0x02
5975#define WMI_RC_SGI_FLAG 0x04
5976#define WMI_RC_HT_FLAG 0x08
5977#define WMI_RC_RTSCTS_FLAG 0x10
5978#define WMI_RC_TX_STBC_FLAG 0x20
5979#define WMI_RC_RX_STBC_FLAG 0xC0
5980#define WMI_RC_RX_STBC_FLAG_S 6
5981#define WMI_RC_WEP_TKIP_FLAG 0x100
5982#define WMI_RC_TS_FLAG 0x200
5983#define WMI_RC_UAPSD_FLAG 0x400
5984
5985
5986#define ATH10K_MAX_HW_LISTEN_INTERVAL 5
5987
5988struct wmi_common_peer_assoc_complete_cmd {
5989 struct wmi_mac_addr peer_macaddr;
5990 __le32 vdev_id;
5991 __le32 peer_new_assoc;
5992 __le32 peer_associd;
5993 __le32 peer_flags;
5994 __le32 peer_caps;
5995 __le32 peer_listen_intval;
5996 __le32 peer_ht_caps;
5997 __le32 peer_max_mpdu;
5998 __le32 peer_mpdu_density;
5999 __le32 peer_rate_caps;
6000 struct wmi_rate_set peer_legacy_rates;
6001 struct wmi_rate_set peer_ht_rates;
6002 __le32 peer_nss;
6003 __le32 peer_vht_caps;
6004 __le32 peer_phymode;
6005 struct wmi_vht_rate_set peer_vht_rates;
6006};
6007
6008struct wmi_main_peer_assoc_complete_cmd {
6009 struct wmi_common_peer_assoc_complete_cmd cmd;
6010
6011
6012
6013
6014 __le32 peer_ht_info[2];
6015} __packed;
6016
6017struct wmi_10_1_peer_assoc_complete_cmd {
6018 struct wmi_common_peer_assoc_complete_cmd cmd;
6019} __packed;
6020
6021#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
6022#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
6023#define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
6024#define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
6025
6026struct wmi_10_2_peer_assoc_complete_cmd {
6027 struct wmi_common_peer_assoc_complete_cmd cmd;
6028 __le32 info0;
6029} __packed;
6030
6031#define PEER_BW_RXNSS_OVERRIDE_OFFSET 31
6032
6033struct wmi_10_4_peer_assoc_complete_cmd {
6034 struct wmi_10_2_peer_assoc_complete_cmd cmd;
6035 __le32 peer_bw_rxnss_override;
6036} __packed;
6037
6038struct wmi_peer_assoc_complete_arg {
6039 u8 addr[ETH_ALEN];
6040 u32 vdev_id;
6041 bool peer_reassoc;
6042 u16 peer_aid;
6043 u32 peer_flags;
6044 u16 peer_caps;
6045 u32 peer_listen_intval;
6046 u32 peer_ht_caps;
6047 u32 peer_max_mpdu;
6048 u32 peer_mpdu_density;
6049 u32 peer_rate_caps;
6050 struct wmi_rate_set_arg peer_legacy_rates;
6051 struct wmi_rate_set_arg peer_ht_rates;
6052 u32 peer_num_spatial_streams;
6053 u32 peer_vht_caps;
6054 enum wmi_phy_mode peer_phymode;
6055 struct wmi_vht_rate_set_arg peer_vht_rates;
6056 u32 peer_bw_rxnss_override;
6057};
6058
6059struct wmi_peer_add_wds_entry_cmd {
6060
6061 struct wmi_mac_addr peer_macaddr;
6062
6063 struct wmi_mac_addr wds_macaddr;
6064} __packed;
6065
6066struct wmi_peer_remove_wds_entry_cmd {
6067
6068 struct wmi_mac_addr wds_macaddr;
6069} __packed;
6070
6071struct wmi_peer_q_empty_callback_event {
6072
6073 struct wmi_mac_addr peer_macaddr;
6074} __packed;
6075
6076
6077
6078
6079struct wmi_chan_info_event {
6080 __le32 err_code;
6081 __le32 freq;
6082 __le32 cmd_flags;
6083 __le32 noise_floor;
6084 __le32 rx_clear_count;
6085 __le32 cycle_count;
6086} __packed;
6087
6088struct wmi_10_4_chan_info_event {
6089 __le32 err_code;
6090 __le32 freq;
6091 __le32 cmd_flags;
6092 __le32 noise_floor;
6093 __le32 rx_clear_count;
6094 __le32 cycle_count;
6095 __le32 chan_tx_pwr_range;
6096 __le32 chan_tx_pwr_tp;
6097 __le32 rx_frame_count;
6098} __packed;
6099
6100struct wmi_peer_sta_kickout_event {
6101 struct wmi_mac_addr peer_macaddr;
6102} __packed;
6103
6104#define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
6105#define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
6106
6107
6108#define BCN_FLT_MAX_SUPPORTED_IES 256
6109#define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32)
6110
6111struct bss_bcn_stats {
6112 __le32 vdev_id;
6113 __le32 bss_bcnsdropped;
6114 __le32 bss_bcnsdelivered;
6115} __packed;
6116
6117struct bcn_filter_stats {
6118 __le32 bcns_dropped;
6119 __le32 bcns_delivered;
6120 __le32 activefilters;
6121 struct bss_bcn_stats bss_stats;
6122} __packed;
6123
6124struct wmi_add_bcn_filter_cmd {
6125 u32 vdev_id;
6126 u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
6127} __packed;
6128
6129enum wmi_sta_keepalive_method {
6130 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
6131 WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
6132};
6133
6134#define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
6135
6136
6137#define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
6138
6139
6140struct wmi_sta_keepalive_arp_resp {
6141 __be32 src_ip4_addr;
6142 __be32 dest_ip4_addr;
6143 struct wmi_mac_addr dest_mac_addr;
6144} __packed;
6145
6146struct wmi_sta_keepalive_cmd {
6147 __le32 vdev_id;
6148 __le32 enabled;
6149 __le32 method;
6150 __le32 interval;
6151 struct wmi_sta_keepalive_arp_resp arp_resp;
6152} __packed;
6153
6154struct wmi_sta_keepalive_arg {
6155 u32 vdev_id;
6156 u32 enabled;
6157 u32 method;
6158 u32 interval;
6159 __be32 src_ip4_addr;
6160 __be32 dest_ip4_addr;
6161 const u8 dest_mac_addr[ETH_ALEN];
6162};
6163
6164enum wmi_force_fw_hang_type {
6165 WMI_FORCE_FW_HANG_ASSERT = 1,
6166 WMI_FORCE_FW_HANG_NO_DETECT,
6167 WMI_FORCE_FW_HANG_CTRL_EP_FULL,
6168 WMI_FORCE_FW_HANG_EMPTY_POINT,
6169 WMI_FORCE_FW_HANG_STACK_OVERFLOW,
6170 WMI_FORCE_FW_HANG_INFINITE_LOOP,
6171};
6172
6173#define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
6174
6175struct wmi_force_fw_hang_cmd {
6176 __le32 type;
6177 __le32 delay_ms;
6178} __packed;
6179
6180enum ath10k_dbglog_level {
6181 ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
6182 ATH10K_DBGLOG_LEVEL_INFO = 1,
6183 ATH10K_DBGLOG_LEVEL_WARN = 2,
6184 ATH10K_DBGLOG_LEVEL_ERR = 3,
6185};
6186
6187
6188#define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0
6189#define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff
6190
6191
6192#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16
6193#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000
6194
6195
6196#define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17
6197#define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000
6198
6199
6200#define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20
6201#define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000
6202
6203
6204
6205
6206
6207#define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28
6208#define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000
6209
6210
6211
6212
6213
6214struct wmi_dbglog_cfg_cmd {
6215
6216 __le32 module_enable;
6217
6218
6219 __le32 config_enable;
6220
6221
6222 __le32 module_valid;
6223
6224
6225 __le32 config_valid;
6226} __packed;
6227
6228struct wmi_10_4_dbglog_cfg_cmd {
6229
6230 __le64 module_enable;
6231
6232
6233 __le32 config_enable;
6234
6235
6236 __le64 module_valid;
6237
6238
6239 __le32 config_valid;
6240} __packed;
6241
6242enum wmi_roam_reason {
6243 WMI_ROAM_REASON_BETTER_AP = 1,
6244 WMI_ROAM_REASON_BEACON_MISS = 2,
6245 WMI_ROAM_REASON_LOW_RSSI = 3,
6246 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
6247 WMI_ROAM_REASON_HO_FAILED = 5,
6248
6249
6250 WMI_ROAM_REASON_MAX,
6251};
6252
6253struct wmi_roam_ev {
6254 __le32 vdev_id;
6255 __le32 reason;
6256} __packed;
6257
6258#define ATH10K_FRAGMT_THRESHOLD_MIN 540
6259#define ATH10K_FRAGMT_THRESHOLD_MAX 2346
6260
6261#define WMI_MAX_EVENT 0x1000
6262
6263#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
6264
6265
6266#define ATH10K_DEFAULT_ATIM 0
6267
6268#define WMI_MAX_MEM_REQS 16
6269
6270struct wmi_scan_ev_arg {
6271 __le32 event_type;
6272 __le32 reason;
6273 __le32 channel_freq;
6274 __le32 scan_req_id;
6275 __le32 scan_id;
6276 __le32 vdev_id;
6277};
6278
6279struct wmi_mgmt_rx_ev_arg {
6280 __le32 channel;
6281 __le32 snr;
6282 __le32 rate;
6283 __le32 phy_mode;
6284 __le32 buf_len;
6285 __le32 status;
6286 struct wmi_mgmt_rx_ext_info ext_info;
6287};
6288
6289struct wmi_ch_info_ev_arg {
6290 __le32 err_code;
6291 __le32 freq;
6292 __le32 cmd_flags;
6293 __le32 noise_floor;
6294 __le32 rx_clear_count;
6295 __le32 cycle_count;
6296 __le32 chan_tx_pwr_range;
6297 __le32 chan_tx_pwr_tp;
6298 __le32 rx_frame_count;
6299};
6300
6301struct wmi_vdev_start_ev_arg {
6302 __le32 vdev_id;
6303 __le32 req_id;
6304 __le32 resp_type;
6305 __le32 status;
6306};
6307
6308struct wmi_peer_kick_ev_arg {
6309 const u8 *mac_addr;
6310};
6311
6312struct wmi_swba_ev_arg {
6313 __le32 vdev_map;
6314 struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
6315 const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
6316};
6317
6318struct wmi_phyerr_ev_arg {
6319 u32 tsf_timestamp;
6320 u16 freq1;
6321 u16 freq2;
6322 u8 rssi_combined;
6323 u8 chan_width_mhz;
6324 u8 phy_err_code;
6325 u16 nf_chains[4];
6326 u32 buf_len;
6327 const u8 *buf;
6328 u8 hdr_len;
6329};
6330
6331struct wmi_phyerr_hdr_arg {
6332 u32 num_phyerrs;
6333 u32 tsf_l32;
6334 u32 tsf_u32;
6335 u32 buf_len;
6336 const void *phyerrs;
6337};
6338
6339struct wmi_svc_rdy_ev_arg {
6340 __le32 min_tx_power;
6341 __le32 max_tx_power;
6342 __le32 ht_cap;
6343 __le32 vht_cap;
6344 __le32 sw_ver0;
6345 __le32 sw_ver1;
6346 __le32 fw_build;
6347 __le32 phy_capab;
6348 __le32 num_rf_chains;
6349 __le32 eeprom_rd;
6350 __le32 num_mem_reqs;
6351 __le32 low_5ghz_chan;
6352 __le32 high_5ghz_chan;
6353 const __le32 *service_map;
6354 size_t service_map_len;
6355 const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
6356};
6357
6358struct wmi_rdy_ev_arg {
6359 __le32 sw_version;
6360 __le32 abi_version;
6361 __le32 status;
6362 const u8 *mac_addr;
6363};
6364
6365struct wmi_roam_ev_arg {
6366 __le32 vdev_id;
6367 __le32 reason;
6368 __le32 rssi;
6369};
6370
6371struct wmi_echo_ev_arg {
6372 __le32 value;
6373};
6374
6375struct wmi_pdev_temperature_event {
6376
6377 __le32 temperature;
6378} __packed;
6379
6380struct wmi_pdev_bss_chan_info_event {
6381 __le32 freq;
6382 __le32 noise_floor;
6383 __le64 cycle_busy;
6384 __le64 cycle_total;
6385 __le64 cycle_tx;
6386 __le64 cycle_rx;
6387 __le64 cycle_rx_bss;
6388 __le32 reserved;
6389} __packed;
6390
6391
6392enum wmi_wow_wakeup_event {
6393 WOW_BMISS_EVENT = 0,
6394 WOW_BETTER_AP_EVENT,
6395 WOW_DEAUTH_RECVD_EVENT,
6396 WOW_MAGIC_PKT_RECVD_EVENT,
6397 WOW_GTK_ERR_EVENT,
6398 WOW_FOURWAY_HSHAKE_EVENT,
6399 WOW_EAPOL_RECVD_EVENT,
6400 WOW_NLO_DETECTED_EVENT,
6401 WOW_DISASSOC_RECVD_EVENT,
6402 WOW_PATTERN_MATCH_EVENT,
6403 WOW_CSA_IE_EVENT,
6404 WOW_PROBE_REQ_WPS_IE_EVENT,
6405 WOW_AUTH_REQ_EVENT,
6406 WOW_ASSOC_REQ_EVENT,
6407 WOW_HTT_EVENT,
6408 WOW_RA_MATCH_EVENT,
6409 WOW_HOST_AUTO_SHUTDOWN_EVENT,
6410 WOW_IOAC_MAGIC_EVENT,
6411 WOW_IOAC_SHORT_EVENT,
6412 WOW_IOAC_EXTEND_EVENT,
6413 WOW_IOAC_TIMER_EVENT,
6414 WOW_DFS_PHYERR_RADAR_EVENT,
6415 WOW_BEACON_EVENT,
6416 WOW_CLIENT_KICKOUT_EVENT,
6417 WOW_EVENT_MAX,
6418};
6419
6420#define C2S(x) case x: return #x
6421
6422static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
6423{
6424 switch (ev) {
6425 C2S(WOW_BMISS_EVENT);
6426 C2S(WOW_BETTER_AP_EVENT);
6427 C2S(WOW_DEAUTH_RECVD_EVENT);
6428 C2S(WOW_MAGIC_PKT_RECVD_EVENT);
6429 C2S(WOW_GTK_ERR_EVENT);
6430 C2S(WOW_FOURWAY_HSHAKE_EVENT);
6431 C2S(WOW_EAPOL_RECVD_EVENT);
6432 C2S(WOW_NLO_DETECTED_EVENT);
6433 C2S(WOW_DISASSOC_RECVD_EVENT);
6434 C2S(WOW_PATTERN_MATCH_EVENT);
6435 C2S(WOW_CSA_IE_EVENT);
6436 C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
6437 C2S(WOW_AUTH_REQ_EVENT);
6438 C2S(WOW_ASSOC_REQ_EVENT);
6439 C2S(WOW_HTT_EVENT);
6440 C2S(WOW_RA_MATCH_EVENT);
6441 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
6442 C2S(WOW_IOAC_MAGIC_EVENT);
6443 C2S(WOW_IOAC_SHORT_EVENT);
6444 C2S(WOW_IOAC_EXTEND_EVENT);
6445 C2S(WOW_IOAC_TIMER_EVENT);
6446 C2S(WOW_DFS_PHYERR_RADAR_EVENT);
6447 C2S(WOW_BEACON_EVENT);
6448 C2S(WOW_CLIENT_KICKOUT_EVENT);
6449 C2S(WOW_EVENT_MAX);
6450 default:
6451 return NULL;
6452 }
6453}
6454
6455enum wmi_wow_wake_reason {
6456 WOW_REASON_UNSPECIFIED = -1,
6457 WOW_REASON_NLOD = 0,
6458 WOW_REASON_AP_ASSOC_LOST,
6459 WOW_REASON_LOW_RSSI,
6460 WOW_REASON_DEAUTH_RECVD,
6461 WOW_REASON_DISASSOC_RECVD,
6462 WOW_REASON_GTK_HS_ERR,
6463 WOW_REASON_EAP_REQ,
6464 WOW_REASON_FOURWAY_HS_RECV,
6465 WOW_REASON_TIMER_INTR_RECV,
6466 WOW_REASON_PATTERN_MATCH_FOUND,
6467 WOW_REASON_RECV_MAGIC_PATTERN,
6468 WOW_REASON_P2P_DISC,
6469 WOW_REASON_WLAN_HB,
6470 WOW_REASON_CSA_EVENT,
6471 WOW_REASON_PROBE_REQ_WPS_IE_RECV,
6472 WOW_REASON_AUTH_REQ_RECV,
6473 WOW_REASON_ASSOC_REQ_RECV,
6474 WOW_REASON_HTT_EVENT,
6475 WOW_REASON_RA_MATCH,
6476 WOW_REASON_HOST_AUTO_SHUTDOWN,
6477 WOW_REASON_IOAC_MAGIC_EVENT,
6478 WOW_REASON_IOAC_SHORT_EVENT,
6479 WOW_REASON_IOAC_EXTEND_EVENT,
6480 WOW_REASON_IOAC_TIMER_EVENT,
6481 WOW_REASON_ROAM_HO,
6482 WOW_REASON_DFS_PHYERR_RADADR_EVENT,
6483 WOW_REASON_BEACON_RECV,
6484 WOW_REASON_CLIENT_KICKOUT_EVENT,
6485 WOW_REASON_DEBUG_TEST = 0xFF,
6486};
6487
6488static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
6489{
6490 switch (reason) {
6491 C2S(WOW_REASON_UNSPECIFIED);
6492 C2S(WOW_REASON_NLOD);
6493 C2S(WOW_REASON_AP_ASSOC_LOST);
6494 C2S(WOW_REASON_LOW_RSSI);
6495 C2S(WOW_REASON_DEAUTH_RECVD);
6496 C2S(WOW_REASON_DISASSOC_RECVD);
6497 C2S(WOW_REASON_GTK_HS_ERR);
6498 C2S(WOW_REASON_EAP_REQ);
6499 C2S(WOW_REASON_FOURWAY_HS_RECV);
6500 C2S(WOW_REASON_TIMER_INTR_RECV);
6501 C2S(WOW_REASON_PATTERN_MATCH_FOUND);
6502 C2S(WOW_REASON_RECV_MAGIC_PATTERN);
6503 C2S(WOW_REASON_P2P_DISC);
6504 C2S(WOW_REASON_WLAN_HB);
6505 C2S(WOW_REASON_CSA_EVENT);
6506 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
6507 C2S(WOW_REASON_AUTH_REQ_RECV);
6508 C2S(WOW_REASON_ASSOC_REQ_RECV);
6509 C2S(WOW_REASON_HTT_EVENT);
6510 C2S(WOW_REASON_RA_MATCH);
6511 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
6512 C2S(WOW_REASON_IOAC_MAGIC_EVENT);
6513 C2S(WOW_REASON_IOAC_SHORT_EVENT);
6514 C2S(WOW_REASON_IOAC_EXTEND_EVENT);
6515 C2S(WOW_REASON_IOAC_TIMER_EVENT);
6516 C2S(WOW_REASON_ROAM_HO);
6517 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
6518 C2S(WOW_REASON_BEACON_RECV);
6519 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
6520 C2S(WOW_REASON_DEBUG_TEST);
6521 default:
6522 return NULL;
6523 }
6524}
6525
6526#undef C2S
6527
6528struct wmi_wow_ev_arg {
6529 u32 vdev_id;
6530 u32 flag;
6531 enum wmi_wow_wake_reason wake_reason;
6532 u32 data_len;
6533};
6534
6535#define WOW_MIN_PATTERN_SIZE 1
6536#define WOW_MAX_PATTERN_SIZE 148
6537#define WOW_MAX_PKT_OFFSET 128
6538
6539enum wmi_tdls_state {
6540 WMI_TDLS_DISABLE,
6541 WMI_TDLS_ENABLE_PASSIVE,
6542 WMI_TDLS_ENABLE_ACTIVE,
6543};
6544
6545enum wmi_tdls_peer_state {
6546 WMI_TDLS_PEER_STATE_PEERING,
6547 WMI_TDLS_PEER_STATE_CONNECTED,
6548 WMI_TDLS_PEER_STATE_TEARDOWN,
6549};
6550
6551struct wmi_tdls_peer_update_cmd_arg {
6552 u32 vdev_id;
6553 enum wmi_tdls_peer_state peer_state;
6554 u8 addr[ETH_ALEN];
6555};
6556
6557#define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
6558
6559struct wmi_tdls_peer_capab_arg {
6560 u8 peer_uapsd_queues;
6561 u8 peer_max_sp;
6562 u32 buff_sta_support;
6563 u32 off_chan_support;
6564 u32 peer_curr_operclass;
6565 u32 self_curr_operclass;
6566 u32 peer_chan_len;
6567 u32 peer_operclass_len;
6568 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
6569 u32 is_peer_responder;
6570 u32 pref_offchan_num;
6571 u32 pref_offchan_bw;
6572};
6573
6574enum wmi_txbf_conf {
6575 WMI_TXBF_CONF_UNSUPPORTED,
6576 WMI_TXBF_CONF_BEFORE_ASSOC,
6577 WMI_TXBF_CONF_AFTER_ASSOC,
6578};
6579
6580#define WMI_CCA_DETECT_LEVEL_AUTO 0
6581#define WMI_CCA_DETECT_MARGIN_AUTO 0
6582
6583struct wmi_pdev_set_adaptive_cca_params {
6584 __le32 enable;
6585 __le32 cca_detect_level;
6586 __le32 cca_detect_margin;
6587} __packed;
6588
6589enum wmi_host_platform_type {
6590 WMI_HOST_PLATFORM_HIGH_PERF,
6591 WMI_HOST_PLATFORM_LOW_PERF,
6592};
6593
6594enum wmi_bss_survey_req_type {
6595 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
6596 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
6597};
6598
6599struct wmi_pdev_chan_info_req_cmd {
6600 __le32 type;
6601 __le32 reserved;
6602} __packed;
6603
6604struct ath10k;
6605struct ath10k_vif;
6606struct ath10k_fw_stats_pdev;
6607struct ath10k_fw_stats_peer;
6608struct ath10k_fw_stats;
6609
6610int ath10k_wmi_attach(struct ath10k *ar);
6611void ath10k_wmi_detach(struct ath10k *ar);
6612void ath10k_wmi_free_host_mem(struct ath10k *ar);
6613int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
6614int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
6615
6616struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
6617int ath10k_wmi_connect(struct ath10k *ar);
6618
6619struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
6620int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
6621int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
6622 u32 cmd_id);
6623void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *arg);
6624
6625void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
6626 struct ath10k_fw_stats_pdev *dst);
6627void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
6628 struct ath10k_fw_stats_pdev *dst);
6629void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
6630 struct ath10k_fw_stats_pdev *dst);
6631void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
6632 struct ath10k_fw_stats_pdev *dst);
6633void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
6634 struct ath10k_fw_stats_peer *dst);
6635void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
6636 struct wmi_host_mem_chunks *chunks);
6637void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
6638 const struct wmi_start_scan_arg *arg);
6639void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
6640 const struct wmi_wmm_params_arg *arg);
6641void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
6642 const struct wmi_channel_arg *arg);
6643int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
6644
6645int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
6646int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
6647void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
6648void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
6649int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
6650void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
6651void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
6652void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
6653void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
6654void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
6655void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
6656void ath10k_wmi_event_dfs(struct ath10k *ar,
6657 struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
6658void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
6659 struct wmi_phyerr_ev_arg *phyerr,
6660 u64 tsf);
6661void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
6662void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
6663void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
6664void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
6665void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
6666void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
6667void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
6668 struct sk_buff *skb);
6669void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
6670 struct sk_buff *skb);
6671void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
6672void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
6673void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
6674void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
6675void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
6676void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
6677 struct sk_buff *skb);
6678void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
6679void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
6680void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
6681void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
6682 struct sk_buff *skb);
6683void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
6684void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
6685void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
6686void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
6687int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
6688int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
6689 int left_len, struct wmi_phyerr_ev_arg *arg);
6690void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
6691 struct ath10k_fw_stats *fw_stats,
6692 char *buf);
6693void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
6694 struct ath10k_fw_stats *fw_stats,
6695 char *buf);
6696size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head);
6697size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head);
6698void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
6699 struct ath10k_fw_stats *fw_stats,
6700 char *buf);
6701int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
6702 enum wmi_vdev_subtype subtype);
6703int ath10k_wmi_barrier(struct ath10k *ar);
6704
6705#endif
6706