linux/drivers/net/wireless/ath/ath9k/main.c
<<
>>
Prefs
   1/*
   2 * Copyright (c) 2008-2011 Atheros Communications Inc.
   3 *
   4 * Permission to use, copy, modify, and/or distribute this software for any
   5 * purpose with or without fee is hereby granted, provided that the above
   6 * copyright notice and this permission notice appear in all copies.
   7 *
   8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15 */
  16
  17#include <linux/nl80211.h>
  18#include <linux/delay.h>
  19#include "ath9k.h"
  20#include "btcoex.h"
  21
  22u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23{
  24        /*
  25         * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26         *   0 for no restriction
  27         *   1 for 1/4 us
  28         *   2 for 1/2 us
  29         *   3 for 1 us
  30         *   4 for 2 us
  31         *   5 for 4 us
  32         *   6 for 8 us
  33         *   7 for 16 us
  34         */
  35        switch (mpdudensity) {
  36        case 0:
  37                return 0;
  38        case 1:
  39        case 2:
  40        case 3:
  41                /* Our lower layer calculations limit our precision to
  42                   1 microsecond */
  43                return 1;
  44        case 4:
  45                return 2;
  46        case 5:
  47                return 4;
  48        case 6:
  49                return 8;
  50        case 7:
  51                return 16;
  52        default:
  53                return 0;
  54        }
  55}
  56
  57static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                     bool sw_pending)
  59{
  60        bool pending = false;
  61
  62        spin_lock_bh(&txq->axq_lock);
  63
  64        if (txq->axq_depth) {
  65                pending = true;
  66                goto out;
  67        }
  68
  69        if (!sw_pending)
  70                goto out;
  71
  72        if (txq->mac80211_qnum >= 0) {
  73                struct ath_acq *acq;
  74
  75                acq = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                if (!list_empty(&acq->acq_new) || !list_empty(&acq->acq_old))
  77                        pending = true;
  78        }
  79out:
  80        spin_unlock_bh(&txq->axq_lock);
  81        return pending;
  82}
  83
  84static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85{
  86        unsigned long flags;
  87        bool ret;
  88
  89        spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90        ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93        return ret;
  94}
  95
  96void ath_ps_full_sleep(unsigned long data)
  97{
  98        struct ath_softc *sc = (struct ath_softc *) data;
  99        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100        bool reset;
 101
 102        spin_lock(&common->cc_lock);
 103        ath_hw_cycle_counters_update(common);
 104        spin_unlock(&common->cc_lock);
 105
 106        ath9k_hw_setrxabort(sc->sc_ah, 1);
 107        ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 108
 109        ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 110}
 111
 112void ath9k_ps_wakeup(struct ath_softc *sc)
 113{
 114        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 115        unsigned long flags;
 116        enum ath9k_power_mode power_mode;
 117
 118        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119        if (++sc->ps_usecount != 1)
 120                goto unlock;
 121
 122        del_timer_sync(&sc->sleep_timer);
 123        power_mode = sc->sc_ah->power_mode;
 124        ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 125
 126        /*
 127         * While the hardware is asleep, the cycle counters contain no
 128         * useful data. Better clear them now so that they don't mess up
 129         * survey data results.
 130         */
 131        if (power_mode != ATH9K_PM_AWAKE) {
 132                spin_lock(&common->cc_lock);
 133                ath_hw_cycle_counters_update(common);
 134                memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 135                memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 136                spin_unlock(&common->cc_lock);
 137        }
 138
 139 unlock:
 140        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141}
 142
 143void ath9k_ps_restore(struct ath_softc *sc)
 144{
 145        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 146        enum ath9k_power_mode mode;
 147        unsigned long flags;
 148
 149        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 150        if (--sc->ps_usecount != 0)
 151                goto unlock;
 152
 153        if (sc->ps_idle) {
 154                mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 155                goto unlock;
 156        }
 157
 158        if (sc->ps_enabled &&
 159                   !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 160                                     PS_WAIT_FOR_CAB |
 161                                     PS_WAIT_FOR_PSPOLL_DATA |
 162                                     PS_WAIT_FOR_TX_ACK |
 163                                     PS_WAIT_FOR_ANI))) {
 164                mode = ATH9K_PM_NETWORK_SLEEP;
 165                if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 166                        ath9k_btcoex_stop_gen_timer(sc);
 167        } else {
 168                goto unlock;
 169        }
 170
 171        spin_lock(&common->cc_lock);
 172        ath_hw_cycle_counters_update(common);
 173        spin_unlock(&common->cc_lock);
 174
 175        ath9k_hw_setpower(sc->sc_ah, mode);
 176
 177 unlock:
 178        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 179}
 180
 181static void __ath_cancel_work(struct ath_softc *sc)
 182{
 183        cancel_work_sync(&sc->paprd_work);
 184        cancel_delayed_work_sync(&sc->hw_check_work);
 185        cancel_delayed_work_sync(&sc->hw_pll_work);
 186
 187#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 188        if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 189                cancel_work_sync(&sc->mci_work);
 190#endif
 191}
 192
 193void ath_cancel_work(struct ath_softc *sc)
 194{
 195        __ath_cancel_work(sc);
 196        cancel_work_sync(&sc->hw_reset_work);
 197}
 198
 199void ath_restart_work(struct ath_softc *sc)
 200{
 201        ieee80211_queue_delayed_work(sc->hw, &sc->hw_check_work,
 202                                     ATH_HW_CHECK_POLL_INT);
 203
 204        if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 205                ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 206                                     msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 207
 208        ath_start_ani(sc);
 209}
 210
 211static bool ath_prepare_reset(struct ath_softc *sc)
 212{
 213        struct ath_hw *ah = sc->sc_ah;
 214        bool ret = true;
 215
 216        ieee80211_stop_queues(sc->hw);
 217        ath_stop_ani(sc);
 218        ath9k_hw_disable_interrupts(ah);
 219
 220        if (AR_SREV_9300_20_OR_LATER(ah)) {
 221                ret &= ath_stoprecv(sc);
 222                ret &= ath_drain_all_txq(sc);
 223        } else {
 224                ret &= ath_drain_all_txq(sc);
 225                ret &= ath_stoprecv(sc);
 226        }
 227
 228        return ret;
 229}
 230
 231static bool ath_complete_reset(struct ath_softc *sc, bool start)
 232{
 233        struct ath_hw *ah = sc->sc_ah;
 234        struct ath_common *common = ath9k_hw_common(ah);
 235        unsigned long flags;
 236
 237        ath9k_calculate_summary_state(sc, sc->cur_chan);
 238        ath_startrecv(sc);
 239        ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 240                               sc->cur_chan->txpower,
 241                               &sc->cur_chan->cur_txpower);
 242        clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 243
 244        if (!sc->cur_chan->offchannel && start) {
 245                /* restore per chanctx TSF timer */
 246                if (sc->cur_chan->tsf_val) {
 247                        u32 offset;
 248
 249                        offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 250                                                         NULL);
 251                        ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 252                }
 253
 254
 255                if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 256                        goto work;
 257
 258                if (ah->opmode == NL80211_IFTYPE_STATION &&
 259                    test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 260                        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 261                        sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 262                        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 263                } else {
 264                        ath9k_set_beacon(sc);
 265                }
 266        work:
 267                ath_restart_work(sc);
 268                ath_txq_schedule_all(sc);
 269        }
 270
 271        sc->gtt_cnt = 0;
 272
 273        ath9k_hw_set_interrupts(ah);
 274        ath9k_hw_enable_interrupts(ah);
 275        ieee80211_wake_queues(sc->hw);
 276        ath9k_p2p_ps_timer(sc);
 277
 278        return true;
 279}
 280
 281static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 282{
 283        struct ath_hw *ah = sc->sc_ah;
 284        struct ath_common *common = ath9k_hw_common(ah);
 285        struct ath9k_hw_cal_data *caldata = NULL;
 286        bool fastcc = true;
 287        int r;
 288
 289        __ath_cancel_work(sc);
 290
 291        disable_irq(sc->irq);
 292        tasklet_disable(&sc->intr_tq);
 293        tasklet_disable(&sc->bcon_tasklet);
 294        spin_lock_bh(&sc->sc_pcu_lock);
 295
 296        if (!sc->cur_chan->offchannel) {
 297                fastcc = false;
 298                caldata = &sc->cur_chan->caldata;
 299        }
 300
 301        if (!hchan) {
 302                fastcc = false;
 303                hchan = ah->curchan;
 304        }
 305
 306        if (!ath_prepare_reset(sc))
 307                fastcc = false;
 308
 309        if (ath9k_is_chanctx_enabled())
 310                fastcc = false;
 311
 312        spin_lock_bh(&sc->chan_lock);
 313        sc->cur_chandef = sc->cur_chan->chandef;
 314        spin_unlock_bh(&sc->chan_lock);
 315
 316        ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 317                hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 318
 319        r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 320        if (r) {
 321                ath_err(common,
 322                        "Unable to reset channel, reset status %d\n", r);
 323
 324                ath9k_hw_enable_interrupts(ah);
 325                ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 326
 327                goto out;
 328        }
 329
 330        if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 331            sc->cur_chan->offchannel)
 332                ath9k_mci_set_txpower(sc, true, false);
 333
 334        if (!ath_complete_reset(sc, true))
 335                r = -EIO;
 336
 337out:
 338        enable_irq(sc->irq);
 339        spin_unlock_bh(&sc->sc_pcu_lock);
 340        tasklet_enable(&sc->bcon_tasklet);
 341        tasklet_enable(&sc->intr_tq);
 342
 343        return r;
 344}
 345
 346static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 347                            struct ieee80211_vif *vif)
 348{
 349        struct ath_node *an;
 350        an = (struct ath_node *)sta->drv_priv;
 351
 352        an->sc = sc;
 353        an->sta = sta;
 354        an->vif = vif;
 355        memset(&an->key_idx, 0, sizeof(an->key_idx));
 356
 357        ath_tx_node_init(sc, an);
 358
 359        ath_dynack_node_init(sc->sc_ah, an);
 360}
 361
 362static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 363{
 364        struct ath_node *an = (struct ath_node *)sta->drv_priv;
 365        ath_tx_node_cleanup(sc, an);
 366
 367        ath_dynack_node_deinit(sc->sc_ah, an);
 368}
 369
 370void ath9k_tasklet(unsigned long data)
 371{
 372        struct ath_softc *sc = (struct ath_softc *)data;
 373        struct ath_hw *ah = sc->sc_ah;
 374        struct ath_common *common = ath9k_hw_common(ah);
 375        enum ath_reset_type type;
 376        unsigned long flags;
 377        u32 status;
 378        u32 rxmask;
 379
 380        spin_lock_irqsave(&sc->intr_lock, flags);
 381        status = sc->intrstatus;
 382        sc->intrstatus = 0;
 383        spin_unlock_irqrestore(&sc->intr_lock, flags);
 384
 385        ath9k_ps_wakeup(sc);
 386        spin_lock(&sc->sc_pcu_lock);
 387
 388        if (status & ATH9K_INT_FATAL) {
 389                type = RESET_TYPE_FATAL_INT;
 390                ath9k_queue_reset(sc, type);
 391                ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 392                goto out;
 393        }
 394
 395        if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 396            (status & ATH9K_INT_BB_WATCHDOG)) {
 397                spin_lock(&common->cc_lock);
 398                ath_hw_cycle_counters_update(common);
 399                ar9003_hw_bb_watchdog_dbg_info(ah);
 400                spin_unlock(&common->cc_lock);
 401
 402                if (ar9003_hw_bb_watchdog_check(ah)) {
 403                        type = RESET_TYPE_BB_WATCHDOG;
 404                        ath9k_queue_reset(sc, type);
 405
 406                        ath_dbg(common, RESET,
 407                                "BB_WATCHDOG: Skipping interrupts\n");
 408                        goto out;
 409                }
 410        }
 411
 412        if (status & ATH9K_INT_GTT) {
 413                sc->gtt_cnt++;
 414
 415                if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 416                        type = RESET_TYPE_TX_GTT;
 417                        ath9k_queue_reset(sc, type);
 418                        ath_dbg(common, RESET,
 419                                "GTT: Skipping interrupts\n");
 420                        goto out;
 421                }
 422        }
 423
 424        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 425        if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 426                /*
 427                 * TSF sync does not look correct; remain awake to sync with
 428                 * the next Beacon.
 429                 */
 430                ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 431                sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 432        }
 433        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 434
 435        if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 436                rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 437                          ATH9K_INT_RXORN);
 438        else
 439                rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 440
 441        if (status & rxmask) {
 442                /* Check for high priority Rx first */
 443                if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 444                    (status & ATH9K_INT_RXHP))
 445                        ath_rx_tasklet(sc, 0, true);
 446
 447                ath_rx_tasklet(sc, 0, false);
 448        }
 449
 450        if (status & ATH9K_INT_TX) {
 451                if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 452                        /*
 453                         * For EDMA chips, TX completion is enabled for the
 454                         * beacon queue, so if a beacon has been transmitted
 455                         * successfully after a GTT interrupt, the GTT counter
 456                         * gets reset to zero here.
 457                         */
 458                        sc->gtt_cnt = 0;
 459
 460                        ath_tx_edma_tasklet(sc);
 461                } else {
 462                        ath_tx_tasklet(sc);
 463                }
 464
 465                wake_up(&sc->tx_wait);
 466        }
 467
 468        if (status & ATH9K_INT_GENTIMER)
 469                ath_gen_timer_isr(sc->sc_ah);
 470
 471        ath9k_btcoex_handle_interrupt(sc, status);
 472
 473        /* re-enable hardware interrupt */
 474        ath9k_hw_resume_interrupts(ah);
 475out:
 476        spin_unlock(&sc->sc_pcu_lock);
 477        ath9k_ps_restore(sc);
 478}
 479
 480irqreturn_t ath_isr(int irq, void *dev)
 481{
 482#define SCHED_INTR (                            \
 483                ATH9K_INT_FATAL |               \
 484                ATH9K_INT_BB_WATCHDOG |         \
 485                ATH9K_INT_RXORN |               \
 486                ATH9K_INT_RXEOL |               \
 487                ATH9K_INT_RX |                  \
 488                ATH9K_INT_RXLP |                \
 489                ATH9K_INT_RXHP |                \
 490                ATH9K_INT_TX |                  \
 491                ATH9K_INT_BMISS |               \
 492                ATH9K_INT_CST |                 \
 493                ATH9K_INT_GTT |                 \
 494                ATH9K_INT_TSFOOR |              \
 495                ATH9K_INT_GENTIMER |            \
 496                ATH9K_INT_MCI)
 497
 498        struct ath_softc *sc = dev;
 499        struct ath_hw *ah = sc->sc_ah;
 500        struct ath_common *common = ath9k_hw_common(ah);
 501        enum ath9k_int status;
 502        u32 sync_cause = 0;
 503        bool sched = false;
 504
 505        /*
 506         * The hardware is not ready/present, don't
 507         * touch anything. Note this can happen early
 508         * on if the IRQ is shared.
 509         */
 510        if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 511                return IRQ_NONE;
 512
 513        /* shared irq, not for us */
 514        if (!ath9k_hw_intrpend(ah))
 515                return IRQ_NONE;
 516
 517        /*
 518         * Figure out the reason(s) for the interrupt.  Note
 519         * that the hal returns a pseudo-ISR that may include
 520         * bits we haven't explicitly enabled so we mask the
 521         * value to insure we only process bits we requested.
 522         */
 523        ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 524        ath9k_debug_sync_cause(sc, sync_cause);
 525        status &= ah->imask;    /* discard unasked-for bits */
 526
 527        if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
 528                return IRQ_HANDLED;
 529
 530        /*
 531         * If there are no status bits set, then this interrupt was not
 532         * for me (should have been caught above).
 533         */
 534        if (!status)
 535                return IRQ_NONE;
 536
 537        /* Cache the status */
 538        spin_lock(&sc->intr_lock);
 539        sc->intrstatus |= status;
 540        spin_unlock(&sc->intr_lock);
 541
 542        if (status & SCHED_INTR)
 543                sched = true;
 544
 545        /*
 546         * If a FATAL interrupt is received, we have to reset the chip
 547         * immediately.
 548         */
 549        if (status & ATH9K_INT_FATAL)
 550                goto chip_reset;
 551
 552        if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 553            (status & ATH9K_INT_BB_WATCHDOG))
 554                goto chip_reset;
 555
 556        if (status & ATH9K_INT_SWBA)
 557                tasklet_schedule(&sc->bcon_tasklet);
 558
 559        if (status & ATH9K_INT_TXURN)
 560                ath9k_hw_updatetxtriglevel(ah, true);
 561
 562        if (status & ATH9K_INT_RXEOL) {
 563                ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 564                ath9k_hw_set_interrupts(ah);
 565        }
 566
 567        if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 568                if (status & ATH9K_INT_TIM_TIMER) {
 569                        if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 570                                goto chip_reset;
 571                        /* Clear RxAbort bit so that we can
 572                         * receive frames */
 573                        ath9k_setpower(sc, ATH9K_PM_AWAKE);
 574                        spin_lock(&sc->sc_pm_lock);
 575                        ath9k_hw_setrxabort(sc->sc_ah, 0);
 576                        sc->ps_flags |= PS_WAIT_FOR_BEACON;
 577                        spin_unlock(&sc->sc_pm_lock);
 578                }
 579
 580chip_reset:
 581
 582        ath_debug_stat_interrupt(sc, status);
 583
 584        if (sched) {
 585                /* turn off every interrupt */
 586                ath9k_hw_kill_interrupts(ah);
 587                tasklet_schedule(&sc->intr_tq);
 588        }
 589
 590        return IRQ_HANDLED;
 591
 592#undef SCHED_INTR
 593}
 594
 595/*
 596 * This function is called when a HW reset cannot be deferred
 597 * and has to be immediate.
 598 */
 599int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 600{
 601        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 602        int r;
 603
 604        ath9k_hw_kill_interrupts(sc->sc_ah);
 605        set_bit(ATH_OP_HW_RESET, &common->op_flags);
 606
 607        ath9k_ps_wakeup(sc);
 608        r = ath_reset_internal(sc, hchan);
 609        ath9k_ps_restore(sc);
 610
 611        return r;
 612}
 613
 614/*
 615 * When a HW reset can be deferred, it is added to the
 616 * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 617 * queueing.
 618 */
 619void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 620{
 621        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 622#ifdef CONFIG_ATH9K_DEBUGFS
 623        RESET_STAT_INC(sc, type);
 624#endif
 625        ath9k_hw_kill_interrupts(sc->sc_ah);
 626        set_bit(ATH_OP_HW_RESET, &common->op_flags);
 627        ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 628}
 629
 630void ath_reset_work(struct work_struct *work)
 631{
 632        struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 633
 634        ath9k_ps_wakeup(sc);
 635        ath_reset_internal(sc, NULL);
 636        ath9k_ps_restore(sc);
 637}
 638
 639/**********************/
 640/* mac80211 callbacks */
 641/**********************/
 642
 643static int ath9k_start(struct ieee80211_hw *hw)
 644{
 645        struct ath_softc *sc = hw->priv;
 646        struct ath_hw *ah = sc->sc_ah;
 647        struct ath_common *common = ath9k_hw_common(ah);
 648        struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 649        struct ath_chanctx *ctx = sc->cur_chan;
 650        struct ath9k_channel *init_channel;
 651        int r;
 652
 653        ath_dbg(common, CONFIG,
 654                "Starting driver with initial channel: %d MHz\n",
 655                curchan->center_freq);
 656
 657        ath9k_ps_wakeup(sc);
 658        mutex_lock(&sc->mutex);
 659
 660        init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 661        sc->cur_chandef = hw->conf.chandef;
 662
 663        /* Reset SERDES registers */
 664        ath9k_hw_configpcipowersave(ah, false);
 665
 666        /*
 667         * The basic interface to setting the hardware in a good
 668         * state is ``reset''.  On return the hardware is known to
 669         * be powered up and with interrupts disabled.  This must
 670         * be followed by initialization of the appropriate bits
 671         * and then setup of the interrupt mask.
 672         */
 673        spin_lock_bh(&sc->sc_pcu_lock);
 674
 675        atomic_set(&ah->intr_ref_cnt, -1);
 676
 677        r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 678        if (r) {
 679                ath_err(common,
 680                        "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 681                        r, curchan->center_freq);
 682                ah->reset_power_on = false;
 683        }
 684
 685        /* Setup our intr mask. */
 686        ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 687                    ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 688                    ATH9K_INT_GLOBAL;
 689
 690        if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 691                ah->imask |= ATH9K_INT_RXHP |
 692                             ATH9K_INT_RXLP;
 693        else
 694                ah->imask |= ATH9K_INT_RX;
 695
 696        if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 697                ah->imask |= ATH9K_INT_BB_WATCHDOG;
 698
 699        /*
 700         * Enable GTT interrupts only for AR9003/AR9004 chips
 701         * for now.
 702         */
 703        if (AR_SREV_9300_20_OR_LATER(ah))
 704                ah->imask |= ATH9K_INT_GTT;
 705
 706        if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 707                ah->imask |= ATH9K_INT_CST;
 708
 709        ath_mci_enable(sc);
 710
 711        clear_bit(ATH_OP_INVALID, &common->op_flags);
 712        sc->sc_ah->is_monitoring = false;
 713
 714        if (!ath_complete_reset(sc, false))
 715                ah->reset_power_on = false;
 716
 717        if (ah->led_pin >= 0) {
 718                ath9k_hw_set_gpio(ah, ah->led_pin,
 719                                  (ah->config.led_active_high) ? 1 : 0);
 720                ath9k_hw_gpio_request_out(ah, ah->led_pin, NULL,
 721                                          AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 722        }
 723
 724        /*
 725         * Reset key cache to sane defaults (all entries cleared) instead of
 726         * semi-random values after suspend/resume.
 727         */
 728        ath9k_cmn_init_crypto(sc->sc_ah);
 729
 730        ath9k_hw_reset_tsf(ah);
 731
 732        spin_unlock_bh(&sc->sc_pcu_lock);
 733
 734        ath9k_rng_start(sc);
 735
 736        mutex_unlock(&sc->mutex);
 737
 738        ath9k_ps_restore(sc);
 739
 740        return 0;
 741}
 742
 743static void ath9k_tx(struct ieee80211_hw *hw,
 744                     struct ieee80211_tx_control *control,
 745                     struct sk_buff *skb)
 746{
 747        struct ath_softc *sc = hw->priv;
 748        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 749        struct ath_tx_control txctl;
 750        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 751        unsigned long flags;
 752
 753        if (sc->ps_enabled) {
 754                /*
 755                 * mac80211 does not set PM field for normal data frames, so we
 756                 * need to update that based on the current PS mode.
 757                 */
 758                if (ieee80211_is_data(hdr->frame_control) &&
 759                    !ieee80211_is_nullfunc(hdr->frame_control) &&
 760                    !ieee80211_has_pm(hdr->frame_control)) {
 761                        ath_dbg(common, PS,
 762                                "Add PM=1 for a TX frame while in PS mode\n");
 763                        hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 764                }
 765        }
 766
 767        if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 768                /*
 769                 * We are using PS-Poll and mac80211 can request TX while in
 770                 * power save mode. Need to wake up hardware for the TX to be
 771                 * completed and if needed, also for RX of buffered frames.
 772                 */
 773                ath9k_ps_wakeup(sc);
 774                spin_lock_irqsave(&sc->sc_pm_lock, flags);
 775                if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 776                        ath9k_hw_setrxabort(sc->sc_ah, 0);
 777                if (ieee80211_is_pspoll(hdr->frame_control)) {
 778                        ath_dbg(common, PS,
 779                                "Sending PS-Poll to pick a buffered frame\n");
 780                        sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 781                } else {
 782                        ath_dbg(common, PS, "Wake up to complete TX\n");
 783                        sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 784                }
 785                /*
 786                 * The actual restore operation will happen only after
 787                 * the ps_flags bit is cleared. We are just dropping
 788                 * the ps_usecount here.
 789                 */
 790                spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 791                ath9k_ps_restore(sc);
 792        }
 793
 794        /*
 795         * Cannot tx while the hardware is in full sleep, it first needs a full
 796         * chip reset to recover from that
 797         */
 798        if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 799                ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 800                goto exit;
 801        }
 802
 803        memset(&txctl, 0, sizeof(struct ath_tx_control));
 804        txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 805        txctl.sta = control->sta;
 806
 807        ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 808
 809        if (ath_tx_start(hw, skb, &txctl) != 0) {
 810                ath_dbg(common, XMIT, "TX failed\n");
 811                TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 812                goto exit;
 813        }
 814
 815        return;
 816exit:
 817        ieee80211_free_txskb(hw, skb);
 818}
 819
 820static void ath9k_stop(struct ieee80211_hw *hw)
 821{
 822        struct ath_softc *sc = hw->priv;
 823        struct ath_hw *ah = sc->sc_ah;
 824        struct ath_common *common = ath9k_hw_common(ah);
 825        bool prev_idle;
 826
 827        ath9k_deinit_channel_context(sc);
 828
 829        mutex_lock(&sc->mutex);
 830
 831        ath9k_rng_stop(sc);
 832
 833        ath_cancel_work(sc);
 834
 835        if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 836                ath_dbg(common, ANY, "Device not present\n");
 837                mutex_unlock(&sc->mutex);
 838                return;
 839        }
 840
 841        /* Ensure HW is awake when we try to shut it down. */
 842        ath9k_ps_wakeup(sc);
 843
 844        spin_lock_bh(&sc->sc_pcu_lock);
 845
 846        /* prevent tasklets to enable interrupts once we disable them */
 847        ah->imask &= ~ATH9K_INT_GLOBAL;
 848
 849        /* make sure h/w will not generate any interrupt
 850         * before setting the invalid flag. */
 851        ath9k_hw_disable_interrupts(ah);
 852
 853        spin_unlock_bh(&sc->sc_pcu_lock);
 854
 855        /* we can now sync irq and kill any running tasklets, since we already
 856         * disabled interrupts and not holding a spin lock */
 857        synchronize_irq(sc->irq);
 858        tasklet_kill(&sc->intr_tq);
 859        tasklet_kill(&sc->bcon_tasklet);
 860
 861        prev_idle = sc->ps_idle;
 862        sc->ps_idle = true;
 863
 864        spin_lock_bh(&sc->sc_pcu_lock);
 865
 866        if (ah->led_pin >= 0) {
 867                ath9k_hw_set_gpio(ah, ah->led_pin,
 868                                  (ah->config.led_active_high) ? 0 : 1);
 869                ath9k_hw_gpio_request_in(ah, ah->led_pin, NULL);
 870        }
 871
 872        ath_prepare_reset(sc);
 873
 874        if (sc->rx.frag) {
 875                dev_kfree_skb_any(sc->rx.frag);
 876                sc->rx.frag = NULL;
 877        }
 878
 879        if (!ah->curchan)
 880                ah->curchan = ath9k_cmn_get_channel(hw, ah,
 881                                                    &sc->cur_chan->chandef);
 882
 883        ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 884
 885        set_bit(ATH_OP_INVALID, &common->op_flags);
 886
 887        ath9k_hw_phy_disable(ah);
 888
 889        ath9k_hw_configpcipowersave(ah, true);
 890
 891        spin_unlock_bh(&sc->sc_pcu_lock);
 892
 893        ath9k_ps_restore(sc);
 894
 895        sc->ps_idle = prev_idle;
 896
 897        mutex_unlock(&sc->mutex);
 898
 899        ath_dbg(common, CONFIG, "Driver halt\n");
 900}
 901
 902static bool ath9k_uses_beacons(int type)
 903{
 904        switch (type) {
 905        case NL80211_IFTYPE_AP:
 906        case NL80211_IFTYPE_ADHOC:
 907        case NL80211_IFTYPE_MESH_POINT:
 908                return true;
 909        default:
 910                return false;
 911        }
 912}
 913
 914static void ath9k_vif_iter_set_beacon(struct ath9k_vif_iter_data *iter_data,
 915                                      struct ieee80211_vif *vif)
 916{
 917        /* Use the first (configured) interface, but prefering AP interfaces. */
 918        if (!iter_data->primary_beacon_vif) {
 919                iter_data->primary_beacon_vif = vif;
 920        } else {
 921                if (iter_data->primary_beacon_vif->type != NL80211_IFTYPE_AP &&
 922                    vif->type == NL80211_IFTYPE_AP)
 923                        iter_data->primary_beacon_vif = vif;
 924        }
 925
 926        iter_data->beacons = true;
 927        iter_data->nbcnvifs += 1;
 928}
 929
 930static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
 931                           u8 *mac, struct ieee80211_vif *vif)
 932{
 933        struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
 934        int i;
 935
 936        if (iter_data->has_hw_macaddr) {
 937                for (i = 0; i < ETH_ALEN; i++)
 938                        iter_data->mask[i] &=
 939                                ~(iter_data->hw_macaddr[i] ^ mac[i]);
 940        } else {
 941                memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
 942                iter_data->has_hw_macaddr = true;
 943        }
 944
 945        if (!vif->bss_conf.use_short_slot)
 946                iter_data->slottime = 20;
 947
 948        switch (vif->type) {
 949        case NL80211_IFTYPE_AP:
 950                iter_data->naps++;
 951                if (vif->bss_conf.enable_beacon)
 952                        ath9k_vif_iter_set_beacon(iter_data, vif);
 953                break;
 954        case NL80211_IFTYPE_STATION:
 955                iter_data->nstations++;
 956                if (avp->assoc && !iter_data->primary_sta)
 957                        iter_data->primary_sta = vif;
 958                break;
 959        case NL80211_IFTYPE_OCB:
 960                iter_data->nocbs++;
 961                break;
 962        case NL80211_IFTYPE_ADHOC:
 963                iter_data->nadhocs++;
 964                if (vif->bss_conf.enable_beacon)
 965                        ath9k_vif_iter_set_beacon(iter_data, vif);
 966                break;
 967        case NL80211_IFTYPE_MESH_POINT:
 968                iter_data->nmeshes++;
 969                if (vif->bss_conf.enable_beacon)
 970                        ath9k_vif_iter_set_beacon(iter_data, vif);
 971                break;
 972        case NL80211_IFTYPE_WDS:
 973                iter_data->nwds++;
 974                break;
 975        default:
 976                break;
 977        }
 978}
 979
 980static void ath9k_update_bssid_mask(struct ath_softc *sc,
 981                                    struct ath_chanctx *ctx,
 982                                    struct ath9k_vif_iter_data *iter_data)
 983{
 984        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 985        struct ath_vif *avp;
 986        int i;
 987
 988        if (!ath9k_is_chanctx_enabled())
 989                return;
 990
 991        list_for_each_entry(avp, &ctx->vifs, list) {
 992                if (ctx->nvifs_assigned != 1)
 993                        continue;
 994
 995                if (!iter_data->has_hw_macaddr)
 996                        continue;
 997
 998                ether_addr_copy(common->curbssid, avp->bssid);
 999
1000                /* perm_addr will be used as the p2p device address. */
1001                for (i = 0; i < ETH_ALEN; i++)
1002                        iter_data->mask[i] &=
1003                                ~(iter_data->hw_macaddr[i] ^
1004                                  sc->hw->wiphy->perm_addr[i]);
1005        }
1006}
1007
1008/* Called with sc->mutex held. */
1009void ath9k_calculate_iter_data(struct ath_softc *sc,
1010                               struct ath_chanctx *ctx,
1011                               struct ath9k_vif_iter_data *iter_data)
1012{
1013        struct ath_vif *avp;
1014
1015        /*
1016         * The hardware will use primary station addr together with the
1017         * BSSID mask when matching addresses.
1018         */
1019        memset(iter_data, 0, sizeof(*iter_data));
1020        eth_broadcast_addr(iter_data->mask);
1021        iter_data->slottime = 9;
1022
1023        list_for_each_entry(avp, &ctx->vifs, list)
1024                ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1025
1026        ath9k_update_bssid_mask(sc, ctx, iter_data);
1027}
1028
1029static void ath9k_set_assoc_state(struct ath_softc *sc,
1030                                  struct ieee80211_vif *vif, bool changed)
1031{
1032        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1033        struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1034        unsigned long flags;
1035
1036        set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1037
1038        ether_addr_copy(common->curbssid, avp->bssid);
1039        common->curaid = avp->aid;
1040        ath9k_hw_write_associd(sc->sc_ah);
1041
1042        if (changed) {
1043                common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1044                sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1045
1046                spin_lock_irqsave(&sc->sc_pm_lock, flags);
1047                sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1048                spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1049        }
1050
1051        if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1052                ath9k_mci_update_wlan_channels(sc, false);
1053
1054        ath_dbg(common, CONFIG,
1055                "Primary Station interface: %pM, BSSID: %pM\n",
1056                vif->addr, common->curbssid);
1057}
1058
1059#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1060static void ath9k_set_offchannel_state(struct ath_softc *sc)
1061{
1062        struct ath_hw *ah = sc->sc_ah;
1063        struct ath_common *common = ath9k_hw_common(ah);
1064        struct ieee80211_vif *vif = NULL;
1065
1066        ath9k_ps_wakeup(sc);
1067
1068        if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1069                vif = sc->offchannel.scan_vif;
1070        else
1071                vif = sc->offchannel.roc_vif;
1072
1073        if (WARN_ON(!vif))
1074                goto exit;
1075
1076        eth_zero_addr(common->curbssid);
1077        eth_broadcast_addr(common->bssidmask);
1078        memcpy(common->macaddr, vif->addr, ETH_ALEN);
1079        common->curaid = 0;
1080        ah->opmode = vif->type;
1081        ah->imask &= ~ATH9K_INT_SWBA;
1082        ah->imask &= ~ATH9K_INT_TSFOOR;
1083        ah->slottime = 9;
1084
1085        ath_hw_setbssidmask(common);
1086        ath9k_hw_setopmode(ah);
1087        ath9k_hw_write_associd(sc->sc_ah);
1088        ath9k_hw_set_interrupts(ah);
1089        ath9k_hw_init_global_settings(ah);
1090
1091exit:
1092        ath9k_ps_restore(sc);
1093}
1094#endif
1095
1096/* Called with sc->mutex held. */
1097void ath9k_calculate_summary_state(struct ath_softc *sc,
1098                                   struct ath_chanctx *ctx)
1099{
1100        struct ath_hw *ah = sc->sc_ah;
1101        struct ath_common *common = ath9k_hw_common(ah);
1102        struct ath9k_vif_iter_data iter_data;
1103
1104        ath_chanctx_check_active(sc, ctx);
1105
1106        if (ctx != sc->cur_chan)
1107                return;
1108
1109#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1110        if (ctx == &sc->offchannel.chan)
1111                return ath9k_set_offchannel_state(sc);
1112#endif
1113
1114        ath9k_ps_wakeup(sc);
1115        ath9k_calculate_iter_data(sc, ctx, &iter_data);
1116
1117        if (iter_data.has_hw_macaddr)
1118                memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1119
1120        memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1121        ath_hw_setbssidmask(common);
1122
1123        if (iter_data.naps > 0) {
1124                ath9k_hw_set_tsfadjust(ah, true);
1125                ah->opmode = NL80211_IFTYPE_AP;
1126        } else {
1127                ath9k_hw_set_tsfadjust(ah, false);
1128                if (iter_data.beacons)
1129                        ath9k_beacon_ensure_primary_slot(sc);
1130
1131                if (iter_data.nmeshes)
1132                        ah->opmode = NL80211_IFTYPE_MESH_POINT;
1133                else if (iter_data.nocbs)
1134                        ah->opmode = NL80211_IFTYPE_OCB;
1135                else if (iter_data.nwds)
1136                        ah->opmode = NL80211_IFTYPE_AP;
1137                else if (iter_data.nadhocs)
1138                        ah->opmode = NL80211_IFTYPE_ADHOC;
1139                else
1140                        ah->opmode = NL80211_IFTYPE_STATION;
1141        }
1142
1143        ath9k_hw_setopmode(ah);
1144
1145        ctx->switch_after_beacon = false;
1146        if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1147                ah->imask |= ATH9K_INT_TSFOOR;
1148        else {
1149                ah->imask &= ~ATH9K_INT_TSFOOR;
1150                if (iter_data.naps == 1 && iter_data.beacons)
1151                        ctx->switch_after_beacon = true;
1152        }
1153
1154        if (ah->opmode == NL80211_IFTYPE_STATION) {
1155                bool changed = (iter_data.primary_sta != ctx->primary_sta);
1156
1157                if (iter_data.primary_sta) {
1158                        iter_data.primary_beacon_vif = iter_data.primary_sta;
1159                        iter_data.beacons = true;
1160                        ath9k_set_assoc_state(sc, iter_data.primary_sta,
1161                                              changed);
1162                        ctx->primary_sta = iter_data.primary_sta;
1163                } else {
1164                        ctx->primary_sta = NULL;
1165                        eth_zero_addr(common->curbssid);
1166                        common->curaid = 0;
1167                        ath9k_hw_write_associd(sc->sc_ah);
1168                        if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1169                                ath9k_mci_update_wlan_channels(sc, true);
1170                }
1171        }
1172        sc->nbcnvifs = iter_data.nbcnvifs;
1173        ath9k_beacon_config(sc, iter_data.primary_beacon_vif,
1174                            iter_data.beacons);
1175        ath9k_hw_set_interrupts(ah);
1176
1177        if (ah->slottime != iter_data.slottime) {
1178                ah->slottime = iter_data.slottime;
1179                ath9k_hw_init_global_settings(ah);
1180        }
1181
1182        if (iter_data.primary_sta)
1183                set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1184        else
1185                clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1186
1187        ath_dbg(common, CONFIG,
1188                "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1189                common->macaddr, common->curbssid, common->bssidmask);
1190
1191        ath9k_ps_restore(sc);
1192}
1193
1194static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1195{
1196        int *power = (int *)data;
1197
1198        if (*power < vif->bss_conf.txpower)
1199                *power = vif->bss_conf.txpower;
1200}
1201
1202/* Called with sc->mutex held. */
1203void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1204{
1205        int power;
1206        struct ath_hw *ah = sc->sc_ah;
1207        struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1208
1209        ath9k_ps_wakeup(sc);
1210        if (ah->tpc_enabled) {
1211                power = (vif) ? vif->bss_conf.txpower : -1;
1212                ieee80211_iterate_active_interfaces_atomic(
1213                                sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1214                                ath9k_tpc_vif_iter, &power);
1215                if (power == -1)
1216                        power = sc->hw->conf.power_level;
1217        } else {
1218                power = sc->hw->conf.power_level;
1219        }
1220        sc->cur_chan->txpower = 2 * power;
1221        ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1222        sc->cur_chan->cur_txpower = reg->max_power_level;
1223        ath9k_ps_restore(sc);
1224}
1225
1226static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1227                                   struct ieee80211_vif *vif)
1228{
1229        int i;
1230
1231        if (!ath9k_is_chanctx_enabled())
1232                return;
1233
1234        for (i = 0; i < IEEE80211_NUM_ACS; i++)
1235                vif->hw_queue[i] = i;
1236
1237        if (vif->type == NL80211_IFTYPE_AP ||
1238            vif->type == NL80211_IFTYPE_MESH_POINT)
1239                vif->cab_queue = hw->queues - 2;
1240        else
1241                vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1242}
1243
1244static int ath9k_add_interface(struct ieee80211_hw *hw,
1245                               struct ieee80211_vif *vif)
1246{
1247        struct ath_softc *sc = hw->priv;
1248        struct ath_hw *ah = sc->sc_ah;
1249        struct ath_common *common = ath9k_hw_common(ah);
1250        struct ath_vif *avp = (void *)vif->drv_priv;
1251        struct ath_node *an = &avp->mcast_node;
1252
1253        mutex_lock(&sc->mutex);
1254
1255        if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1256                if (sc->cur_chan->nvifs >= 1) {
1257                        mutex_unlock(&sc->mutex);
1258                        return -EOPNOTSUPP;
1259                }
1260                sc->tx99_vif = vif;
1261        }
1262
1263        ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1264        sc->cur_chan->nvifs++;
1265
1266        if (vif->type == NL80211_IFTYPE_STATION && ath9k_is_chanctx_enabled())
1267                vif->driver_flags |= IEEE80211_VIF_GET_NOA_UPDATE;
1268
1269        if (ath9k_uses_beacons(vif->type))
1270                ath9k_beacon_assign_slot(sc, vif);
1271
1272        avp->vif = vif;
1273        if (!ath9k_is_chanctx_enabled()) {
1274                avp->chanctx = sc->cur_chan;
1275                list_add_tail(&avp->list, &avp->chanctx->vifs);
1276        }
1277
1278        ath9k_calculate_summary_state(sc, avp->chanctx);
1279
1280        ath9k_assign_hw_queues(hw, vif);
1281
1282        ath9k_set_txpower(sc, vif);
1283
1284        an->sc = sc;
1285        an->sta = NULL;
1286        an->vif = vif;
1287        an->no_ps_filter = true;
1288        ath_tx_node_init(sc, an);
1289
1290        mutex_unlock(&sc->mutex);
1291        return 0;
1292}
1293
1294static int ath9k_change_interface(struct ieee80211_hw *hw,
1295                                  struct ieee80211_vif *vif,
1296                                  enum nl80211_iftype new_type,
1297                                  bool p2p)
1298{
1299        struct ath_softc *sc = hw->priv;
1300        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1301        struct ath_vif *avp = (void *)vif->drv_priv;
1302
1303        mutex_lock(&sc->mutex);
1304
1305        if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1306                mutex_unlock(&sc->mutex);
1307                return -EOPNOTSUPP;
1308        }
1309
1310        ath_dbg(common, CONFIG, "Change Interface\n");
1311
1312        if (ath9k_uses_beacons(vif->type))
1313                ath9k_beacon_remove_slot(sc, vif);
1314
1315        vif->type = new_type;
1316        vif->p2p = p2p;
1317
1318        if (ath9k_uses_beacons(vif->type))
1319                ath9k_beacon_assign_slot(sc, vif);
1320
1321        ath9k_assign_hw_queues(hw, vif);
1322        ath9k_calculate_summary_state(sc, avp->chanctx);
1323
1324        ath9k_set_txpower(sc, vif);
1325
1326        mutex_unlock(&sc->mutex);
1327        return 0;
1328}
1329
1330static void ath9k_remove_interface(struct ieee80211_hw *hw,
1331                                   struct ieee80211_vif *vif)
1332{
1333        struct ath_softc *sc = hw->priv;
1334        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1335        struct ath_vif *avp = (void *)vif->drv_priv;
1336
1337        ath_dbg(common, CONFIG, "Detach Interface\n");
1338
1339        mutex_lock(&sc->mutex);
1340
1341        ath9k_p2p_remove_vif(sc, vif);
1342
1343        sc->cur_chan->nvifs--;
1344        sc->tx99_vif = NULL;
1345        if (!ath9k_is_chanctx_enabled())
1346                list_del(&avp->list);
1347
1348        if (ath9k_uses_beacons(vif->type))
1349                ath9k_beacon_remove_slot(sc, vif);
1350
1351        ath_tx_node_cleanup(sc, &avp->mcast_node);
1352
1353        ath9k_calculate_summary_state(sc, avp->chanctx);
1354
1355        ath9k_set_txpower(sc, NULL);
1356
1357        mutex_unlock(&sc->mutex);
1358}
1359
1360static void ath9k_enable_ps(struct ath_softc *sc)
1361{
1362        struct ath_hw *ah = sc->sc_ah;
1363        struct ath_common *common = ath9k_hw_common(ah);
1364
1365        if (IS_ENABLED(CONFIG_ATH9K_TX99))
1366                return;
1367
1368        sc->ps_enabled = true;
1369        if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1370                if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1371                        ah->imask |= ATH9K_INT_TIM_TIMER;
1372                        ath9k_hw_set_interrupts(ah);
1373                }
1374                ath9k_hw_setrxabort(ah, 1);
1375        }
1376        ath_dbg(common, PS, "PowerSave enabled\n");
1377}
1378
1379static void ath9k_disable_ps(struct ath_softc *sc)
1380{
1381        struct ath_hw *ah = sc->sc_ah;
1382        struct ath_common *common = ath9k_hw_common(ah);
1383
1384        if (IS_ENABLED(CONFIG_ATH9K_TX99))
1385                return;
1386
1387        sc->ps_enabled = false;
1388        ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1389        if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1390                ath9k_hw_setrxabort(ah, 0);
1391                sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1392                                  PS_WAIT_FOR_CAB |
1393                                  PS_WAIT_FOR_PSPOLL_DATA |
1394                                  PS_WAIT_FOR_TX_ACK);
1395                if (ah->imask & ATH9K_INT_TIM_TIMER) {
1396                        ah->imask &= ~ATH9K_INT_TIM_TIMER;
1397                        ath9k_hw_set_interrupts(ah);
1398                }
1399        }
1400        ath_dbg(common, PS, "PowerSave disabled\n");
1401}
1402
1403static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1404{
1405        struct ath_softc *sc = hw->priv;
1406        struct ath_hw *ah = sc->sc_ah;
1407        struct ath_common *common = ath9k_hw_common(ah);
1408        struct ieee80211_conf *conf = &hw->conf;
1409        struct ath_chanctx *ctx = sc->cur_chan;
1410
1411        ath9k_ps_wakeup(sc);
1412        mutex_lock(&sc->mutex);
1413
1414        if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1415                sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1416                if (sc->ps_idle) {
1417                        ath_cancel_work(sc);
1418                        ath9k_stop_btcoex(sc);
1419                } else {
1420                        ath9k_start_btcoex(sc);
1421                        /*
1422                         * The chip needs a reset to properly wake up from
1423                         * full sleep
1424                         */
1425                        ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1426                }
1427        }
1428
1429        /*
1430         * We just prepare to enable PS. We have to wait until our AP has
1431         * ACK'd our null data frame to disable RX otherwise we'll ignore
1432         * those ACKs and end up retransmitting the same null data frames.
1433         * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1434         */
1435        if (changed & IEEE80211_CONF_CHANGE_PS) {
1436                unsigned long flags;
1437                spin_lock_irqsave(&sc->sc_pm_lock, flags);
1438                if (conf->flags & IEEE80211_CONF_PS)
1439                        ath9k_enable_ps(sc);
1440                else
1441                        ath9k_disable_ps(sc);
1442                spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1443        }
1444
1445        if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1446                if (conf->flags & IEEE80211_CONF_MONITOR) {
1447                        ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1448                        sc->sc_ah->is_monitoring = true;
1449                } else {
1450                        ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1451                        sc->sc_ah->is_monitoring = false;
1452                }
1453        }
1454
1455        if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1456                ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1457                ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1458        }
1459
1460        mutex_unlock(&sc->mutex);
1461        ath9k_ps_restore(sc);
1462
1463        return 0;
1464}
1465
1466#define SUPPORTED_FILTERS                       \
1467        (FIF_ALLMULTI |                         \
1468        FIF_CONTROL |                           \
1469        FIF_PSPOLL |                            \
1470        FIF_OTHER_BSS |                         \
1471        FIF_BCN_PRBRESP_PROMISC |               \
1472        FIF_PROBE_REQ |                         \
1473        FIF_FCSFAIL)
1474
1475/* FIXME: sc->sc_full_reset ? */
1476static void ath9k_configure_filter(struct ieee80211_hw *hw,
1477                                   unsigned int changed_flags,
1478                                   unsigned int *total_flags,
1479                                   u64 multicast)
1480{
1481        struct ath_softc *sc = hw->priv;
1482        struct ath_chanctx *ctx;
1483        u32 rfilt;
1484
1485        changed_flags &= SUPPORTED_FILTERS;
1486        *total_flags &= SUPPORTED_FILTERS;
1487
1488        spin_lock_bh(&sc->chan_lock);
1489        ath_for_each_chanctx(sc, ctx)
1490                ctx->rxfilter = *total_flags;
1491#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1492        sc->offchannel.chan.rxfilter = *total_flags;
1493#endif
1494        spin_unlock_bh(&sc->chan_lock);
1495
1496        ath9k_ps_wakeup(sc);
1497        rfilt = ath_calcrxfilter(sc);
1498        ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1499        ath9k_ps_restore(sc);
1500
1501        ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1502                rfilt);
1503}
1504
1505static int ath9k_sta_add(struct ieee80211_hw *hw,
1506                         struct ieee80211_vif *vif,
1507                         struct ieee80211_sta *sta)
1508{
1509        struct ath_softc *sc = hw->priv;
1510        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1511        struct ath_node *an = (struct ath_node *) sta->drv_priv;
1512        struct ieee80211_key_conf ps_key = { };
1513        int key;
1514
1515        ath_node_attach(sc, sta, vif);
1516
1517        if (vif->type != NL80211_IFTYPE_AP &&
1518            vif->type != NL80211_IFTYPE_AP_VLAN)
1519                return 0;
1520
1521        key = ath_key_config(common, vif, sta, &ps_key);
1522        if (key > 0) {
1523                an->ps_key = key;
1524                an->key_idx[0] = key;
1525        }
1526
1527        return 0;
1528}
1529
1530static void ath9k_del_ps_key(struct ath_softc *sc,
1531                             struct ieee80211_vif *vif,
1532                             struct ieee80211_sta *sta)
1533{
1534        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1535        struct ath_node *an = (struct ath_node *) sta->drv_priv;
1536        struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1537
1538        if (!an->ps_key)
1539            return;
1540
1541        ath_key_delete(common, &ps_key);
1542        an->ps_key = 0;
1543        an->key_idx[0] = 0;
1544}
1545
1546static int ath9k_sta_remove(struct ieee80211_hw *hw,
1547                            struct ieee80211_vif *vif,
1548                            struct ieee80211_sta *sta)
1549{
1550        struct ath_softc *sc = hw->priv;
1551
1552        ath9k_del_ps_key(sc, vif, sta);
1553        ath_node_detach(sc, sta);
1554
1555        return 0;
1556}
1557
1558static int ath9k_sta_state(struct ieee80211_hw *hw,
1559                           struct ieee80211_vif *vif,
1560                           struct ieee80211_sta *sta,
1561                           enum ieee80211_sta_state old_state,
1562                           enum ieee80211_sta_state new_state)
1563{
1564        struct ath_softc *sc = hw->priv;
1565        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1566        int ret = 0;
1567
1568        if (old_state == IEEE80211_STA_NOTEXIST &&
1569            new_state == IEEE80211_STA_NONE) {
1570                ret = ath9k_sta_add(hw, vif, sta);
1571                ath_dbg(common, CONFIG,
1572                        "Add station: %pM\n", sta->addr);
1573        } else if (old_state == IEEE80211_STA_NONE &&
1574                   new_state == IEEE80211_STA_NOTEXIST) {
1575                ret = ath9k_sta_remove(hw, vif, sta);
1576                ath_dbg(common, CONFIG,
1577                        "Remove station: %pM\n", sta->addr);
1578        }
1579
1580        if (ath9k_is_chanctx_enabled()) {
1581                if (vif->type == NL80211_IFTYPE_STATION) {
1582                        if (old_state == IEEE80211_STA_ASSOC &&
1583                            new_state == IEEE80211_STA_AUTHORIZED)
1584                                ath_chanctx_event(sc, vif,
1585                                                  ATH_CHANCTX_EVENT_AUTHORIZED);
1586                }
1587        }
1588
1589        return ret;
1590}
1591
1592static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1593                                    struct ath_node *an,
1594                                    bool set)
1595{
1596        int i;
1597
1598        for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1599                if (!an->key_idx[i])
1600                        continue;
1601                ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1602        }
1603}
1604
1605static void ath9k_sta_notify(struct ieee80211_hw *hw,
1606                         struct ieee80211_vif *vif,
1607                         enum sta_notify_cmd cmd,
1608                         struct ieee80211_sta *sta)
1609{
1610        struct ath_softc *sc = hw->priv;
1611        struct ath_node *an = (struct ath_node *) sta->drv_priv;
1612
1613        switch (cmd) {
1614        case STA_NOTIFY_SLEEP:
1615                an->sleeping = true;
1616                ath_tx_aggr_sleep(sta, sc, an);
1617                ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1618                break;
1619        case STA_NOTIFY_AWAKE:
1620                ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1621                an->sleeping = false;
1622                ath_tx_aggr_wakeup(sc, an);
1623                break;
1624        }
1625}
1626
1627static int ath9k_conf_tx(struct ieee80211_hw *hw,
1628                         struct ieee80211_vif *vif, u16 queue,
1629                         const struct ieee80211_tx_queue_params *params)
1630{
1631        struct ath_softc *sc = hw->priv;
1632        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1633        struct ath_txq *txq;
1634        struct ath9k_tx_queue_info qi;
1635        int ret = 0;
1636
1637        if (queue >= IEEE80211_NUM_ACS)
1638                return 0;
1639
1640        txq = sc->tx.txq_map[queue];
1641
1642        ath9k_ps_wakeup(sc);
1643        mutex_lock(&sc->mutex);
1644
1645        memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1646
1647        qi.tqi_aifs = params->aifs;
1648        qi.tqi_cwmin = params->cw_min;
1649        qi.tqi_cwmax = params->cw_max;
1650        qi.tqi_burstTime = params->txop * 32;
1651
1652        ath_dbg(common, CONFIG,
1653                "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1654                queue, txq->axq_qnum, params->aifs, params->cw_min,
1655                params->cw_max, params->txop);
1656
1657        ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1658        ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1659        if (ret)
1660                ath_err(common, "TXQ Update failed\n");
1661
1662        mutex_unlock(&sc->mutex);
1663        ath9k_ps_restore(sc);
1664
1665        return ret;
1666}
1667
1668static int ath9k_set_key(struct ieee80211_hw *hw,
1669                         enum set_key_cmd cmd,
1670                         struct ieee80211_vif *vif,
1671                         struct ieee80211_sta *sta,
1672                         struct ieee80211_key_conf *key)
1673{
1674        struct ath_softc *sc = hw->priv;
1675        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1676        struct ath_node *an = NULL;
1677        int ret = 0, i;
1678
1679        if (ath9k_modparam_nohwcrypt)
1680                return -ENOSPC;
1681
1682        if ((vif->type == NL80211_IFTYPE_ADHOC ||
1683             vif->type == NL80211_IFTYPE_MESH_POINT) &&
1684            (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1685             key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1686            !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1687                /*
1688                 * For now, disable hw crypto for the RSN IBSS group keys. This
1689                 * could be optimized in the future to use a modified key cache
1690                 * design to support per-STA RX GTK, but until that gets
1691                 * implemented, use of software crypto for group addressed
1692                 * frames is a acceptable to allow RSN IBSS to be used.
1693                 */
1694                return -EOPNOTSUPP;
1695        }
1696
1697        mutex_lock(&sc->mutex);
1698        ath9k_ps_wakeup(sc);
1699        ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1700        if (sta)
1701                an = (struct ath_node *)sta->drv_priv;
1702
1703        switch (cmd) {
1704        case SET_KEY:
1705                if (sta)
1706                        ath9k_del_ps_key(sc, vif, sta);
1707
1708                key->hw_key_idx = 0;
1709                ret = ath_key_config(common, vif, sta, key);
1710                if (ret >= 0) {
1711                        key->hw_key_idx = ret;
1712                        /* push IV and Michael MIC generation to stack */
1713                        key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1714                        if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1715                                key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1716                        if (sc->sc_ah->sw_mgmt_crypto_tx &&
1717                            key->cipher == WLAN_CIPHER_SUITE_CCMP)
1718                                key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1719                        ret = 0;
1720                }
1721                if (an && key->hw_key_idx) {
1722                        for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1723                                if (an->key_idx[i])
1724                                        continue;
1725                                an->key_idx[i] = key->hw_key_idx;
1726                                break;
1727                        }
1728                        WARN_ON(i == ARRAY_SIZE(an->key_idx));
1729                }
1730                break;
1731        case DISABLE_KEY:
1732                ath_key_delete(common, key);
1733                if (an) {
1734                        for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1735                                if (an->key_idx[i] != key->hw_key_idx)
1736                                        continue;
1737                                an->key_idx[i] = 0;
1738                                break;
1739                        }
1740                }
1741                key->hw_key_idx = 0;
1742                break;
1743        default:
1744                ret = -EINVAL;
1745        }
1746
1747        ath9k_ps_restore(sc);
1748        mutex_unlock(&sc->mutex);
1749
1750        return ret;
1751}
1752
1753static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1754                                   struct ieee80211_vif *vif,
1755                                   struct ieee80211_bss_conf *bss_conf,
1756                                   u32 changed)
1757{
1758#define CHECK_ANI                               \
1759        (BSS_CHANGED_ASSOC |                    \
1760         BSS_CHANGED_IBSS |                     \
1761         BSS_CHANGED_BEACON_ENABLED)
1762
1763        struct ath_softc *sc = hw->priv;
1764        struct ath_hw *ah = sc->sc_ah;
1765        struct ath_common *common = ath9k_hw_common(ah);
1766        struct ath_vif *avp = (void *)vif->drv_priv;
1767        int slottime;
1768
1769        ath9k_ps_wakeup(sc);
1770        mutex_lock(&sc->mutex);
1771
1772        if (changed & BSS_CHANGED_ASSOC) {
1773                ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1774                        bss_conf->bssid, bss_conf->assoc);
1775
1776                memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1777                avp->aid = bss_conf->aid;
1778                avp->assoc = bss_conf->assoc;
1779
1780                ath9k_calculate_summary_state(sc, avp->chanctx);
1781        }
1782
1783        if ((changed & BSS_CHANGED_IBSS) ||
1784              (changed & BSS_CHANGED_OCB)) {
1785                memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1786                common->curaid = bss_conf->aid;
1787                ath9k_hw_write_associd(sc->sc_ah);
1788        }
1789
1790        if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1791            (changed & BSS_CHANGED_BEACON_INT) ||
1792            (changed & BSS_CHANGED_BEACON_INFO)) {
1793                ath9k_calculate_summary_state(sc, avp->chanctx);
1794        }
1795
1796        if ((avp->chanctx == sc->cur_chan) &&
1797            (changed & BSS_CHANGED_ERP_SLOT)) {
1798                if (bss_conf->use_short_slot)
1799                        slottime = 9;
1800                else
1801                        slottime = 20;
1802
1803                if (vif->type == NL80211_IFTYPE_AP) {
1804                        /*
1805                         * Defer update, so that connected stations can adjust
1806                         * their settings at the same time.
1807                         * See beacon.c for more details
1808                         */
1809                        sc->beacon.slottime = slottime;
1810                        sc->beacon.updateslot = UPDATE;
1811                } else {
1812                        ah->slottime = slottime;
1813                        ath9k_hw_init_global_settings(ah);
1814                }
1815        }
1816
1817        if (changed & BSS_CHANGED_P2P_PS)
1818                ath9k_p2p_bss_info_changed(sc, vif);
1819
1820        if (changed & CHECK_ANI)
1821                ath_check_ani(sc);
1822
1823        if (changed & BSS_CHANGED_TXPOWER) {
1824                ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1825                        vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1826                ath9k_set_txpower(sc, vif);
1827        }
1828
1829        mutex_unlock(&sc->mutex);
1830        ath9k_ps_restore(sc);
1831
1832#undef CHECK_ANI
1833}
1834
1835static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1836{
1837        struct ath_softc *sc = hw->priv;
1838        struct ath_vif *avp = (void *)vif->drv_priv;
1839        u64 tsf;
1840
1841        mutex_lock(&sc->mutex);
1842        ath9k_ps_wakeup(sc);
1843        /* Get current TSF either from HW or kernel time. */
1844        if (sc->cur_chan == avp->chanctx) {
1845                tsf = ath9k_hw_gettsf64(sc->sc_ah);
1846        } else {
1847                tsf = sc->cur_chan->tsf_val +
1848                      ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts, NULL);
1849        }
1850        tsf += le64_to_cpu(avp->tsf_adjust);
1851        ath9k_ps_restore(sc);
1852        mutex_unlock(&sc->mutex);
1853
1854        return tsf;
1855}
1856
1857static void ath9k_set_tsf(struct ieee80211_hw *hw,
1858                          struct ieee80211_vif *vif,
1859                          u64 tsf)
1860{
1861        struct ath_softc *sc = hw->priv;
1862        struct ath_vif *avp = (void *)vif->drv_priv;
1863
1864        mutex_lock(&sc->mutex);
1865        ath9k_ps_wakeup(sc);
1866        tsf -= le64_to_cpu(avp->tsf_adjust);
1867        getrawmonotonic(&avp->chanctx->tsf_ts);
1868        if (sc->cur_chan == avp->chanctx)
1869                ath9k_hw_settsf64(sc->sc_ah, tsf);
1870        avp->chanctx->tsf_val = tsf;
1871        ath9k_ps_restore(sc);
1872        mutex_unlock(&sc->mutex);
1873}
1874
1875static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1876{
1877        struct ath_softc *sc = hw->priv;
1878        struct ath_vif *avp = (void *)vif->drv_priv;
1879
1880        mutex_lock(&sc->mutex);
1881
1882        ath9k_ps_wakeup(sc);
1883        getrawmonotonic(&avp->chanctx->tsf_ts);
1884        if (sc->cur_chan == avp->chanctx)
1885                ath9k_hw_reset_tsf(sc->sc_ah);
1886        avp->chanctx->tsf_val = 0;
1887        ath9k_ps_restore(sc);
1888
1889        mutex_unlock(&sc->mutex);
1890}
1891
1892static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1893                              struct ieee80211_vif *vif,
1894                              struct ieee80211_ampdu_params *params)
1895{
1896        struct ath_softc *sc = hw->priv;
1897        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1898        bool flush = false;
1899        int ret = 0;
1900        struct ieee80211_sta *sta = params->sta;
1901        struct ath_node *an = (struct ath_node *)sta->drv_priv;
1902        enum ieee80211_ampdu_mlme_action action = params->action;
1903        u16 tid = params->tid;
1904        u16 *ssn = &params->ssn;
1905        struct ath_atx_tid *atid;
1906
1907        mutex_lock(&sc->mutex);
1908
1909        switch (action) {
1910        case IEEE80211_AMPDU_RX_START:
1911                break;
1912        case IEEE80211_AMPDU_RX_STOP:
1913                break;
1914        case IEEE80211_AMPDU_TX_START:
1915                if (ath9k_is_chanctx_enabled()) {
1916                        if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1917                                ret = -EBUSY;
1918                                break;
1919                        }
1920                }
1921                ath9k_ps_wakeup(sc);
1922                ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1923                if (!ret)
1924                        ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1925                ath9k_ps_restore(sc);
1926                break;
1927        case IEEE80211_AMPDU_TX_STOP_FLUSH:
1928        case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1929                flush = true;
1930        case IEEE80211_AMPDU_TX_STOP_CONT:
1931                ath9k_ps_wakeup(sc);
1932                ath_tx_aggr_stop(sc, sta, tid);
1933                if (!flush)
1934                        ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1935                ath9k_ps_restore(sc);
1936                break;
1937        case IEEE80211_AMPDU_TX_OPERATIONAL:
1938                atid = ath_node_to_tid(an, tid);
1939                atid->baw_size = IEEE80211_MIN_AMPDU_BUF <<
1940                                sta->ht_cap.ampdu_factor;
1941                break;
1942        default:
1943                ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1944        }
1945
1946        mutex_unlock(&sc->mutex);
1947
1948        return ret;
1949}
1950
1951static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1952                             struct survey_info *survey)
1953{
1954        struct ath_softc *sc = hw->priv;
1955        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1956        struct ieee80211_supported_band *sband;
1957        struct ieee80211_channel *chan;
1958        int pos;
1959
1960        if (IS_ENABLED(CONFIG_ATH9K_TX99))
1961                return -EOPNOTSUPP;
1962
1963        spin_lock_bh(&common->cc_lock);
1964        if (idx == 0)
1965                ath_update_survey_stats(sc);
1966
1967        sband = hw->wiphy->bands[NL80211_BAND_2GHZ];
1968        if (sband && idx >= sband->n_channels) {
1969                idx -= sband->n_channels;
1970                sband = NULL;
1971        }
1972
1973        if (!sband)
1974                sband = hw->wiphy->bands[NL80211_BAND_5GHZ];
1975
1976        if (!sband || idx >= sband->n_channels) {
1977                spin_unlock_bh(&common->cc_lock);
1978                return -ENOENT;
1979        }
1980
1981        chan = &sband->channels[idx];
1982        pos = chan->hw_value;
1983        memcpy(survey, &sc->survey[pos], sizeof(*survey));
1984        survey->channel = chan;
1985        spin_unlock_bh(&common->cc_lock);
1986
1987        return 0;
1988}
1989
1990static void ath9k_enable_dynack(struct ath_softc *sc)
1991{
1992#ifdef CONFIG_ATH9K_DYNACK
1993        u32 rfilt;
1994        struct ath_hw *ah = sc->sc_ah;
1995
1996        ath_dynack_reset(ah);
1997
1998        ah->dynack.enabled = true;
1999        rfilt = ath_calcrxfilter(sc);
2000        ath9k_hw_setrxfilter(ah, rfilt);
2001#endif
2002}
2003
2004static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
2005                                     s16 coverage_class)
2006{
2007        struct ath_softc *sc = hw->priv;
2008        struct ath_hw *ah = sc->sc_ah;
2009
2010        if (IS_ENABLED(CONFIG_ATH9K_TX99))
2011                return;
2012
2013        mutex_lock(&sc->mutex);
2014
2015        if (coverage_class >= 0) {
2016                ah->coverage_class = coverage_class;
2017                if (ah->dynack.enabled) {
2018                        u32 rfilt;
2019
2020                        ah->dynack.enabled = false;
2021                        rfilt = ath_calcrxfilter(sc);
2022                        ath9k_hw_setrxfilter(ah, rfilt);
2023                }
2024                ath9k_ps_wakeup(sc);
2025                ath9k_hw_init_global_settings(ah);
2026                ath9k_ps_restore(sc);
2027        } else if (!ah->dynack.enabled) {
2028                ath9k_enable_dynack(sc);
2029        }
2030
2031        mutex_unlock(&sc->mutex);
2032}
2033
2034static bool ath9k_has_tx_pending(struct ath_softc *sc,
2035                                 bool sw_pending)
2036{
2037        int i, npend = 0;
2038
2039        for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2040                if (!ATH_TXQ_SETUP(sc, i))
2041                        continue;
2042
2043                npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2044                                                 sw_pending);
2045                if (npend)
2046                        break;
2047        }
2048
2049        return !!npend;
2050}
2051
2052static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2053                        u32 queues, bool drop)
2054{
2055        struct ath_softc *sc = hw->priv;
2056        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2057
2058        if (ath9k_is_chanctx_enabled()) {
2059                if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2060                        goto flush;
2061
2062                /*
2063                 * If MCC is active, extend the flush timeout
2064                 * and wait for the HW/SW queues to become
2065                 * empty. This needs to be done outside the
2066                 * sc->mutex lock to allow the channel scheduler
2067                 * to switch channel contexts.
2068                 *
2069                 * The vif queues have been stopped in mac80211,
2070                 * so there won't be any incoming frames.
2071                 */
2072                __ath9k_flush(hw, queues, drop, true, true);
2073                return;
2074        }
2075flush:
2076        mutex_lock(&sc->mutex);
2077        __ath9k_flush(hw, queues, drop, true, false);
2078        mutex_unlock(&sc->mutex);
2079}
2080
2081void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2082                   bool sw_pending, bool timeout_override)
2083{
2084        struct ath_softc *sc = hw->priv;
2085        struct ath_hw *ah = sc->sc_ah;
2086        struct ath_common *common = ath9k_hw_common(ah);
2087        int timeout;
2088        bool drain_txq;
2089
2090        cancel_delayed_work_sync(&sc->hw_check_work);
2091
2092        if (ah->ah_flags & AH_UNPLUGGED) {
2093                ath_dbg(common, ANY, "Device has been unplugged!\n");
2094                return;
2095        }
2096
2097        if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2098                ath_dbg(common, ANY, "Device not present\n");
2099                return;
2100        }
2101
2102        spin_lock_bh(&sc->chan_lock);
2103        if (timeout_override)
2104                timeout = HZ / 5;
2105        else
2106                timeout = sc->cur_chan->flush_timeout;
2107        spin_unlock_bh(&sc->chan_lock);
2108
2109        ath_dbg(common, CHAN_CTX,
2110                "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2111
2112        if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2113                               timeout) > 0)
2114                drop = false;
2115
2116        if (drop) {
2117                ath9k_ps_wakeup(sc);
2118                spin_lock_bh(&sc->sc_pcu_lock);
2119                drain_txq = ath_drain_all_txq(sc);
2120                spin_unlock_bh(&sc->sc_pcu_lock);
2121
2122                if (!drain_txq)
2123                        ath_reset(sc, NULL);
2124
2125                ath9k_ps_restore(sc);
2126        }
2127
2128        ieee80211_queue_delayed_work(hw, &sc->hw_check_work,
2129                                     ATH_HW_CHECK_POLL_INT);
2130}
2131
2132static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2133{
2134        struct ath_softc *sc = hw->priv;
2135
2136        return ath9k_has_tx_pending(sc, true);
2137}
2138
2139static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2140{
2141        struct ath_softc *sc = hw->priv;
2142        struct ath_hw *ah = sc->sc_ah;
2143        struct ieee80211_vif *vif;
2144        struct ath_vif *avp;
2145        struct ath_buf *bf;
2146        struct ath_tx_status ts;
2147        bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2148        int status;
2149
2150        vif = sc->beacon.bslot[0];
2151        if (!vif)
2152                return 0;
2153
2154        if (!vif->bss_conf.enable_beacon)
2155                return 0;
2156
2157        avp = (void *)vif->drv_priv;
2158
2159        if (!sc->beacon.tx_processed && !edma) {
2160                tasklet_disable(&sc->bcon_tasklet);
2161
2162                bf = avp->av_bcbuf;
2163                if (!bf || !bf->bf_mpdu)
2164                        goto skip;
2165
2166                status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2167                if (status == -EINPROGRESS)
2168                        goto skip;
2169
2170                sc->beacon.tx_processed = true;
2171                sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2172
2173skip:
2174                tasklet_enable(&sc->bcon_tasklet);
2175        }
2176
2177        return sc->beacon.tx_last;
2178}
2179
2180static int ath9k_get_stats(struct ieee80211_hw *hw,
2181                           struct ieee80211_low_level_stats *stats)
2182{
2183        struct ath_softc *sc = hw->priv;
2184        struct ath_hw *ah = sc->sc_ah;
2185        struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2186
2187        stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2188        stats->dot11RTSFailureCount = mib_stats->rts_bad;
2189        stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2190        stats->dot11RTSSuccessCount = mib_stats->rts_good;
2191        return 0;
2192}
2193
2194static u32 fill_chainmask(u32 cap, u32 new)
2195{
2196        u32 filled = 0;
2197        int i;
2198
2199        for (i = 0; cap && new; i++, cap >>= 1) {
2200                if (!(cap & BIT(0)))
2201                        continue;
2202
2203                if (new & BIT(0))
2204                        filled |= BIT(i);
2205
2206                new >>= 1;
2207        }
2208
2209        return filled;
2210}
2211
2212static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2213{
2214        if (AR_SREV_9300_20_OR_LATER(ah))
2215                return true;
2216
2217        switch (val & 0x7) {
2218        case 0x1:
2219        case 0x3:
2220        case 0x7:
2221                return true;
2222        case 0x2:
2223                return (ah->caps.rx_chainmask == 1);
2224        default:
2225                return false;
2226        }
2227}
2228
2229static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2230{
2231        struct ath_softc *sc = hw->priv;
2232        struct ath_hw *ah = sc->sc_ah;
2233
2234        if (ah->caps.rx_chainmask != 1)
2235                rx_ant |= tx_ant;
2236
2237        if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2238                return -EINVAL;
2239
2240        sc->ant_rx = rx_ant;
2241        sc->ant_tx = tx_ant;
2242
2243        if (ah->caps.rx_chainmask == 1)
2244                return 0;
2245
2246        /* AR9100 runs into calibration issues if not all rx chains are enabled */
2247        if (AR_SREV_9100(ah))
2248                ah->rxchainmask = 0x7;
2249        else
2250                ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2251
2252        ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2253        ath9k_cmn_reload_chainmask(ah);
2254
2255        return 0;
2256}
2257
2258static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2259{
2260        struct ath_softc *sc = hw->priv;
2261
2262        *tx_ant = sc->ant_tx;
2263        *rx_ant = sc->ant_rx;
2264        return 0;
2265}
2266
2267static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2268                                struct ieee80211_vif *vif,
2269                                const u8 *mac_addr)
2270{
2271        struct ath_softc *sc = hw->priv;
2272        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2273        set_bit(ATH_OP_SCANNING, &common->op_flags);
2274}
2275
2276static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2277                                   struct ieee80211_vif *vif)
2278{
2279        struct ath_softc *sc = hw->priv;
2280        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2281        clear_bit(ATH_OP_SCANNING, &common->op_flags);
2282}
2283
2284#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2285
2286static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2287{
2288        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2289
2290        if (sc->offchannel.roc_vif) {
2291                ath_dbg(common, CHAN_CTX,
2292                        "%s: Aborting RoC\n", __func__);
2293
2294                del_timer_sync(&sc->offchannel.timer);
2295                if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2296                        ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2297        }
2298
2299        if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2300                ath_dbg(common, CHAN_CTX,
2301                        "%s: Aborting HW scan\n", __func__);
2302
2303                del_timer_sync(&sc->offchannel.timer);
2304                ath_scan_complete(sc, true);
2305        }
2306}
2307
2308static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2309                         struct ieee80211_scan_request *hw_req)
2310{
2311        struct cfg80211_scan_request *req = &hw_req->req;
2312        struct ath_softc *sc = hw->priv;
2313        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2314        int ret = 0;
2315
2316        mutex_lock(&sc->mutex);
2317
2318        if (WARN_ON(sc->offchannel.scan_req)) {
2319                ret = -EBUSY;
2320                goto out;
2321        }
2322
2323        ath9k_ps_wakeup(sc);
2324        set_bit(ATH_OP_SCANNING, &common->op_flags);
2325        sc->offchannel.scan_vif = vif;
2326        sc->offchannel.scan_req = req;
2327        sc->offchannel.scan_idx = 0;
2328
2329        ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2330                vif->addr);
2331
2332        if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2333                ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2334                ath_offchannel_next(sc);
2335        }
2336
2337out:
2338        mutex_unlock(&sc->mutex);
2339
2340        return ret;
2341}
2342
2343static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2344                                 struct ieee80211_vif *vif)
2345{
2346        struct ath_softc *sc = hw->priv;
2347        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2348
2349        ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2350
2351        mutex_lock(&sc->mutex);
2352        del_timer_sync(&sc->offchannel.timer);
2353        ath_scan_complete(sc, true);
2354        mutex_unlock(&sc->mutex);
2355}
2356
2357static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2358                                   struct ieee80211_vif *vif,
2359                                   struct ieee80211_channel *chan, int duration,
2360                                   enum ieee80211_roc_type type)
2361{
2362        struct ath_softc *sc = hw->priv;
2363        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2364        int ret = 0;
2365
2366        mutex_lock(&sc->mutex);
2367
2368        if (WARN_ON(sc->offchannel.roc_vif)) {
2369                ret = -EBUSY;
2370                goto out;
2371        }
2372
2373        ath9k_ps_wakeup(sc);
2374        sc->offchannel.roc_vif = vif;
2375        sc->offchannel.roc_chan = chan;
2376        sc->offchannel.roc_duration = duration;
2377
2378        ath_dbg(common, CHAN_CTX,
2379                "RoC request on vif: %pM, type: %d duration: %d\n",
2380                vif->addr, type, duration);
2381
2382        if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2383                ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2384                ath_offchannel_next(sc);
2385        }
2386
2387out:
2388        mutex_unlock(&sc->mutex);
2389
2390        return ret;
2391}
2392
2393static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2394{
2395        struct ath_softc *sc = hw->priv;
2396        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2397
2398        mutex_lock(&sc->mutex);
2399
2400        ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2401        del_timer_sync(&sc->offchannel.timer);
2402
2403        if (sc->offchannel.roc_vif) {
2404                if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2405                        ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2406        }
2407
2408        mutex_unlock(&sc->mutex);
2409
2410        return 0;
2411}
2412
2413static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2414                             struct ieee80211_chanctx_conf *conf)
2415{
2416        struct ath_softc *sc = hw->priv;
2417        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2418        struct ath_chanctx *ctx, **ptr;
2419        int pos;
2420
2421        mutex_lock(&sc->mutex);
2422
2423        ath_for_each_chanctx(sc, ctx) {
2424                if (ctx->assigned)
2425                        continue;
2426
2427                ptr = (void *) conf->drv_priv;
2428                *ptr = ctx;
2429                ctx->assigned = true;
2430                pos = ctx - &sc->chanctx[0];
2431                ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2432
2433                ath_dbg(common, CHAN_CTX,
2434                        "Add channel context: %d MHz\n",
2435                        conf->def.chan->center_freq);
2436
2437                ath_chanctx_set_channel(sc, ctx, &conf->def);
2438
2439                mutex_unlock(&sc->mutex);
2440                return 0;
2441        }
2442
2443        mutex_unlock(&sc->mutex);
2444        return -ENOSPC;
2445}
2446
2447
2448static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2449                                 struct ieee80211_chanctx_conf *conf)
2450{
2451        struct ath_softc *sc = hw->priv;
2452        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2453        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2454
2455        mutex_lock(&sc->mutex);
2456
2457        ath_dbg(common, CHAN_CTX,
2458                "Remove channel context: %d MHz\n",
2459                conf->def.chan->center_freq);
2460
2461        ctx->assigned = false;
2462        ctx->hw_queue_base = 0;
2463        ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2464
2465        mutex_unlock(&sc->mutex);
2466}
2467
2468static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2469                                 struct ieee80211_chanctx_conf *conf,
2470                                 u32 changed)
2471{
2472        struct ath_softc *sc = hw->priv;
2473        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2474        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2475
2476        mutex_lock(&sc->mutex);
2477        ath_dbg(common, CHAN_CTX,
2478                "Change channel context: %d MHz\n",
2479                conf->def.chan->center_freq);
2480        ath_chanctx_set_channel(sc, ctx, &conf->def);
2481        mutex_unlock(&sc->mutex);
2482}
2483
2484static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2485                                    struct ieee80211_vif *vif,
2486                                    struct ieee80211_chanctx_conf *conf)
2487{
2488        struct ath_softc *sc = hw->priv;
2489        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2490        struct ath_vif *avp = (void *)vif->drv_priv;
2491        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2492        int i;
2493
2494        ath9k_cancel_pending_offchannel(sc);
2495
2496        mutex_lock(&sc->mutex);
2497
2498        ath_dbg(common, CHAN_CTX,
2499                "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2500                vif->addr, vif->type, vif->p2p,
2501                conf->def.chan->center_freq);
2502
2503        avp->chanctx = ctx;
2504        ctx->nvifs_assigned++;
2505        list_add_tail(&avp->list, &ctx->vifs);
2506        ath9k_calculate_summary_state(sc, ctx);
2507        for (i = 0; i < IEEE80211_NUM_ACS; i++)
2508                vif->hw_queue[i] = ctx->hw_queue_base + i;
2509
2510        mutex_unlock(&sc->mutex);
2511
2512        return 0;
2513}
2514
2515static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2516                                       struct ieee80211_vif *vif,
2517                                       struct ieee80211_chanctx_conf *conf)
2518{
2519        struct ath_softc *sc = hw->priv;
2520        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2521        struct ath_vif *avp = (void *)vif->drv_priv;
2522        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2523        int ac;
2524
2525        ath9k_cancel_pending_offchannel(sc);
2526
2527        mutex_lock(&sc->mutex);
2528
2529        ath_dbg(common, CHAN_CTX,
2530                "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2531                vif->addr, vif->type, vif->p2p,
2532                conf->def.chan->center_freq);
2533
2534        avp->chanctx = NULL;
2535        ctx->nvifs_assigned--;
2536        list_del(&avp->list);
2537        ath9k_calculate_summary_state(sc, ctx);
2538        for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2539                vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2540
2541        mutex_unlock(&sc->mutex);
2542}
2543
2544static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2545                                 struct ieee80211_vif *vif)
2546{
2547        struct ath_softc *sc = hw->priv;
2548        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2549        struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2550        struct ath_beacon_config *cur_conf;
2551        struct ath_chanctx *go_ctx;
2552        unsigned long timeout;
2553        bool changed = false;
2554        u32 beacon_int;
2555
2556        if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2557                return;
2558
2559        if (!avp->chanctx)
2560                return;
2561
2562        mutex_lock(&sc->mutex);
2563
2564        spin_lock_bh(&sc->chan_lock);
2565        if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2566                changed = true;
2567        spin_unlock_bh(&sc->chan_lock);
2568
2569        if (!changed)
2570                goto out;
2571
2572        ath9k_cancel_pending_offchannel(sc);
2573
2574        go_ctx = ath_is_go_chanctx_present(sc);
2575
2576        if (go_ctx) {
2577                /*
2578                 * Wait till the GO interface gets a chance
2579                 * to send out an NoA.
2580                 */
2581                spin_lock_bh(&sc->chan_lock);
2582                sc->sched.mgd_prepare_tx = true;
2583                cur_conf = &go_ctx->beacon;
2584                beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2585                spin_unlock_bh(&sc->chan_lock);
2586
2587                timeout = usecs_to_jiffies(beacon_int * 2);
2588                init_completion(&sc->go_beacon);
2589
2590                mutex_unlock(&sc->mutex);
2591
2592                if (wait_for_completion_timeout(&sc->go_beacon,
2593                                                timeout) == 0) {
2594                        ath_dbg(common, CHAN_CTX,
2595                                "Failed to send new NoA\n");
2596
2597                        spin_lock_bh(&sc->chan_lock);
2598                        sc->sched.mgd_prepare_tx = false;
2599                        spin_unlock_bh(&sc->chan_lock);
2600                }
2601
2602                mutex_lock(&sc->mutex);
2603        }
2604
2605        ath_dbg(common, CHAN_CTX,
2606                "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2607                __func__, vif->addr);
2608
2609        spin_lock_bh(&sc->chan_lock);
2610        sc->next_chan = avp->chanctx;
2611        sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2612        spin_unlock_bh(&sc->chan_lock);
2613
2614        ath_chanctx_set_next(sc, true);
2615out:
2616        mutex_unlock(&sc->mutex);
2617}
2618
2619void ath9k_fill_chanctx_ops(void)
2620{
2621        if (!ath9k_is_chanctx_enabled())
2622                return;
2623
2624        ath9k_ops.hw_scan                  = ath9k_hw_scan;
2625        ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2626        ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2627        ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2628        ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2629        ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2630        ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2631        ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2632        ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2633        ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2634}
2635
2636#endif
2637
2638static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2639                             int *dbm)
2640{
2641        struct ath_softc *sc = hw->priv;
2642        struct ath_vif *avp = (void *)vif->drv_priv;
2643
2644        mutex_lock(&sc->mutex);
2645        if (avp->chanctx)
2646                *dbm = avp->chanctx->cur_txpower;
2647        else
2648                *dbm = sc->cur_chan->cur_txpower;
2649        mutex_unlock(&sc->mutex);
2650
2651        *dbm /= 2;
2652
2653        return 0;
2654}
2655
2656struct ieee80211_ops ath9k_ops = {
2657        .tx                 = ath9k_tx,
2658        .start              = ath9k_start,
2659        .stop               = ath9k_stop,
2660        .add_interface      = ath9k_add_interface,
2661        .change_interface   = ath9k_change_interface,
2662        .remove_interface   = ath9k_remove_interface,
2663        .config             = ath9k_config,
2664        .configure_filter   = ath9k_configure_filter,
2665        .sta_state          = ath9k_sta_state,
2666        .sta_notify         = ath9k_sta_notify,
2667        .conf_tx            = ath9k_conf_tx,
2668        .bss_info_changed   = ath9k_bss_info_changed,
2669        .set_key            = ath9k_set_key,
2670        .get_tsf            = ath9k_get_tsf,
2671        .set_tsf            = ath9k_set_tsf,
2672        .reset_tsf          = ath9k_reset_tsf,
2673        .ampdu_action       = ath9k_ampdu_action,
2674        .get_survey         = ath9k_get_survey,
2675        .rfkill_poll        = ath9k_rfkill_poll_state,
2676        .set_coverage_class = ath9k_set_coverage_class,
2677        .flush              = ath9k_flush,
2678        .tx_frames_pending  = ath9k_tx_frames_pending,
2679        .tx_last_beacon     = ath9k_tx_last_beacon,
2680        .release_buffered_frames = ath9k_release_buffered_frames,
2681        .get_stats          = ath9k_get_stats,
2682        .set_antenna        = ath9k_set_antenna,
2683        .get_antenna        = ath9k_get_antenna,
2684
2685#ifdef CONFIG_ATH9K_WOW
2686        .suspend            = ath9k_suspend,
2687        .resume             = ath9k_resume,
2688        .set_wakeup         = ath9k_set_wakeup,
2689#endif
2690
2691#ifdef CONFIG_ATH9K_DEBUGFS
2692        .get_et_sset_count  = ath9k_get_et_sset_count,
2693        .get_et_stats       = ath9k_get_et_stats,
2694        .get_et_strings     = ath9k_get_et_strings,
2695#endif
2696
2697#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2698        .sta_add_debugfs    = ath9k_sta_add_debugfs,
2699#endif
2700        .sw_scan_start      = ath9k_sw_scan_start,
2701        .sw_scan_complete   = ath9k_sw_scan_complete,
2702        .get_txpower        = ath9k_get_txpower,
2703        .wake_tx_queue      = ath9k_wake_tx_queue,
2704};
2705