LXR linux/drivers/net/wireless/mediatek/mt7601u/eeprom.h

   1/*
   2 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
   3 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License version 2
   7 * as published by the Free Software Foundation
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 */
  14
  15#ifndef __MT7601U_EEPROM_H
  16#define __MT7601U_EEPROM_H
  17
  18struct mt7601u_dev;
  19
  20#define MT7601U_EE_MAX_VER                      0x0c
  21#define MT7601U_EEPROM_SIZE                     256
  22
  23#define MT7601U_DEFAULT_TX_POWER                6
  24
  25enum mt76_eeprom_field {
  26        MT_EE_CHIP_ID =                         0x00,
  27        MT_EE_VERSION_FAE =                     0x02,
  28        MT_EE_VERSION_EE =                      0x03,
  29        MT_EE_MAC_ADDR =                        0x04,
  30        MT_EE_NIC_CONF_0 =                      0x34,
  31        MT_EE_NIC_CONF_1 =                      0x36,
  32        MT_EE_COUNTRY_REGION =                  0x39,
  33        MT_EE_FREQ_OFFSET =                     0x3a,
  34        MT_EE_NIC_CONF_2 =                      0x42,
  35
  36        MT_EE_LNA_GAIN =                        0x44,
  37        MT_EE_RSSI_OFFSET =                     0x46,
  38
  39        MT_EE_TX_POWER_DELTA_BW40 =             0x50,
  40        MT_EE_TX_POWER_OFFSET =                 0x52,
  41
  42        MT_EE_TX_TSSI_SLOPE =                   0x6e,
  43        MT_EE_TX_TSSI_OFFSET_GROUP =            0x6f,
  44        MT_EE_TX_TSSI_OFFSET =                  0x76,
  45
  46        MT_EE_TX_TSSI_TARGET_POWER =            0xd0,
  47        MT_EE_REF_TEMP =                        0xd1,
  48        MT_EE_FREQ_OFFSET_COMPENSATION =        0xdb,
  49        MT_EE_TX_POWER_BYRATE_BASE =            0xde,
  50
  51        MT_EE_USAGE_MAP_START =                 0x1e0,
  52        MT_EE_USAGE_MAP_END =                   0x1fc,
  53};
  54
  55#define MT_EE_NIC_CONF_0_RX_PATH                GENMASK(3, 0)
  56#define MT_EE_NIC_CONF_0_TX_PATH                GENMASK(7, 4)
  57#define MT_EE_NIC_CONF_0_BOARD_TYPE             GENMASK(13, 12)
  58
  59#define MT_EE_NIC_CONF_1_HW_RF_CTRL             BIT(0)
  60#define MT_EE_NIC_CONF_1_TEMP_TX_ALC            BIT(1)
  61#define MT_EE_NIC_CONF_1_LNA_EXT_2G             BIT(2)
  62#define MT_EE_NIC_CONF_1_LNA_EXT_5G             BIT(3)
  63#define MT_EE_NIC_CONF_1_TX_ALC_EN              BIT(13)
  64
  65#define MT_EE_NIC_CONF_2_RX_STREAM              GENMASK(3, 0)
  66#define MT_EE_NIC_CONF_2_TX_STREAM              GENMASK(7, 4)
  67#define MT_EE_NIC_CONF_2_HW_ANTDIV              BIT(8)
  68#define MT_EE_NIC_CONF_2_XTAL_OPTION            GENMASK(10, 9)
  69#define MT_EE_NIC_CONF_2_TEMP_DISABLE           BIT(11)
  70#define MT_EE_NIC_CONF_2_COEX_METHOD            GENMASK(15, 13)
  71
  72#define MT_EE_TX_POWER_BYRATE(i)                (MT_EE_TX_POWER_BYRATE_BASE + \
  73                                                 (i) * 4)
  74
  75#define MT_EFUSE_USAGE_MAP_SIZE                 (MT_EE_USAGE_MAP_END -  \
  76                                                 MT_EE_USAGE_MAP_START + 1)
  77
  78enum mt7601u_eeprom_access_modes {
  79        MT_EE_READ = 0,
  80        MT_EE_PHYSICAL_READ = 1,
  81};
  82
  83struct power_per_rate  {
  84        u8 raw;  /* validated s6 value */
  85        s8 bw20; /* sign-extended int */
  86        s8 bw40; /* sign-extended int */
  87};
  88
  89/* Power per rate - one value per two rates */
  90struct mt7601u_rate_power {
  91        struct power_per_rate cck[2];
  92        struct power_per_rate ofdm[4];
  93        struct power_per_rate ht[4];
  94};
  95
  96struct reg_channel_bounds {
  97        u8 start;
  98        u8 num;
  99};
 100
 101struct mt7601u_eeprom_params {
 102        bool tssi_enabled;
 103        u8 rf_freq_off;
 104        s8 rssi_offset[2];
 105        s8 ref_temp;
 106        s8 lna_gain;
 107
 108        u8 chan_pwr[14];
 109        struct mt7601u_rate_power power_rate_table;
 110        s8 real_cck_bw20[2];
 111
 112        /* TSSI stuff - only with internal TX ALC */
 113        struct tssi_data {
 114                int tx0_delta_offset;
 115                u8 slope;
 116                u8 offset[3];
 117        } tssi_data;
 118
 119        struct reg_channel_bounds reg;
 120};
 121
 122int mt7601u_eeprom_init(struct mt7601u_dev *dev);
 123
 124static inline u32 s6_validate(u32 reg)
 125{
 126        WARN_ON(reg & ~GENMASK(5, 0));
 127        return reg & GENMASK(5, 0);
 128}
 129
 130static inline int s6_to_int(u32 reg)
 131{
 132        int s6;
 133
 134        s6 = s6_validate(reg);
 135        if (s6 & BIT(5))
 136                s6 -= BIT(6);
 137
 138        return s6;
 139}
 140
 141static inline u32 int_to_s6(int val)
 142{
 143        if (val < -0x20)
 144                return 0x20;
 145        if (val > 0x1f)
 146                return 0x1f;
 147
 148        return val & 0x3f;
 149}
 150
 151#endif
 152