1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26#include "../wifi.h"
27#include "../pci.h"
28#include "../usb.h"
29#include "../ps.h"
30#include "../cam.h"
31#include "../stats.h"
32#include "reg.h"
33#include "def.h"
34#include "phy.h"
35#include "rf.h"
36#include "dm.h"
37#include "mac.h"
38#include "trx.h"
39#include "../rtl8192c/fw_common.h"
40
41#include <linux/module.h>
42
43
44
45#define LINK_Q ui_link_quality
46#define RX_EVM rx_evm_percentage
47#define RX_SIGQ rx_mimo_sig_qual
48
49
50void rtl92c_read_chip_version(struct ieee80211_hw *hw)
51{
52 struct rtl_priv *rtlpriv = rtl_priv(hw);
53 struct rtl_phy *rtlphy = &(rtlpriv->phy);
54 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
55 enum version_8192c chip_version = VERSION_UNKNOWN;
56 const char *versionid;
57 u32 value32;
58
59 value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
60 if (value32 & TRP_VAUX_EN) {
61 chip_version = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C :
62 VERSION_TEST_CHIP_88C;
63 } else {
64
65 chip_version = NORMAL_CHIP;
66 chip_version |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
67 chip_version |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
68 if (IS_VENDOR_UMC(chip_version))
69 chip_version |= ((value32 & CHIP_VER_RTL_MASK) ?
70 CHIP_VENDOR_UMC_B_CUT : 0);
71 if (IS_92C_SERIAL(chip_version)) {
72 value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM);
73 chip_version |= ((CHIP_BONDING_IDENTIFIER(value32) ==
74 CHIP_BONDING_92C_1T2R) ? CHIP_92C_1T2R : 0);
75 }
76 }
77 rtlhal->version = (enum version_8192c)chip_version;
78 pr_info("Chip version 0x%x\n", chip_version);
79 switch (rtlhal->version) {
80 case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
81 versionid = "NORMAL_B_CHIP_92C";
82 break;
83 case VERSION_NORMAL_TSMC_CHIP_92C:
84 versionid = "NORMAL_TSMC_CHIP_92C";
85 break;
86 case VERSION_NORMAL_TSMC_CHIP_88C:
87 versionid = "NORMAL_TSMC_CHIP_88C";
88 break;
89 case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
90 versionid = "NORMAL_UMC_CHIP_i92C_1T2R_A_CUT";
91 break;
92 case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
93 versionid = "NORMAL_UMC_CHIP_92C_A_CUT";
94 break;
95 case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
96 versionid = "NORMAL_UMC_CHIP_88C_A_CUT";
97 break;
98 case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
99 versionid = "NORMAL_UMC_CHIP_92C_1T2R_B_CUT";
100 break;
101 case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
102 versionid = "NORMAL_UMC_CHIP_92C_B_CUT";
103 break;
104 case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
105 versionid = "NORMAL_UMC_CHIP_88C_B_CUT";
106 break;
107 case VERSION_TEST_CHIP_92C:
108 versionid = "TEST_CHIP_92C";
109 break;
110 case VERSION_TEST_CHIP_88C:
111 versionid = "TEST_CHIP_88C";
112 break;
113 default:
114 versionid = "UNKNOWN";
115 break;
116 }
117 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
118 "Chip Version ID: %s\n", versionid);
119
120 if (IS_92C_SERIAL(rtlhal->version))
121 rtlphy->rf_type =
122 (IS_92C_1T2R(rtlhal->version)) ? RF_1T2R : RF_2T2R;
123 else
124 rtlphy->rf_type = RF_1T1R;
125 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
126 "Chip RF Type: %s\n",
127 rtlphy->rf_type == RF_2T2R ? "RF_2T2R" : "RF_1T1R");
128 if (get_rf_type(rtlphy) == RF_1T1R)
129 rtlpriv->dm.rfpath_rxenable[0] = true;
130 else
131 rtlpriv->dm.rfpath_rxenable[0] =
132 rtlpriv->dm.rfpath_rxenable[1] = true;
133 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n",
134 rtlhal->version);
135}
136
137
138
139
140
141
142
143
144
145
146bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
147{
148 struct rtl_priv *rtlpriv = rtl_priv(hw);
149 bool status = true;
150 long count = 0;
151 u32 value = _LLT_INIT_ADDR(address) |
152 _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
153
154 rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
155 do {
156 value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
157 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
158 break;
159 if (count > POLLING_LLT_THRESHOLD) {
160 pr_err("Failed to polling write LLT done at address %d! _LLT_OP_VALUE(%x)\n",
161 address, _LLT_OP_VALUE(value));
162 status = false;
163 break;
164 }
165 } while (++count);
166 return status;
167}
168
169
170
171
172
173
174
175
176bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
177{
178 bool rst = true;
179 u32 i;
180
181 for (i = 0; i < (boundary - 1); i++) {
182 rst = rtl92c_llt_write(hw, i , i + 1);
183 if (true != rst) {
184 pr_err("===> %s #1 fail\n", __func__);
185 return rst;
186 }
187 }
188
189 rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
190 if (true != rst) {
191 pr_err("===> %s #2 fail\n", __func__);
192 return rst;
193 }
194
195
196
197
198
199 for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
200 rst = rtl92c_llt_write(hw, i, (i + 1));
201 if (true != rst) {
202 pr_err("===> %s #3 fail\n", __func__);
203 return rst;
204 }
205 }
206
207 rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
208 if (true != rst) {
209 pr_err("===> %s #4 fail\n", __func__);
210 return rst;
211 }
212 return rst;
213}
214void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
215 u8 *p_macaddr, bool is_group, u8 enc_algo,
216 bool is_wepkey, bool clear_all)
217{
218 struct rtl_priv *rtlpriv = rtl_priv(hw);
219 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
220 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
221 u8 *macaddr = p_macaddr;
222 u32 entry_id = 0;
223 bool is_pairwise = false;
224 static u8 cam_const_addr[4][6] = {
225 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
226 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
227 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
228 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
229 };
230 static u8 cam_const_broad[] = {
231 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
232 };
233
234 if (clear_all) {
235 u8 idx = 0;
236 u8 cam_offset = 0;
237 u8 clear_number = 5;
238
239 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
240 for (idx = 0; idx < clear_number; idx++) {
241 rtl_cam_mark_invalid(hw, cam_offset + idx);
242 rtl_cam_empty_entry(hw, cam_offset + idx);
243 if (idx < 5) {
244 memset(rtlpriv->sec.key_buf[idx], 0,
245 MAX_KEY_LEN);
246 rtlpriv->sec.key_len[idx] = 0;
247 }
248 }
249 } else {
250 switch (enc_algo) {
251 case WEP40_ENCRYPTION:
252 enc_algo = CAM_WEP40;
253 break;
254 case WEP104_ENCRYPTION:
255 enc_algo = CAM_WEP104;
256 break;
257 case TKIP_ENCRYPTION:
258 enc_algo = CAM_TKIP;
259 break;
260 case AESCCMP_ENCRYPTION:
261 enc_algo = CAM_AES;
262 break;
263 default:
264 pr_err("illegal switch case\n");
265 enc_algo = CAM_TKIP;
266 break;
267 }
268 if (is_wepkey || rtlpriv->sec.use_defaultkey) {
269 macaddr = cam_const_addr[key_index];
270 entry_id = key_index;
271 } else {
272 if (is_group) {
273 macaddr = cam_const_broad;
274 entry_id = key_index;
275 } else {
276 if (mac->opmode == NL80211_IFTYPE_AP ||
277 mac->opmode == NL80211_IFTYPE_MESH_POINT) {
278 entry_id = rtl_cam_get_free_entry(hw,
279 p_macaddr);
280 if (entry_id >= TOTAL_CAM_ENTRY) {
281 pr_err("Can not find free hw security cam entry\n");
282 return;
283 }
284 } else {
285 entry_id = CAM_PAIRWISE_KEY_POSITION;
286 }
287
288 key_index = PAIRWISE_KEYIDX;
289 is_pairwise = true;
290 }
291 }
292 if (rtlpriv->sec.key_len[key_index] == 0) {
293 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
294 "delete one entry\n");
295 if (mac->opmode == NL80211_IFTYPE_AP ||
296 mac->opmode == NL80211_IFTYPE_MESH_POINT)
297 rtl_cam_del_entry(hw, p_macaddr);
298 rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
299 } else {
300 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
301 "The insert KEY length is %d\n",
302 rtlpriv->sec.key_len[PAIRWISE_KEYIDX]);
303 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
304 "The insert KEY is %x %x\n",
305 rtlpriv->sec.key_buf[0][0],
306 rtlpriv->sec.key_buf[0][1]);
307 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
308 "add one entry\n");
309 if (is_pairwise) {
310 RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
311 "Pairwise Key content",
312 rtlpriv->sec.pairwise_key,
313 rtlpriv->sec.
314 key_len[PAIRWISE_KEYIDX]);
315 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
316 "set Pairwise key\n");
317
318 rtl_cam_add_one_entry(hw, macaddr, key_index,
319 entry_id, enc_algo,
320 CAM_CONFIG_NO_USEDK,
321 rtlpriv->sec.
322 key_buf[key_index]);
323 } else {
324 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
325 "set group key\n");
326 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
327 rtl_cam_add_one_entry(hw,
328 rtlefuse->dev_addr,
329 PAIRWISE_KEYIDX,
330 CAM_PAIRWISE_KEY_POSITION,
331 enc_algo,
332 CAM_CONFIG_NO_USEDK,
333 rtlpriv->sec.key_buf
334 [entry_id]);
335 }
336 rtl_cam_add_one_entry(hw, macaddr, key_index,
337 entry_id, enc_algo,
338 CAM_CONFIG_NO_USEDK,
339 rtlpriv->sec.key_buf[entry_id]);
340 }
341 }
342 }
343}
344
345u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw)
346{
347 struct rtl_priv *rtlpriv = rtl_priv(hw);
348
349 return rtl_read_dword(rtlpriv, REG_TXDMA_STATUS);
350}
351
352void rtl92c_enable_interrupt(struct ieee80211_hw *hw)
353{
354 struct rtl_priv *rtlpriv = rtl_priv(hw);
355 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
356 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
357 struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
358
359 if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
360 rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
361 0xFFFFFFFF);
362 rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
363 0xFFFFFFFF);
364 } else {
365 rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
366 0xFFFFFFFF);
367 rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
368 0xFFFFFFFF);
369 }
370}
371
372void rtl92c_init_interrupt(struct ieee80211_hw *hw)
373{
374 rtl92c_enable_interrupt(hw);
375}
376
377void rtl92c_disable_interrupt(struct ieee80211_hw *hw)
378{
379 struct rtl_priv *rtlpriv = rtl_priv(hw);
380
381 rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
382 rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
383}
384
385void rtl92c_set_qos(struct ieee80211_hw *hw, int aci)
386{
387 struct rtl_priv *rtlpriv = rtl_priv(hw);
388
389 rtl92c_dm_init_edca_turbo(hw);
390 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM, (u8 *)&aci);
391}
392
393void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size)
394{
395 struct rtl_priv *rtlpriv = rtl_priv(hw);
396 rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, size);
397}
398
399int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
400{
401 u8 value;
402 struct rtl_priv *rtlpriv = rtl_priv(hw);
403
404 switch (type) {
405 case NL80211_IFTYPE_UNSPECIFIED:
406 value = NT_NO_LINK;
407 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
408 "Set Network type to NO LINK!\n");
409 break;
410 case NL80211_IFTYPE_ADHOC:
411 value = NT_LINK_AD_HOC;
412 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
413 "Set Network type to Ad Hoc!\n");
414 break;
415 case NL80211_IFTYPE_STATION:
416 value = NT_LINK_AP;
417 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
418 "Set Network type to STA!\n");
419 break;
420 case NL80211_IFTYPE_AP:
421 value = NT_AS_AP;
422 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
423 "Set Network type to AP!\n");
424 break;
425 default:
426 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
427 "Network type %d not supported!\n", type);
428 return -EOPNOTSUPP;
429 }
430 rtl_write_byte(rtlpriv, MSR, value);
431 return 0;
432}
433
434void rtl92c_init_network_type(struct ieee80211_hw *hw)
435{
436 rtl92c_set_network_type(hw, NL80211_IFTYPE_UNSPECIFIED);
437}
438
439void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw)
440{
441 u16 value16;
442 u32 value32;
443 struct rtl_priv *rtlpriv = rtl_priv(hw);
444
445
446 value32 = rtl_read_dword(rtlpriv, REG_RRSR);
447 value32 &= ~RATE_BITMAP_ALL;
448 value32 |= RATE_RRSR_CCK_ONLY_1M;
449 rtl_write_dword(rtlpriv, REG_RRSR, value32);
450
451 value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
452 rtl_write_word(rtlpriv, REG_SPEC_SIFS, value16);
453
454 value16 = _LRL(0x30) | _SRL(0x30);
455 rtl_write_dword(rtlpriv, REG_RL, value16);
456}
457
458void rtl92c_init_rate_fallback(struct ieee80211_hw *hw)
459{
460 struct rtl_priv *rtlpriv = rtl_priv(hw);
461
462
463 rtl_write_dword(rtlpriv, REG_DARFRC, 0x00000000);
464 rtl_write_dword(rtlpriv, REG_DARFRC+4, 0x10080404);
465 rtl_write_dword(rtlpriv, REG_RARFRC, 0x04030201);
466 rtl_write_dword(rtlpriv, REG_RARFRC+4, 0x08070605);
467}
468
469static void rtl92c_set_cck_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
470 u8 ctx_sifs)
471{
472 struct rtl_priv *rtlpriv = rtl_priv(hw);
473
474 rtl_write_byte(rtlpriv, REG_SIFS_CCK, trx_sifs);
475 rtl_write_byte(rtlpriv, (REG_SIFS_CCK + 1), ctx_sifs);
476}
477
478static void rtl92c_set_ofdm_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
479 u8 ctx_sifs)
480{
481 struct rtl_priv *rtlpriv = rtl_priv(hw);
482
483 rtl_write_byte(rtlpriv, REG_SIFS_OFDM, trx_sifs);
484 rtl_write_byte(rtlpriv, (REG_SIFS_OFDM + 1), ctx_sifs);
485}
486
487void rtl92c_init_edca_param(struct ieee80211_hw *hw,
488 u16 queue, u16 txop, u8 cw_min, u8 cw_max, u8 aifs)
489{
490
491
492
493 u32 value;
494 struct rtl_priv *rtlpriv = rtl_priv(hw);
495
496 value = (u32)aifs;
497 value |= ((u32)cw_min & 0xF) << 8;
498 value |= ((u32)cw_max & 0xF) << 12;
499 value |= (u32)txop << 16;
500
501 rtl_write_dword(rtlpriv, (REG_EDCA_VO_PARAM + (queue * 4)), value);
502}
503
504void rtl92c_init_edca(struct ieee80211_hw *hw)
505{
506 u16 value16;
507 struct rtl_priv *rtlpriv = rtl_priv(hw);
508
509
510 value16 = rtl_read_word(rtlpriv, REG_RD_CTRL);
511 value16 |= DIS_EDCA_CNT_DWN;
512 rtl_write_word(rtlpriv, REG_RD_CTRL, value16);
513
514
515 rtl92c_set_cck_sifs(hw, 0xa, 0xa);
516 rtl92c_set_ofdm_sifs(hw, 0xe, 0xe);
517
518 rtl_write_word(rtlpriv, REG_SIFS_CCK, 0x0a0a);
519 rtl_write_word(rtlpriv, REG_SIFS_OFDM, 0x1010);
520 rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0204);
521 rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x014004);
522
523 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, 0x005EA42B);
524 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0x0000A44F);
525 rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x005EA324);
526 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x002FA226);
527
528 rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
529
530 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
531 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040);
532 rtl_write_byte(rtlpriv, REG_BCNDMATIM, 0x02);
533 rtl_write_byte(rtlpriv, REG_ATIMWND, 0x02);
534}
535
536void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw)
537{
538 struct rtl_priv *rtlpriv = rtl_priv(hw);
539
540 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x99997631);
541 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
542
543 rtl_write_word(rtlpriv, 0x4CA, 0x0708);
544}
545
546void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw)
547{
548 struct rtl_priv *rtlpriv = rtl_priv(hw);
549
550 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
551}
552
553void rtl92c_init_rdg_setting(struct ieee80211_hw *hw)
554{
555 struct rtl_priv *rtlpriv = rtl_priv(hw);
556
557 rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xFF);
558 rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200);
559 rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05);
560}
561
562void rtl92c_init_retry_function(struct ieee80211_hw *hw)
563{
564 u8 value8;
565 struct rtl_priv *rtlpriv = rtl_priv(hw);
566
567 value8 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL);
568 value8 |= EN_AMPDU_RTY_NEW;
569 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL, value8);
570
571 rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
572}
573
574void rtl92c_disable_fast_edca(struct ieee80211_hw *hw)
575{
576 struct rtl_priv *rtlpriv = rtl_priv(hw);
577
578 rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0);
579}
580
581void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T)
582{
583 struct rtl_priv *rtlpriv = rtl_priv(hw);
584 u8 value = is2T ? MAX_MSS_DENSITY_2T : MAX_MSS_DENSITY_1T;
585
586 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, value);
587}
588
589
590
591static u8 _rtl92c_query_rxpwrpercentage(s8 antpower)
592{
593 if ((antpower <= -100) || (antpower >= 20))
594 return 0;
595 else if (antpower >= 0)
596 return 100;
597 else
598 return 100 + antpower;
599}
600
601static u8 _rtl92c_evm_db_to_percentage(s8 value)
602{
603 s8 ret_val;
604
605 ret_val = value;
606 if (ret_val >= 0)
607 ret_val = 0;
608 if (ret_val <= -33)
609 ret_val = -33;
610 ret_val = 0 - ret_val;
611 ret_val *= 3;
612 if (ret_val == 99)
613 ret_val = 100;
614 return ret_val;
615}
616
617static long _rtl92c_signal_scale_mapping(struct ieee80211_hw *hw,
618 long currsig)
619{
620 long retsig;
621
622 if (currsig >= 61 && currsig <= 100)
623 retsig = 90 + ((currsig - 60) / 4);
624 else if (currsig >= 41 && currsig <= 60)
625 retsig = 78 + ((currsig - 40) / 2);
626 else if (currsig >= 31 && currsig <= 40)
627 retsig = 66 + (currsig - 30);
628 else if (currsig >= 21 && currsig <= 30)
629 retsig = 54 + (currsig - 20);
630 else if (currsig >= 5 && currsig <= 20)
631 retsig = 42 + (((currsig - 5) * 2) / 3);
632 else if (currsig == 4)
633 retsig = 36;
634 else if (currsig == 3)
635 retsig = 27;
636 else if (currsig == 2)
637 retsig = 18;
638 else if (currsig == 1)
639 retsig = 9;
640 else
641 retsig = currsig;
642 return retsig;
643}
644
645static void _rtl92c_query_rxphystatus(struct ieee80211_hw *hw,
646 struct rtl_stats *pstats,
647 struct rx_desc_92c *p_desc,
648 struct rx_fwinfo_92c *p_drvinfo,
649 bool packet_match_bssid,
650 bool packet_toself,
651 bool packet_beacon)
652{
653 struct rtl_priv *rtlpriv = rtl_priv(hw);
654 struct rtl_phy *rtlphy = &(rtlpriv->phy);
655 struct phy_sts_cck_8192s_t *cck_buf;
656 s8 rx_pwr_all = 0, rx_pwr[4];
657 u8 rf_rx_num = 0, evm, pwdb_all;
658 u8 i, max_spatial_stream;
659 u32 rssi, total_rssi = 0;
660 bool in_powersavemode = false;
661 bool is_cck_rate;
662 u8 *pdesc = (u8 *)p_desc;
663
664 is_cck_rate = RX_HAL_IS_CCK_RATE(p_desc->rxmcs);
665 pstats->packet_matchbssid = packet_match_bssid;
666 pstats->packet_toself = packet_toself;
667 pstats->packet_beacon = packet_beacon;
668 pstats->is_cck = is_cck_rate;
669 pstats->RX_SIGQ[0] = -1;
670 pstats->RX_SIGQ[1] = -1;
671 if (is_cck_rate) {
672 u8 report, cck_highpwr;
673 cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
674 if (!in_powersavemode)
675 cck_highpwr = rtlphy->cck_high_power;
676 else
677 cck_highpwr = false;
678 if (!cck_highpwr) {
679 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
680 report = cck_buf->cck_agc_rpt & 0xc0;
681 report = report >> 6;
682 switch (report) {
683 case 0x3:
684 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
685 break;
686 case 0x2:
687 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
688 break;
689 case 0x1:
690 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
691 break;
692 case 0x0:
693 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
694 break;
695 }
696 } else {
697 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
698 report = p_drvinfo->cfosho[0] & 0x60;
699 report = report >> 5;
700 switch (report) {
701 case 0x3:
702 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
703 break;
704 case 0x2:
705 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
706 break;
707 case 0x1:
708 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
709 break;
710 case 0x0:
711 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
712 break;
713 }
714 }
715 pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
716 pstats->rx_pwdb_all = pwdb_all;
717 pstats->recvsignalpower = rx_pwr_all;
718 if (packet_match_bssid) {
719 u8 sq;
720 if (pstats->rx_pwdb_all > 40)
721 sq = 100;
722 else {
723 sq = cck_buf->sq_rpt;
724 if (sq > 64)
725 sq = 0;
726 else if (sq < 20)
727 sq = 100;
728 else
729 sq = ((64 - sq) * 100) / 44;
730 }
731 pstats->signalquality = sq;
732 pstats->RX_SIGQ[0] = sq;
733 pstats->RX_SIGQ[1] = -1;
734 }
735 } else {
736 rtlpriv->dm.rfpath_rxenable[0] =
737 rtlpriv->dm.rfpath_rxenable[1] = true;
738 for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
739 if (rtlpriv->dm.rfpath_rxenable[i])
740 rf_rx_num++;
741 rx_pwr[i] =
742 ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
743 rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
744 total_rssi += rssi;
745 rtlpriv->stats.rx_snr_db[i] =
746 (long)(p_drvinfo->rxsnr[i] / 2);
747
748 if (packet_match_bssid)
749 pstats->rx_mimo_signalstrength[i] = (u8) rssi;
750 }
751 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
752 pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
753 pstats->rx_pwdb_all = pwdb_all;
754 pstats->rxpower = rx_pwr_all;
755 pstats->recvsignalpower = rx_pwr_all;
756 if (GET_RX_DESC_RX_MCS(pdesc) &&
757 GET_RX_DESC_RX_MCS(pdesc) >= DESC_RATEMCS8 &&
758 GET_RX_DESC_RX_MCS(pdesc) <= DESC_RATEMCS15)
759 max_spatial_stream = 2;
760 else
761 max_spatial_stream = 1;
762 for (i = 0; i < max_spatial_stream; i++) {
763 evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
764 if (packet_match_bssid) {
765 if (i == 0)
766 pstats->signalquality =
767 (u8) (evm & 0xff);
768 pstats->RX_SIGQ[i] =
769 (u8) (evm & 0xff);
770 }
771 }
772 }
773 if (is_cck_rate)
774 pstats->signalstrength =
775 (u8) (_rtl92c_signal_scale_mapping(hw, pwdb_all));
776 else if (rf_rx_num != 0)
777 pstats->signalstrength =
778 (u8) (_rtl92c_signal_scale_mapping
779 (hw, total_rssi /= rf_rx_num));
780}
781
782void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
783 struct sk_buff *skb,
784 struct rtl_stats *pstats,
785 struct rx_desc_92c *pdesc,
786 struct rx_fwinfo_92c *p_drvinfo)
787{
788 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
789 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
790 struct ieee80211_hdr *hdr;
791 u8 *tmp_buf;
792 u8 *praddr;
793 __le16 fc;
794 u16 type, cpu_fc;
795 bool packet_matchbssid, packet_toself, packet_beacon = false;
796
797 tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
798 hdr = (struct ieee80211_hdr *)tmp_buf;
799 fc = hdr->frame_control;
800 cpu_fc = le16_to_cpu(fc);
801 type = WLAN_FC_GET_TYPE(fc);
802 praddr = hdr->addr1;
803 packet_matchbssid =
804 ((IEEE80211_FTYPE_CTL != type) &&
805 ether_addr_equal(mac->bssid,
806 (cpu_fc & IEEE80211_FCTL_TODS) ? hdr->addr1 :
807 (cpu_fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 :
808 hdr->addr3) &&
809 (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
810
811 packet_toself = packet_matchbssid &&
812 ether_addr_equal(praddr, rtlefuse->dev_addr);
813 if (ieee80211_is_beacon(fc))
814 packet_beacon = true;
815 _rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
816 packet_matchbssid, packet_toself,
817 packet_beacon);
818 rtl_process_phyinfo(hw, tmp_buf, pstats);
819}
820
