linux/drivers/pci/dwc/pci-keystone.c
<<
>>
Prefs
   1/*
   2 * PCIe host controller driver for Texas Instruments Keystone SoCs
   3 *
   4 * Copyright (C) 2013-2014 Texas Instruments., Ltd.
   5 *              http://www.ti.com
   6 *
   7 * Author: Murali Karicheri <m-karicheri2@ti.com>
   8 * Implementation based on pci-exynos.c and pcie-designware.c
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License version 2 as
  12 * published by the Free Software Foundation.
  13 */
  14
  15#include <linux/irqchip/chained_irq.h>
  16#include <linux/clk.h>
  17#include <linux/delay.h>
  18#include <linux/interrupt.h>
  19#include <linux/irqdomain.h>
  20#include <linux/init.h>
  21#include <linux/msi.h>
  22#include <linux/of_irq.h>
  23#include <linux/of.h>
  24#include <linux/of_pci.h>
  25#include <linux/platform_device.h>
  26#include <linux/phy/phy.h>
  27#include <linux/resource.h>
  28#include <linux/signal.h>
  29
  30#include "pcie-designware.h"
  31#include "pci-keystone.h"
  32
  33#define DRIVER_NAME     "keystone-pcie"
  34
  35/* driver specific constants */
  36#define MAX_MSI_HOST_IRQS               8
  37#define MAX_LEGACY_HOST_IRQS            4
  38
  39/* DEV_STAT_CTRL */
  40#define PCIE_CAP_BASE           0x70
  41
  42/* PCIE controller device IDs */
  43#define PCIE_RC_K2HK            0xb008
  44#define PCIE_RC_K2E             0xb009
  45#define PCIE_RC_K2L             0xb00a
  46
  47#define to_keystone_pcie(x)     dev_get_drvdata((x)->dev)
  48
  49static void quirk_limit_mrrs(struct pci_dev *dev)
  50{
  51        struct pci_bus *bus = dev->bus;
  52        struct pci_dev *bridge = bus->self;
  53        static const struct pci_device_id rc_pci_devids[] = {
  54                { PCI_DEVICE(PCI_VENDOR_ID_TI, PCIE_RC_K2HK),
  55                 .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
  56                { PCI_DEVICE(PCI_VENDOR_ID_TI, PCIE_RC_K2E),
  57                 .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
  58                { PCI_DEVICE(PCI_VENDOR_ID_TI, PCIE_RC_K2L),
  59                 .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
  60                { 0, },
  61        };
  62
  63        if (pci_is_root_bus(bus))
  64                return;
  65
  66        /* look for the host bridge */
  67        while (!pci_is_root_bus(bus)) {
  68                bridge = bus->self;
  69                bus = bus->parent;
  70        }
  71
  72        if (bridge) {
  73                /*
  74                 * Keystone PCI controller has a h/w limitation of
  75                 * 256 bytes maximum read request size.  It can't handle
  76                 * anything higher than this.  So force this limit on
  77                 * all downstream devices.
  78                 */
  79                if (pci_match_id(rc_pci_devids, bridge)) {
  80                        if (pcie_get_readrq(dev) > 256) {
  81                                dev_info(&dev->dev, "limiting MRRS to 256\n");
  82                                pcie_set_readrq(dev, 256);
  83                        }
  84                }
  85        }
  86}
  87DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, quirk_limit_mrrs);
  88
  89static int ks_pcie_establish_link(struct keystone_pcie *ks_pcie)
  90{
  91        struct dw_pcie *pci = ks_pcie->pci;
  92        struct pcie_port *pp = &pci->pp;
  93        struct device *dev = pci->dev;
  94        unsigned int retries;
  95
  96        dw_pcie_setup_rc(pp);
  97
  98        if (dw_pcie_link_up(pci)) {
  99                dev_err(dev, "Link already up\n");
 100                return 0;
 101        }
 102
 103        /* check if the link is up or not */
 104        for (retries = 0; retries < 5; retries++) {
 105                ks_dw_pcie_initiate_link_train(ks_pcie);
 106                if (!dw_pcie_wait_for_link(pci))
 107                        return 0;
 108        }
 109
 110        dev_err(dev, "phy link never came up\n");
 111        return -ETIMEDOUT;
 112}
 113
 114static void ks_pcie_msi_irq_handler(struct irq_desc *desc)
 115{
 116        unsigned int irq = irq_desc_get_irq(desc);
 117        struct keystone_pcie *ks_pcie = irq_desc_get_handler_data(desc);
 118        u32 offset = irq - ks_pcie->msi_host_irqs[0];
 119        struct dw_pcie *pci = ks_pcie->pci;
 120        struct device *dev = pci->dev;
 121        struct irq_chip *chip = irq_desc_get_chip(desc);
 122
 123        dev_dbg(dev, "%s, irq %d\n", __func__, irq);
 124
 125        /*
 126         * The chained irq handler installation would have replaced normal
 127         * interrupt driver handler so we need to take care of mask/unmask and
 128         * ack operation.
 129         */
 130        chained_irq_enter(chip, desc);
 131        ks_dw_pcie_handle_msi_irq(ks_pcie, offset);
 132        chained_irq_exit(chip, desc);
 133}
 134
 135/**
 136 * ks_pcie_legacy_irq_handler() - Handle legacy interrupt
 137 * @irq: IRQ line for legacy interrupts
 138 * @desc: Pointer to irq descriptor
 139 *
 140 * Traverse through pending legacy interrupts and invoke handler for each. Also
 141 * takes care of interrupt controller level mask/ack operation.
 142 */
 143static void ks_pcie_legacy_irq_handler(struct irq_desc *desc)
 144{
 145        unsigned int irq = irq_desc_get_irq(desc);
 146        struct keystone_pcie *ks_pcie = irq_desc_get_handler_data(desc);
 147        struct dw_pcie *pci = ks_pcie->pci;
 148        struct device *dev = pci->dev;
 149        u32 irq_offset = irq - ks_pcie->legacy_host_irqs[0];
 150        struct irq_chip *chip = irq_desc_get_chip(desc);
 151
 152        dev_dbg(dev, ": Handling legacy irq %d\n", irq);
 153
 154        /*
 155         * The chained irq handler installation would have replaced normal
 156         * interrupt driver handler so we need to take care of mask/unmask and
 157         * ack operation.
 158         */
 159        chained_irq_enter(chip, desc);
 160        ks_dw_pcie_handle_legacy_irq(ks_pcie, irq_offset);
 161        chained_irq_exit(chip, desc);
 162}
 163
 164static int ks_pcie_get_irq_controller_info(struct keystone_pcie *ks_pcie,
 165                                           char *controller, int *num_irqs)
 166{
 167        int temp, max_host_irqs, legacy = 1, *host_irqs;
 168        struct device *dev = ks_pcie->pci->dev;
 169        struct device_node *np_pcie = dev->of_node, **np_temp;
 170
 171        if (!strcmp(controller, "msi-interrupt-controller"))
 172                legacy = 0;
 173
 174        if (legacy) {
 175                np_temp = &ks_pcie->legacy_intc_np;
 176                max_host_irqs = MAX_LEGACY_HOST_IRQS;
 177                host_irqs = &ks_pcie->legacy_host_irqs[0];
 178        } else {
 179                np_temp = &ks_pcie->msi_intc_np;
 180                max_host_irqs = MAX_MSI_HOST_IRQS;
 181                host_irqs =  &ks_pcie->msi_host_irqs[0];
 182        }
 183
 184        /* interrupt controller is in a child node */
 185        *np_temp = of_find_node_by_name(np_pcie, controller);
 186        if (!(*np_temp)) {
 187                dev_err(dev, "Node for %s is absent\n", controller);
 188                return -EINVAL;
 189        }
 190
 191        temp = of_irq_count(*np_temp);
 192        if (!temp) {
 193                dev_err(dev, "No IRQ entries in %s\n", controller);
 194                return -EINVAL;
 195        }
 196
 197        if (temp > max_host_irqs)
 198                dev_warn(dev, "Too many %s interrupts defined %u\n",
 199                        (legacy ? "legacy" : "MSI"), temp);
 200
 201        /*
 202         * support upto max_host_irqs. In dt from index 0 to 3 (legacy) or 0 to
 203         * 7 (MSI)
 204         */
 205        for (temp = 0; temp < max_host_irqs; temp++) {
 206                host_irqs[temp] = irq_of_parse_and_map(*np_temp, temp);
 207                if (!host_irqs[temp])
 208                        break;
 209        }
 210
 211        if (temp) {
 212                *num_irqs = temp;
 213                return 0;
 214        }
 215
 216        return -EINVAL;
 217}
 218
 219static void ks_pcie_setup_interrupts(struct keystone_pcie *ks_pcie)
 220{
 221        int i;
 222
 223        /* Legacy IRQ */
 224        for (i = 0; i < ks_pcie->num_legacy_host_irqs; i++) {
 225                irq_set_chained_handler_and_data(ks_pcie->legacy_host_irqs[i],
 226                                                 ks_pcie_legacy_irq_handler,
 227                                                 ks_pcie);
 228        }
 229        ks_dw_pcie_enable_legacy_irqs(ks_pcie);
 230
 231        /* MSI IRQ */
 232        if (IS_ENABLED(CONFIG_PCI_MSI)) {
 233                for (i = 0; i < ks_pcie->num_msi_host_irqs; i++) {
 234                        irq_set_chained_handler_and_data(ks_pcie->msi_host_irqs[i],
 235                                                         ks_pcie_msi_irq_handler,
 236                                                         ks_pcie);
 237                }
 238        }
 239
 240        if (ks_pcie->error_irq > 0)
 241                ks_dw_pcie_enable_error_irq(ks_pcie);
 242}
 243
 244/*
 245 * When a PCI device does not exist during config cycles, keystone host gets a
 246 * bus error instead of returning 0xffffffff. This handler always returns 0
 247 * for this kind of faults.
 248 */
 249static int keystone_pcie_fault(unsigned long addr, unsigned int fsr,
 250                                struct pt_regs *regs)
 251{
 252        unsigned long instr = *(unsigned long *) instruction_pointer(regs);
 253
 254        if ((instr & 0x0e100090) == 0x00100090) {
 255                int reg = (instr >> 12) & 15;
 256
 257                regs->uregs[reg] = -1;
 258                regs->ARM_pc += 4;
 259        }
 260
 261        return 0;
 262}
 263
 264static void __init ks_pcie_host_init(struct pcie_port *pp)
 265{
 266        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
 267        struct keystone_pcie *ks_pcie = to_keystone_pcie(pci);
 268        u32 val;
 269
 270        ks_pcie_establish_link(ks_pcie);
 271        ks_dw_pcie_setup_rc_app_regs(ks_pcie);
 272        ks_pcie_setup_interrupts(ks_pcie);
 273        writew(PCI_IO_RANGE_TYPE_32 | (PCI_IO_RANGE_TYPE_32 << 8),
 274                        pci->dbi_base + PCI_IO_BASE);
 275
 276        /* update the Vendor ID */
 277        writew(ks_pcie->device_id, pci->dbi_base + PCI_DEVICE_ID);
 278
 279        /* update the DEV_STAT_CTRL to publish right mrrs */
 280        val = readl(pci->dbi_base + PCIE_CAP_BASE + PCI_EXP_DEVCTL);
 281        val &= ~PCI_EXP_DEVCTL_READRQ;
 282        /* set the mrrs to 256 bytes */
 283        val |= BIT(12);
 284        writel(val, pci->dbi_base + PCIE_CAP_BASE + PCI_EXP_DEVCTL);
 285
 286        /*
 287         * PCIe access errors that result into OCP errors are caught by ARM as
 288         * "External aborts"
 289         */
 290        hook_fault_code(17, keystone_pcie_fault, SIGBUS, 0,
 291                        "Asynchronous external abort");
 292}
 293
 294static const struct dw_pcie_host_ops keystone_pcie_host_ops = {
 295        .rd_other_conf = ks_dw_pcie_rd_other_conf,
 296        .wr_other_conf = ks_dw_pcie_wr_other_conf,
 297        .host_init = ks_pcie_host_init,
 298        .msi_set_irq = ks_dw_pcie_msi_set_irq,
 299        .msi_clear_irq = ks_dw_pcie_msi_clear_irq,
 300        .get_msi_addr = ks_dw_pcie_get_msi_addr,
 301        .msi_host_init = ks_dw_pcie_msi_host_init,
 302        .scan_bus = ks_dw_pcie_v3_65_scan_bus,
 303};
 304
 305static irqreturn_t pcie_err_irq_handler(int irq, void *priv)
 306{
 307        struct keystone_pcie *ks_pcie = priv;
 308
 309        return ks_dw_pcie_handle_error_irq(ks_pcie);
 310}
 311
 312static int __init ks_add_pcie_port(struct keystone_pcie *ks_pcie,
 313                         struct platform_device *pdev)
 314{
 315        struct dw_pcie *pci = ks_pcie->pci;
 316        struct pcie_port *pp = &pci->pp;
 317        struct device *dev = &pdev->dev;
 318        int ret;
 319
 320        ret = ks_pcie_get_irq_controller_info(ks_pcie,
 321                                        "legacy-interrupt-controller",
 322                                        &ks_pcie->num_legacy_host_irqs);
 323        if (ret)
 324                return ret;
 325
 326        if (IS_ENABLED(CONFIG_PCI_MSI)) {
 327                ret = ks_pcie_get_irq_controller_info(ks_pcie,
 328                                                "msi-interrupt-controller",
 329                                                &ks_pcie->num_msi_host_irqs);
 330                if (ret)
 331                        return ret;
 332        }
 333
 334        /*
 335         * Index 0 is the platform interrupt for error interrupt
 336         * from RC.  This is optional.
 337         */
 338        ks_pcie->error_irq = irq_of_parse_and_map(ks_pcie->np, 0);
 339        if (ks_pcie->error_irq <= 0)
 340                dev_info(dev, "no error IRQ defined\n");
 341        else {
 342                ret = request_irq(ks_pcie->error_irq, pcie_err_irq_handler,
 343                                  IRQF_SHARED, "pcie-error-irq", ks_pcie);
 344                if (ret < 0) {
 345                        dev_err(dev, "failed to request error IRQ %d\n",
 346                                ks_pcie->error_irq);
 347                        return ret;
 348                }
 349        }
 350
 351        pp->root_bus_nr = -1;
 352        pp->ops = &keystone_pcie_host_ops;
 353        ret = ks_dw_pcie_host_init(ks_pcie, ks_pcie->msi_intc_np);
 354        if (ret) {
 355                dev_err(dev, "failed to initialize host\n");
 356                return ret;
 357        }
 358
 359        return 0;
 360}
 361
 362static const struct of_device_id ks_pcie_of_match[] = {
 363        {
 364                .type = "pci",
 365                .compatible = "ti,keystone-pcie",
 366        },
 367        { },
 368};
 369
 370static const struct dw_pcie_ops dw_pcie_ops = {
 371        .link_up = ks_dw_pcie_link_up,
 372};
 373
 374static int __exit ks_pcie_remove(struct platform_device *pdev)
 375{
 376        struct keystone_pcie *ks_pcie = platform_get_drvdata(pdev);
 377
 378        clk_disable_unprepare(ks_pcie->clk);
 379
 380        return 0;
 381}
 382
 383static int __init ks_pcie_probe(struct platform_device *pdev)
 384{
 385        struct device *dev = &pdev->dev;
 386        struct dw_pcie *pci;
 387        struct keystone_pcie *ks_pcie;
 388        struct resource *res;
 389        void __iomem *reg_p;
 390        struct phy *phy;
 391        int ret;
 392
 393        ks_pcie = devm_kzalloc(dev, sizeof(*ks_pcie), GFP_KERNEL);
 394        if (!ks_pcie)
 395                return -ENOMEM;
 396
 397        pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
 398        if (!pci)
 399                return -ENOMEM;
 400
 401        pci->dev = dev;
 402        pci->ops = &dw_pcie_ops;
 403
 404        ks_pcie->pci = pci;
 405
 406        /* initialize SerDes Phy if present */
 407        phy = devm_phy_get(dev, "pcie-phy");
 408        if (PTR_ERR_OR_ZERO(phy) == -EPROBE_DEFER)
 409                return PTR_ERR(phy);
 410
 411        if (!IS_ERR_OR_NULL(phy)) {
 412                ret = phy_init(phy);
 413                if (ret < 0)
 414                        return ret;
 415        }
 416
 417        /* index 2 is to read PCI DEVICE_ID */
 418        res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
 419        reg_p = devm_ioremap_resource(dev, res);
 420        if (IS_ERR(reg_p))
 421                return PTR_ERR(reg_p);
 422        ks_pcie->device_id = readl(reg_p) >> 16;
 423        devm_iounmap(dev, reg_p);
 424        devm_release_mem_region(dev, res->start, resource_size(res));
 425
 426        ks_pcie->np = dev->of_node;
 427        platform_set_drvdata(pdev, ks_pcie);
 428        ks_pcie->clk = devm_clk_get(dev, "pcie");
 429        if (IS_ERR(ks_pcie->clk)) {
 430                dev_err(dev, "Failed to get pcie rc clock\n");
 431                return PTR_ERR(ks_pcie->clk);
 432        }
 433        ret = clk_prepare_enable(ks_pcie->clk);
 434        if (ret)
 435                return ret;
 436
 437        platform_set_drvdata(pdev, ks_pcie);
 438
 439        ret = ks_add_pcie_port(ks_pcie, pdev);
 440        if (ret < 0)
 441                goto fail_clk;
 442
 443        return 0;
 444fail_clk:
 445        clk_disable_unprepare(ks_pcie->clk);
 446
 447        return ret;
 448}
 449
 450static struct platform_driver ks_pcie_driver __refdata = {
 451        .probe  = ks_pcie_probe,
 452        .remove = __exit_p(ks_pcie_remove),
 453        .driver = {
 454                .name   = "keystone-pcie",
 455                .of_match_table = of_match_ptr(ks_pcie_of_match),
 456        },
 457};
 458builtin_platform_driver(ks_pcie_driver);
 459