1
2
3
4
5
6
7
8#ifndef __QETH_CORE_MPC_H__
9#define __QETH_CORE_MPC_H__
10
11#include <asm/qeth.h>
12
13#define IPA_PDU_HEADER_SIZE 0x40
14#define QETH_IPA_PDU_LEN_TOTAL(buffer) (buffer + 0x0e)
15#define QETH_IPA_PDU_LEN_PDU1(buffer) (buffer + 0x26)
16#define QETH_IPA_PDU_LEN_PDU2(buffer) (buffer + 0x29)
17#define QETH_IPA_PDU_LEN_PDU3(buffer) (buffer + 0x3a)
18
19extern unsigned char IPA_PDU_HEADER[];
20#define QETH_IPA_CMD_DEST_ADDR(buffer) (buffer + 0x2c)
21
22#define IPA_CMD_LENGTH (IPA_PDU_HEADER_SIZE + sizeof(struct qeth_ipa_cmd))
23
24#define QETH_SEQ_NO_LENGTH 4
25#define QETH_MPC_TOKEN_LENGTH 4
26#define QETH_MCL_LENGTH 4
27#define OSA_ADDR_LEN 6
28
29#define QETH_TIMEOUT (10 * HZ)
30#define QETH_IPA_TIMEOUT (45 * HZ)
31#define QETH_IDX_COMMAND_SEQNO 0xffff0000
32
33#define QETH_CLEAR_CHANNEL_PARM -10
34#define QETH_HALT_CHANNEL_PARM -11
35#define QETH_RCD_PARM -12
36
37
38
39
40#define IPA_CMD_INITIATOR_HOST 0x00
41#define IPA_CMD_INITIATOR_OSA 0x01
42#define IPA_CMD_INITIATOR_HOST_REPLY 0x80
43#define IPA_CMD_INITIATOR_OSA_REPLY 0x81
44#define IPA_CMD_PRIM_VERSION_NO 0x01
45
46enum qeth_card_types {
47 QETH_CARD_TYPE_UNKNOWN = 0,
48 QETH_CARD_TYPE_OSD = 1,
49 QETH_CARD_TYPE_IQD = 5,
50 QETH_CARD_TYPE_OSN = 6,
51 QETH_CARD_TYPE_OSM = 3,
52 QETH_CARD_TYPE_OSX = 2,
53};
54
55#define QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE 0x18
56
57enum qeth_link_types {
58 QETH_LINK_TYPE_FAST_ETH = 0x01,
59 QETH_LINK_TYPE_HSTR = 0x02,
60 QETH_LINK_TYPE_GBIT_ETH = 0x03,
61 QETH_LINK_TYPE_OSN = 0x04,
62 QETH_LINK_TYPE_10GBIT_ETH = 0x10,
63 QETH_LINK_TYPE_LANE_ETH100 = 0x81,
64 QETH_LINK_TYPE_LANE_TR = 0x82,
65 QETH_LINK_TYPE_LANE_ETH1000 = 0x83,
66 QETH_LINK_TYPE_LANE = 0x88,
67};
68
69
70
71
72#define RESET_ROUTING_FLAG 0x10
73enum qeth_routing_types {
74
75 NO_ROUTER = 0,
76 PRIMARY_ROUTER = 1,
77 SECONDARY_ROUTER = 2,
78 MULTICAST_ROUTER = 3,
79 PRIMARY_CONNECTOR = 4,
80 SECONDARY_CONNECTOR = 5,
81};
82
83
84enum qeth_ipa_cmds {
85 IPA_CMD_STARTLAN = 0x01,
86 IPA_CMD_STOPLAN = 0x02,
87 IPA_CMD_SETVMAC = 0x21,
88 IPA_CMD_DELVMAC = 0x22,
89 IPA_CMD_SETGMAC = 0x23,
90 IPA_CMD_DELGMAC = 0x24,
91 IPA_CMD_SETVLAN = 0x25,
92 IPA_CMD_DELVLAN = 0x26,
93 IPA_CMD_SETBRIDGEPORT_OSA = 0x2b,
94 IPA_CMD_SETCCID = 0x41,
95 IPA_CMD_DELCCID = 0x42,
96 IPA_CMD_MODCCID = 0x43,
97 IPA_CMD_SETIP = 0xb1,
98 IPA_CMD_QIPASSIST = 0xb2,
99 IPA_CMD_SETASSPARMS = 0xb3,
100 IPA_CMD_SETIPM = 0xb4,
101 IPA_CMD_DELIPM = 0xb5,
102 IPA_CMD_SETRTG = 0xb6,
103 IPA_CMD_DELIP = 0xb7,
104 IPA_CMD_SETADAPTERPARMS = 0xb8,
105 IPA_CMD_SET_DIAG_ASS = 0xb9,
106 IPA_CMD_SETBRIDGEPORT_IQD = 0xbe,
107 IPA_CMD_CREATE_ADDR = 0xc3,
108 IPA_CMD_DESTROY_ADDR = 0xc4,
109 IPA_CMD_REGISTER_LOCAL_ADDR = 0xd1,
110 IPA_CMD_UNREGISTER_LOCAL_ADDR = 0xd2,
111 IPA_CMD_ADDRESS_CHANGE_NOTIF = 0xd3,
112 IPA_CMD_UNKNOWN = 0x00
113};
114
115enum qeth_ip_ass_cmds {
116 IPA_CMD_ASS_START = 0x0001,
117 IPA_CMD_ASS_STOP = 0x0002,
118 IPA_CMD_ASS_CONFIGURE = 0x0003,
119 IPA_CMD_ASS_ENABLE = 0x0004,
120};
121
122enum qeth_arp_process_subcmds {
123 IPA_CMD_ASS_ARP_SET_NO_ENTRIES = 0x0003,
124 IPA_CMD_ASS_ARP_QUERY_CACHE = 0x0004,
125 IPA_CMD_ASS_ARP_ADD_ENTRY = 0x0005,
126 IPA_CMD_ASS_ARP_REMOVE_ENTRY = 0x0006,
127 IPA_CMD_ASS_ARP_FLUSH_CACHE = 0x0007,
128 IPA_CMD_ASS_ARP_QUERY_INFO = 0x0104,
129 IPA_CMD_ASS_ARP_QUERY_STATS = 0x0204,
130};
131
132
133
134
135
136enum qeth_ipa_return_codes {
137 IPA_RC_SUCCESS = 0x0000,
138 IPA_RC_NOTSUPP = 0x0001,
139 IPA_RC_IP_TABLE_FULL = 0x0002,
140 IPA_RC_UNKNOWN_ERROR = 0x0003,
141 IPA_RC_UNSUPPORTED_COMMAND = 0x0004,
142 IPA_RC_TRACE_ALREADY_ACTIVE = 0x0005,
143 IPA_RC_INVALID_FORMAT = 0x0006,
144 IPA_RC_DUP_IPV6_REMOTE = 0x0008,
145 IPA_RC_SBP_IQD_NOT_CONFIGURED = 0x000C,
146 IPA_RC_DUP_IPV6_HOME = 0x0010,
147 IPA_RC_UNREGISTERED_ADDR = 0x0011,
148 IPA_RC_NO_ID_AVAILABLE = 0x0012,
149 IPA_RC_ID_NOT_FOUND = 0x0013,
150 IPA_RC_SBP_IQD_ANO_DEV_PRIMARY = 0x0014,
151 IPA_RC_SBP_IQD_CURRENT_SECOND = 0x0018,
152 IPA_RC_SBP_IQD_LIMIT_SECOND = 0x001C,
153 IPA_RC_INVALID_IP_VERSION = 0x0020,
154 IPA_RC_SBP_IQD_CURRENT_PRIMARY = 0x0024,
155 IPA_RC_LAN_FRAME_MISMATCH = 0x0040,
156 IPA_RC_SBP_IQD_NO_QDIO_QUEUES = 0x00EB,
157 IPA_RC_L2_UNSUPPORTED_CMD = 0x2003,
158 IPA_RC_L2_DUP_MAC = 0x2005,
159 IPA_RC_L2_ADDR_TABLE_FULL = 0x2006,
160 IPA_RC_L2_DUP_LAYER3_MAC = 0x200a,
161 IPA_RC_L2_GMAC_NOT_FOUND = 0x200b,
162 IPA_RC_L2_MAC_NOT_AUTH_BY_HYP = 0x200c,
163 IPA_RC_L2_MAC_NOT_AUTH_BY_ADP = 0x200d,
164 IPA_RC_L2_MAC_NOT_FOUND = 0x2010,
165 IPA_RC_L2_INVALID_VLAN_ID = 0x2015,
166 IPA_RC_L2_DUP_VLAN_ID = 0x2016,
167 IPA_RC_L2_VLAN_ID_NOT_FOUND = 0x2017,
168 IPA_RC_SBP_OSA_NOT_CONFIGURED = 0x2B0C,
169 IPA_RC_SBP_OSA_OS_MISMATCH = 0x2B10,
170 IPA_RC_SBP_OSA_ANO_DEV_PRIMARY = 0x2B14,
171 IPA_RC_SBP_OSA_CURRENT_SECOND = 0x2B18,
172 IPA_RC_SBP_OSA_LIMIT_SECOND = 0x2B1C,
173 IPA_RC_SBP_OSA_NOT_AUTHD_BY_ZMAN = 0x2B20,
174 IPA_RC_SBP_OSA_CURRENT_PRIMARY = 0x2B24,
175 IPA_RC_SBP_OSA_NO_QDIO_QUEUES = 0x2BEB,
176 IPA_RC_DATA_MISMATCH = 0xe001,
177 IPA_RC_INVALID_MTU_SIZE = 0xe002,
178 IPA_RC_INVALID_LANTYPE = 0xe003,
179 IPA_RC_INVALID_LANNUM = 0xe004,
180 IPA_RC_DUPLICATE_IP_ADDRESS = 0xe005,
181 IPA_RC_IP_ADDR_TABLE_FULL = 0xe006,
182 IPA_RC_LAN_PORT_STATE_ERROR = 0xe007,
183 IPA_RC_SETIP_NO_STARTLAN = 0xe008,
184 IPA_RC_SETIP_ALREADY_RECEIVED = 0xe009,
185 IPA_RC_IP_ADDR_ALREADY_USED = 0xe00a,
186 IPA_RC_MC_ADDR_NOT_FOUND = 0xe00b,
187 IPA_RC_SETIP_INVALID_VERSION = 0xe00d,
188 IPA_RC_UNSUPPORTED_SUBCMD = 0xe00e,
189 IPA_RC_ARP_ASSIST_NO_ENABLE = 0xe00f,
190 IPA_RC_PRIMARY_ALREADY_DEFINED = 0xe010,
191 IPA_RC_SECOND_ALREADY_DEFINED = 0xe011,
192 IPA_RC_INVALID_SETRTG_INDICATOR = 0xe012,
193 IPA_RC_MC_ADDR_ALREADY_DEFINED = 0xe013,
194 IPA_RC_LAN_OFFLINE = 0xe080,
195 IPA_RC_VEPA_TO_VEB_TRANSITION = 0xe090,
196 IPA_RC_INVALID_IP_VERSION2 = 0xf001,
197 IPA_RC_ENOMEM = 0xfffe,
198 IPA_RC_FFFF = 0xffff
199};
200
201#define IPA_RC_INVALID_SUBCMD IPA_RC_IP_TABLE_FULL
202#define IPA_RC_HARDWARE_AUTH_ERROR IPA_RC_UNKNOWN_ERROR
203
204
205#define IPA_RC_SBP_IQD_OS_MISMATCH IPA_RC_DUP_IPV6_HOME
206#define IPA_RC_SBP_IQD_NOT_AUTHD_BY_ZMAN IPA_RC_INVALID_IP_VERSION
207
208
209enum qeth_ipa_funcs {
210 IPA_ARP_PROCESSING = 0x00000001L,
211 IPA_INBOUND_CHECKSUM = 0x00000002L,
212 IPA_OUTBOUND_CHECKSUM = 0x00000004L,
213
214 IPA_FILTERING = 0x00000010L,
215 IPA_IPV6 = 0x00000020L,
216 IPA_MULTICASTING = 0x00000040L,
217 IPA_IP_REASSEMBLY = 0x00000080L,
218 IPA_QUERY_ARP_COUNTERS = 0x00000100L,
219 IPA_QUERY_ARP_ADDR_INFO = 0x00000200L,
220 IPA_SETADAPTERPARMS = 0x00000400L,
221 IPA_VLAN_PRIO = 0x00000800L,
222 IPA_PASSTHRU = 0x00001000L,
223 IPA_FLUSH_ARP_SUPPORT = 0x00002000L,
224 IPA_FULL_VLAN = 0x00004000L,
225 IPA_INBOUND_PASSTHRU = 0x00008000L,
226 IPA_SOURCE_MAC = 0x00010000L,
227 IPA_OSA_MC_ROUTER = 0x00020000L,
228 IPA_QUERY_ARP_ASSIST = 0x00040000L,
229 IPA_INBOUND_TSO = 0x00080000L,
230 IPA_OUTBOUND_TSO = 0x00100000L,
231};
232
233
234enum qeth_ipa_setdelip_flags {
235 QETH_IPA_SETDELIP_DEFAULT = 0x00L,
236 QETH_IPA_SETIP_VIPA_FLAG = 0x01L,
237 QETH_IPA_SETIP_TAKEOVER_FLAG = 0x02L,
238 QETH_IPA_DELIP_ADDR_2_B_TAKEN_OVER = 0x20L,
239 QETH_IPA_DELIP_VIPA_FLAG = 0x40L,
240 QETH_IPA_DELIP_ADDR_NEEDS_SETIP = 0x80L,
241};
242
243
244enum qeth_ipa_setadp_cmd {
245 IPA_SETADP_QUERY_COMMANDS_SUPPORTED = 0x00000001L,
246 IPA_SETADP_ALTER_MAC_ADDRESS = 0x00000002L,
247 IPA_SETADP_ADD_DELETE_GROUP_ADDRESS = 0x00000004L,
248 IPA_SETADP_ADD_DELETE_FUNCTIONAL_ADDR = 0x00000008L,
249 IPA_SETADP_SET_ADDRESSING_MODE = 0x00000010L,
250 IPA_SETADP_SET_CONFIG_PARMS = 0x00000020L,
251 IPA_SETADP_SET_CONFIG_PARMS_EXTENDED = 0x00000040L,
252 IPA_SETADP_SET_BROADCAST_MODE = 0x00000080L,
253 IPA_SETADP_SEND_OSA_MESSAGE = 0x00000100L,
254 IPA_SETADP_SET_SNMP_CONTROL = 0x00000200L,
255 IPA_SETADP_QUERY_CARD_INFO = 0x00000400L,
256 IPA_SETADP_SET_PROMISC_MODE = 0x00000800L,
257 IPA_SETADP_SET_DIAG_ASSIST = 0x00002000L,
258 IPA_SETADP_SET_ACCESS_CONTROL = 0x00010000L,
259 IPA_SETADP_QUERY_OAT = 0x00080000L,
260 IPA_SETADP_QUERY_SWITCH_ATTRIBUTES = 0x00100000L,
261};
262enum qeth_ipa_mac_ops {
263 CHANGE_ADDR_READ_MAC = 0,
264 CHANGE_ADDR_REPLACE_MAC = 1,
265 CHANGE_ADDR_ADD_MAC = 2,
266 CHANGE_ADDR_DEL_MAC = 4,
267 CHANGE_ADDR_RESET_MAC = 8,
268};
269enum qeth_ipa_addr_ops {
270 CHANGE_ADDR_READ_ADDR = 0,
271 CHANGE_ADDR_ADD_ADDR = 1,
272 CHANGE_ADDR_DEL_ADDR = 2,
273 CHANGE_ADDR_FLUSH_ADDR_TABLE = 4,
274};
275enum qeth_ipa_promisc_modes {
276 SET_PROMISC_MODE_OFF = 0,
277 SET_PROMISC_MODE_ON = 1,
278};
279enum qeth_ipa_isolation_modes {
280 ISOLATION_MODE_NONE = 0x00000000L,
281 ISOLATION_MODE_FWD = 0x00000001L,
282 ISOLATION_MODE_DROP = 0x00000002L,
283};
284enum qeth_ipa_set_access_mode_rc {
285 SET_ACCESS_CTRL_RC_SUCCESS = 0x0000,
286 SET_ACCESS_CTRL_RC_NOT_SUPPORTED = 0x0004,
287 SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED = 0x0008,
288 SET_ACCESS_CTRL_RC_ALREADY_ISOLATED = 0x0010,
289 SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER = 0x0014,
290 SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF = 0x0018,
291 SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED = 0x0022,
292 SET_ACCESS_CTRL_RC_REFLREL_FAILED = 0x0024,
293 SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED = 0x0028,
294};
295enum qeth_card_info_card_type {
296 CARD_INFO_TYPE_1G_COPPER_A = 0x61,
297 CARD_INFO_TYPE_1G_FIBRE_A = 0x71,
298 CARD_INFO_TYPE_10G_FIBRE_A = 0x91,
299 CARD_INFO_TYPE_1G_COPPER_B = 0xb1,
300 CARD_INFO_TYPE_1G_FIBRE_B = 0xa1,
301 CARD_INFO_TYPE_10G_FIBRE_B = 0xc1,
302};
303enum qeth_card_info_port_mode {
304 CARD_INFO_PORTM_HALFDUPLEX = 0x0002,
305 CARD_INFO_PORTM_FULLDUPLEX = 0x0003,
306};
307enum qeth_card_info_port_speed {
308 CARD_INFO_PORTS_10M = 0x00000005,
309 CARD_INFO_PORTS_100M = 0x00000006,
310 CARD_INFO_PORTS_1G = 0x00000007,
311 CARD_INFO_PORTS_10G = 0x00000008,
312};
313
314
315struct qeth_ipacmd_setdelip4 {
316 __u8 ip_addr[4];
317 __u8 mask[4];
318 __u32 flags;
319} __attribute__ ((packed));
320
321struct qeth_ipacmd_setdelip6 {
322 __u8 ip_addr[16];
323 __u8 mask[16];
324 __u32 flags;
325} __attribute__ ((packed));
326
327struct qeth_ipacmd_setdelipm {
328 __u8 mac[6];
329 __u8 padding[2];
330 __u8 ip6[12];
331 __u8 ip4[4];
332} __attribute__ ((packed));
333
334struct qeth_ipacmd_layer2setdelmac {
335 __u32 mac_length;
336 __u8 mac[6];
337} __attribute__ ((packed));
338
339struct qeth_ipacmd_layer2setdelvlan {
340 __u16 vlan_id;
341} __attribute__ ((packed));
342
343
344struct qeth_ipacmd_setassparms_hdr {
345 __u32 assist_no;
346 __u16 length;
347 __u16 command_code;
348 __u16 return_code;
349 __u8 number_of_replies;
350 __u8 seq_no;
351} __attribute__((packed));
352
353struct qeth_arp_query_data {
354 __u16 request_bits;
355 __u16 reply_bits;
356 __u32 no_entries;
357 char data;
358} __attribute__((packed));
359
360
361struct qeth_arp_query_info {
362 __u32 udata_len;
363 __u16 mask_bits;
364 __u32 udata_offset;
365 __u32 no_entries;
366 char *udata;
367};
368
369
370
371
372enum qeth_ipa_checksum_bits {
373 QETH_IPA_CHECKSUM_IP_HDR = 0x0002,
374 QETH_IPA_CHECKSUM_UDP = 0x0008,
375 QETH_IPA_CHECKSUM_TCP = 0x0010,
376 QETH_IPA_CHECKSUM_LP2LP = 0x0020
377};
378
379
380struct qeth_checksum_cmd {
381 __u32 supported;
382 __u32 enabled;
383} __packed;
384
385
386struct qeth_ipacmd_setassparms {
387 struct qeth_ipacmd_setassparms_hdr hdr;
388 union {
389 __u32 flags_32bit;
390 struct qeth_checksum_cmd chksum;
391 struct qeth_arp_cache_entry add_arp_entry;
392 struct qeth_arp_query_data query_arp;
393 __u8 ip[16];
394 } data;
395} __attribute__ ((packed));
396
397
398
399struct qeth_set_routing {
400 __u8 type;
401};
402
403
404struct qeth_query_cmds_supp {
405 __u32 no_lantypes_supp;
406 __u8 lan_type;
407 __u8 reserved1[3];
408 __u32 supported_cmds;
409 __u8 reserved2[8];
410} __attribute__ ((packed));
411
412struct qeth_change_addr {
413 __u32 cmd;
414 __u32 addr_size;
415 __u32 no_macs;
416 __u8 addr[OSA_ADDR_LEN];
417} __attribute__ ((packed));
418
419
420struct qeth_snmp_cmd {
421 __u8 token[16];
422 __u32 request;
423 __u32 interface;
424 __u32 returncode;
425 __u32 firmwarelevel;
426 __u32 seqno;
427 __u8 data;
428} __attribute__ ((packed));
429
430struct qeth_snmp_ureq_hdr {
431 __u32 data_len;
432 __u32 req_len;
433 __u32 reserved1;
434 __u32 reserved2;
435} __attribute__ ((packed));
436
437struct qeth_snmp_ureq {
438 struct qeth_snmp_ureq_hdr hdr;
439 struct qeth_snmp_cmd cmd;
440} __attribute__((packed));
441
442
443struct qeth_set_access_ctrl {
444 __u32 subcmd_code;
445 __u8 reserved[8];
446} __attribute__((packed));
447
448struct qeth_query_oat {
449 __u32 subcmd_code;
450 __u8 reserved[12];
451} __packed;
452
453struct qeth_qoat_priv {
454 __u32 buffer_len;
455 __u32 response_len;
456 char *buffer;
457};
458
459struct qeth_query_card_info {
460 __u8 card_type;
461 __u8 reserved1;
462 __u16 port_mode;
463 __u32 port_speed;
464 __u32 reserved2;
465};
466
467#define QETH_SWITCH_FORW_802_1 0x00000001
468#define QETH_SWITCH_FORW_REFL_RELAY 0x00000002
469#define QETH_SWITCH_CAP_RTE 0x00000004
470#define QETH_SWITCH_CAP_ECP 0x00000008
471#define QETH_SWITCH_CAP_VDP 0x00000010
472
473struct qeth_query_switch_attributes {
474 __u8 version;
475 __u8 reserved1;
476 __u16 reserved2;
477 __u32 capabilities;
478 __u32 settings;
479 __u8 reserved3[8];
480};
481
482struct qeth_ipacmd_setadpparms_hdr {
483 __u32 supp_hw_cmds;
484 __u32 reserved1;
485 __u16 cmdlength;
486 __u16 reserved2;
487 __u32 command_code;
488 __u16 return_code;
489 __u8 used_total;
490 __u8 seq_no;
491 __u32 reserved3;
492} __attribute__ ((packed));
493
494struct qeth_ipacmd_setadpparms {
495 struct qeth_ipacmd_setadpparms_hdr hdr;
496 union {
497 struct qeth_query_cmds_supp query_cmds_supp;
498 struct qeth_change_addr change_addr;
499 struct qeth_snmp_cmd snmp;
500 struct qeth_set_access_ctrl set_access_ctrl;
501 struct qeth_query_oat query_oat;
502 struct qeth_query_card_info card_info;
503 struct qeth_query_switch_attributes query_switch_attributes;
504 __u32 mode;
505 } data;
506} __attribute__ ((packed));
507
508
509struct qeth_create_destroy_address {
510 __u8 unique_id[8];
511} __attribute__ ((packed));
512
513
514
515enum qeth_diags_cmds {
516 QETH_DIAGS_CMD_QUERY = 0x0001,
517 QETH_DIAGS_CMD_TRAP = 0x0002,
518 QETH_DIAGS_CMD_TRACE = 0x0004,
519 QETH_DIAGS_CMD_NOLOG = 0x0008,
520 QETH_DIAGS_CMD_DUMP = 0x0010,
521};
522
523enum qeth_diags_trace_types {
524 QETH_DIAGS_TYPE_HIPERSOCKET = 0x02,
525};
526
527enum qeth_diags_trace_cmds {
528 QETH_DIAGS_CMD_TRACE_ENABLE = 0x0001,
529 QETH_DIAGS_CMD_TRACE_DISABLE = 0x0002,
530 QETH_DIAGS_CMD_TRACE_MODIFY = 0x0004,
531 QETH_DIAGS_CMD_TRACE_REPLACE = 0x0008,
532 QETH_DIAGS_CMD_TRACE_QUERY = 0x0010,
533};
534
535enum qeth_diags_trap_action {
536 QETH_DIAGS_TRAP_ARM = 0x01,
537 QETH_DIAGS_TRAP_DISARM = 0x02,
538 QETH_DIAGS_TRAP_CAPTURE = 0x04,
539};
540
541struct qeth_ipacmd_diagass {
542 __u32 host_tod2;
543 __u32:32;
544 __u16 subcmd_len;
545 __u16:16;
546 __u32 subcmd;
547 __u8 type;
548 __u8 action;
549 __u16 options;
550 __u32 ext;
551 __u8 cdata[64];
552} __attribute__ ((packed));
553
554
555enum qeth_ipa_sbp_cmd {
556 IPA_SBP_QUERY_COMMANDS_SUPPORTED = 0x00000000L,
557 IPA_SBP_RESET_BRIDGE_PORT_ROLE = 0x00000001L,
558 IPA_SBP_SET_PRIMARY_BRIDGE_PORT = 0x00000002L,
559 IPA_SBP_SET_SECONDARY_BRIDGE_PORT = 0x00000004L,
560 IPA_SBP_QUERY_BRIDGE_PORTS = 0x00000008L,
561 IPA_SBP_BRIDGE_PORT_STATE_CHANGE = 0x00000010L,
562};
563
564struct net_if_token {
565 __u16 devnum;
566 __u8 cssid;
567 __u8 iid;
568 __u8 ssid;
569 __u8 chpid;
570 __u16 chid;
571} __packed;
572
573struct mac_addr_lnid {
574 __u8 mac[6];
575 __u16 lnid;
576} __packed;
577
578struct qeth_ipacmd_sbp_hdr {
579 __u32 supported_sbp_cmds;
580 __u32 enabled_sbp_cmds;
581 __u16 cmdlength;
582 __u16 reserved1;
583 __u32 command_code;
584 __u16 return_code;
585 __u8 used_total;
586 __u8 seq_no;
587 __u32 reserved2;
588} __packed;
589
590struct qeth_sbp_query_cmds_supp {
591 __u32 supported_cmds;
592 __u32 reserved;
593} __packed;
594
595struct qeth_sbp_reset_role {
596} __packed;
597
598struct qeth_sbp_set_primary {
599 struct net_if_token token;
600} __packed;
601
602struct qeth_sbp_set_secondary {
603} __packed;
604
605struct qeth_sbp_port_entry {
606 __u8 role;
607 __u8 state;
608 __u8 reserved1;
609 __u8 reserved2;
610 struct net_if_token token;
611} __packed;
612
613struct qeth_sbp_query_ports {
614 __u8 primary_bp_supported;
615 __u8 secondary_bp_supported;
616 __u8 num_entries;
617 __u8 entry_length;
618 struct qeth_sbp_port_entry entry[];
619} __packed;
620
621struct qeth_sbp_state_change {
622 __u8 primary_bp_supported;
623 __u8 secondary_bp_supported;
624 __u8 num_entries;
625 __u8 entry_length;
626 struct qeth_sbp_port_entry entry[];
627} __packed;
628
629struct qeth_ipacmd_setbridgeport {
630 struct qeth_ipacmd_sbp_hdr hdr;
631 union {
632 struct qeth_sbp_query_cmds_supp query_cmds_supp;
633 struct qeth_sbp_reset_role reset_role;
634 struct qeth_sbp_set_primary set_primary;
635 struct qeth_sbp_set_secondary set_secondary;
636 struct qeth_sbp_query_ports query_ports;
637 struct qeth_sbp_state_change state_change;
638 } data;
639} __packed;
640
641
642
643enum qeth_ipa_addr_change_code {
644 IPA_ADDR_CHANGE_CODE_VLANID = 0x01,
645 IPA_ADDR_CHANGE_CODE_MACADDR = 0x02,
646 IPA_ADDR_CHANGE_CODE_REMOVAL = 0x80,
647};
648
649struct qeth_ipacmd_addr_change_entry {
650 struct net_if_token token;
651 struct mac_addr_lnid addr_lnid;
652 __u8 change_code;
653 __u8 reserved1;
654 __u16 reserved2;
655} __packed;
656
657struct qeth_ipacmd_addr_change {
658 __u8 lost_event_mask;
659 __u8 reserved;
660 __u16 num_entries;
661 struct qeth_ipacmd_addr_change_entry entry[];
662} __packed;
663
664
665struct qeth_ipacmd_hdr {
666 __u8 command;
667 __u8 initiator;
668 __u16 seqno;
669 __u16 return_code;
670 __u8 adapter_type;
671 __u8 rel_adapter_no;
672 __u8 prim_version_no;
673 __u8 param_count;
674 __u16 prot_version;
675 __u32 ipa_supported;
676 __u32 ipa_enabled;
677} __attribute__ ((packed));
678
679
680struct qeth_ipa_cmd {
681 struct qeth_ipacmd_hdr hdr;
682 union {
683 struct qeth_ipacmd_setdelip4 setdelip4;
684 struct qeth_ipacmd_setdelip6 setdelip6;
685 struct qeth_ipacmd_setdelipm setdelipm;
686 struct qeth_ipacmd_setassparms setassparms;
687 struct qeth_ipacmd_layer2setdelmac setdelmac;
688 struct qeth_ipacmd_layer2setdelvlan setdelvlan;
689 struct qeth_create_destroy_address create_destroy_addr;
690 struct qeth_ipacmd_setadpparms setadapterparms;
691 struct qeth_set_routing setrtg;
692 struct qeth_ipacmd_diagass diagass;
693 struct qeth_ipacmd_setbridgeport sbp;
694 struct qeth_ipacmd_addr_change addrchange;
695 } data;
696} __attribute__ ((packed));
697
698
699
700
701
702
703enum qeth_ipa_arp_return_codes {
704 QETH_IPA_ARP_RC_SUCCESS = 0x0000,
705 QETH_IPA_ARP_RC_FAILED = 0x0001,
706 QETH_IPA_ARP_RC_NOTSUPP = 0x0002,
707 QETH_IPA_ARP_RC_OUT_OF_RANGE = 0x0003,
708 QETH_IPA_ARP_RC_Q_NOTSUPP = 0x0004,
709 QETH_IPA_ARP_RC_Q_NO_DATA = 0x0008,
710};
711
712extern char *qeth_get_ipa_msg(enum qeth_ipa_return_codes rc);
713extern char *qeth_get_ipa_cmd_name(enum qeth_ipa_cmds cmd);
714
715#define QETH_SETASS_BASE_LEN (sizeof(struct qeth_ipacmd_hdr) + \
716 sizeof(struct qeth_ipacmd_setassparms_hdr))
717#define QETH_IPA_ARP_DATA_POS(buffer) (buffer + IPA_PDU_HEADER_SIZE + \
718 QETH_SETASS_BASE_LEN)
719#define QETH_SETADP_BASE_LEN (sizeof(struct qeth_ipacmd_hdr) + \
720 sizeof(struct qeth_ipacmd_setadpparms_hdr))
721#define QETH_SNMP_SETADP_CMDLENGTH 16
722
723#define QETH_ARP_DATA_SIZE 3968
724#define QETH_ARP_CMD_LEN (QETH_ARP_DATA_SIZE + 8)
725
726#define IS_IPA_REPLY(cmd) ((cmd->hdr.initiator == IPA_CMD_INITIATOR_HOST) || \
727 (cmd->hdr.initiator == IPA_CMD_INITIATOR_OSA_REPLY))
728
729
730
731
732
733
734extern unsigned char WRITE_CCW[];
735extern unsigned char READ_CCW[];
736
737extern unsigned char CM_ENABLE[];
738#define CM_ENABLE_SIZE 0x63
739#define QETH_CM_ENABLE_ISSUER_RM_TOKEN(buffer) (buffer + 0x2c)
740#define QETH_CM_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
741#define QETH_CM_ENABLE_USER_DATA(buffer) (buffer + 0x5b)
742
743#define QETH_CM_ENABLE_RESP_FILTER_TOKEN(buffer) \
744 (PDU_ENCAPSULATION(buffer) + 0x13)
745
746
747extern unsigned char CM_SETUP[];
748#define CM_SETUP_SIZE 0x64
749#define QETH_CM_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
750#define QETH_CM_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
751#define QETH_CM_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
752
753#define QETH_CM_SETUP_RESP_DEST_ADDR(buffer) \
754 (PDU_ENCAPSULATION(buffer) + 0x1a)
755
756extern unsigned char ULP_ENABLE[];
757#define ULP_ENABLE_SIZE 0x6b
758#define QETH_ULP_ENABLE_LINKNUM(buffer) (buffer + 0x61)
759#define QETH_ULP_ENABLE_DEST_ADDR(buffer) (buffer + 0x2c)
760#define QETH_ULP_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
761#define QETH_ULP_ENABLE_PORTNAME_AND_LL(buffer) (buffer + 0x62)
762#define QETH_ULP_ENABLE_RESP_FILTER_TOKEN(buffer) \
763 (PDU_ENCAPSULATION(buffer) + 0x13)
764#define QETH_ULP_ENABLE_RESP_MAX_MTU(buffer) \
765 (PDU_ENCAPSULATION(buffer) + 0x1f)
766#define QETH_ULP_ENABLE_RESP_DIFINFO_LEN(buffer) \
767 (PDU_ENCAPSULATION(buffer) + 0x17)
768#define QETH_ULP_ENABLE_RESP_LINK_TYPE(buffer) \
769 (PDU_ENCAPSULATION(buffer) + 0x2b)
770
771#define QETH_PROT_LAYER2 0x08
772#define QETH_PROT_TCPIP 0x03
773#define QETH_PROT_OSN2 0x0a
774#define QETH_ULP_ENABLE_PROT_TYPE(buffer) (buffer + 0x50)
775#define QETH_IPA_CMD_PROT_TYPE(buffer) (buffer + 0x19)
776
777extern unsigned char ULP_SETUP[];
778#define ULP_SETUP_SIZE 0x6c
779#define QETH_ULP_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
780#define QETH_ULP_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
781#define QETH_ULP_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
782#define QETH_ULP_SETUP_CUA(buffer) (buffer + 0x68)
783#define QETH_ULP_SETUP_REAL_DEVADDR(buffer) (buffer + 0x6a)
784
785#define QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(buffer) \
786 (PDU_ENCAPSULATION(buffer) + 0x1a)
787
788
789extern unsigned char DM_ACT[];
790#define DM_ACT_SIZE 0x55
791#define QETH_DM_ACT_DEST_ADDR(buffer) (buffer + 0x2c)
792#define QETH_DM_ACT_CONNECTION_TOKEN(buffer) (buffer + 0x51)
793
794
795
796#define QETH_TRANSPORT_HEADER_SEQ_NO(buffer) (buffer + 4)
797#define QETH_PDU_HEADER_SEQ_NO(buffer) (buffer + 0x1c)
798#define QETH_PDU_HEADER_ACK_SEQ_NO(buffer) (buffer + 0x20)
799
800extern unsigned char IDX_ACTIVATE_READ[];
801extern unsigned char IDX_ACTIVATE_WRITE[];
802
803#define IDX_ACTIVATE_SIZE 0x22
804#define QETH_IDX_ACT_PNO(buffer) (buffer+0x0b)
805#define QETH_IDX_ACT_ISSUER_RM_TOKEN(buffer) (buffer + 0x0c)
806#define QETH_IDX_NO_PORTNAME_REQUIRED(buffer) ((buffer)[0x0b] & 0x80)
807#define QETH_IDX_ACT_FUNC_LEVEL(buffer) (buffer + 0x10)
808#define QETH_IDX_ACT_DATASET_NAME(buffer) (buffer + 0x16)
809#define QETH_IDX_ACT_QDIO_DEV_CUA(buffer) (buffer + 0x1e)
810#define QETH_IDX_ACT_QDIO_DEV_REALADDR(buffer) (buffer + 0x20)
811#define QETH_IS_IDX_ACT_POS_REPLY(buffer) (((buffer)[0x08] & 3) == 2)
812#define QETH_IDX_REPLY_LEVEL(buffer) (buffer + 0x12)
813#define QETH_IDX_ACT_CAUSE_CODE(buffer) (buffer)[0x09]
814#define QETH_IDX_ACT_ERR_EXCL 0x19
815#define QETH_IDX_ACT_ERR_AUTH 0x1E
816#define QETH_IDX_ACT_ERR_AUTH_USER 0x20
817
818#define PDU_ENCAPSULATION(buffer) \
819 (buffer + *(buffer + (*(buffer + 0x0b)) + \
820 *(buffer + *(buffer + 0x0b) + 0x11) + 0x07))
821
822#define IS_IPA(buffer) \
823 ((buffer) && \
824 (*(buffer + ((*(buffer + 0x0b)) + 4)) == 0xc1))
825
826#endif
827
