linux/drivers/spi/spi-mpc52xx.c
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   1/*
   2 * MPC52xx SPI bus driver.
   3 *
   4 * Copyright (C) 2008 Secret Lab Technologies Ltd.
   5 *
   6 * This file is released under the GPLv2
   7 *
   8 * This is the driver for the MPC5200's dedicated SPI controller.
   9 *
  10 * Note: this driver does not support the MPC5200 PSC in SPI mode.  For
  11 * that driver see drivers/spi/mpc52xx_psc_spi.c
  12 */
  13
  14#include <linux/module.h>
  15#include <linux/errno.h>
  16#include <linux/of_platform.h>
  17#include <linux/interrupt.h>
  18#include <linux/delay.h>
  19#include <linux/spi/spi.h>
  20#include <linux/io.h>
  21#include <linux/of_gpio.h>
  22#include <linux/slab.h>
  23#include <asm/time.h>
  24#include <asm/mpc52xx.h>
  25
  26MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
  27MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
  28MODULE_LICENSE("GPL");
  29
  30/* Register offsets */
  31#define SPI_CTRL1       0x00
  32#define SPI_CTRL1_SPIE          (1 << 7)
  33#define SPI_CTRL1_SPE           (1 << 6)
  34#define SPI_CTRL1_MSTR          (1 << 4)
  35#define SPI_CTRL1_CPOL          (1 << 3)
  36#define SPI_CTRL1_CPHA          (1 << 2)
  37#define SPI_CTRL1_SSOE          (1 << 1)
  38#define SPI_CTRL1_LSBFE         (1 << 0)
  39
  40#define SPI_CTRL2       0x01
  41#define SPI_BRR         0x04
  42
  43#define SPI_STATUS      0x05
  44#define SPI_STATUS_SPIF         (1 << 7)
  45#define SPI_STATUS_WCOL         (1 << 6)
  46#define SPI_STATUS_MODF         (1 << 4)
  47
  48#define SPI_DATA        0x09
  49#define SPI_PORTDATA    0x0d
  50#define SPI_DATADIR     0x10
  51
  52/* FSM state return values */
  53#define FSM_STOP        0       /* Nothing more for the state machine to */
  54                                /* do.  If something interesting happens */
  55                                /* then an IRQ will be received */
  56#define FSM_POLL        1       /* need to poll for completion, an IRQ is */
  57                                /* not expected */
  58#define FSM_CONTINUE    2       /* Keep iterating the state machine */
  59
  60/* Driver internal data */
  61struct mpc52xx_spi {
  62        struct spi_master *master;
  63        void __iomem *regs;
  64        int irq0;       /* MODF irq */
  65        int irq1;       /* SPIF irq */
  66        unsigned int ipb_freq;
  67
  68        /* Statistics; not used now, but will be reintroduced for debugfs */
  69        int msg_count;
  70        int wcol_count;
  71        int wcol_ticks;
  72        u32 wcol_tx_timestamp;
  73        int modf_count;
  74        int byte_count;
  75
  76        struct list_head queue;         /* queue of pending messages */
  77        spinlock_t lock;
  78        struct work_struct work;
  79
  80        /* Details of current transfer (length, and buffer pointers) */
  81        struct spi_message *message;    /* current message */
  82        struct spi_transfer *transfer;  /* current transfer */
  83        int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
  84        int len;
  85        int timestamp;
  86        u8 *rx_buf;
  87        const u8 *tx_buf;
  88        int cs_change;
  89        int gpio_cs_count;
  90        unsigned int *gpio_cs;
  91};
  92
  93/*
  94 * CS control function
  95 */
  96static void mpc52xx_spi_chipsel(struct mpc52xx_spi *ms, int value)
  97{
  98        int cs;
  99
 100        if (ms->gpio_cs_count > 0) {
 101                cs = ms->message->spi->chip_select;
 102                gpio_set_value(ms->gpio_cs[cs], value ? 0 : 1);
 103        } else
 104                out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08);
 105}
 106
 107/*
 108 * Start a new transfer.  This is called both by the idle state
 109 * for the first transfer in a message, and by the wait state when the
 110 * previous transfer in a message is complete.
 111 */
 112static void mpc52xx_spi_start_transfer(struct mpc52xx_spi *ms)
 113{
 114        ms->rx_buf = ms->transfer->rx_buf;
 115        ms->tx_buf = ms->transfer->tx_buf;
 116        ms->len = ms->transfer->len;
 117
 118        /* Activate the chip select */
 119        if (ms->cs_change)
 120                mpc52xx_spi_chipsel(ms, 1);
 121        ms->cs_change = ms->transfer->cs_change;
 122
 123        /* Write out the first byte */
 124        ms->wcol_tx_timestamp = get_tbl();
 125        if (ms->tx_buf)
 126                out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
 127        else
 128                out_8(ms->regs + SPI_DATA, 0);
 129}
 130
 131/* Forward declaration of state handlers */
 132static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
 133                                         u8 status, u8 data);
 134static int mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms,
 135                                     u8 status, u8 data);
 136
 137/*
 138 * IDLE state
 139 *
 140 * No transfers are in progress; if another transfer is pending then retrieve
 141 * it and kick it off.  Otherwise, stop processing the state machine
 142 */
 143static int
 144mpc52xx_spi_fsmstate_idle(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
 145{
 146        struct spi_device *spi;
 147        int spr, sppr;
 148        u8 ctrl1;
 149
 150        if (status && (irq != NO_IRQ))
 151                dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
 152                        status);
 153
 154        /* Check if there is another transfer waiting. */
 155        if (list_empty(&ms->queue))
 156                return FSM_STOP;
 157
 158        /* get the head of the queue */
 159        ms->message = list_first_entry(&ms->queue, struct spi_message, queue);
 160        list_del_init(&ms->message->queue);
 161
 162        /* Setup the controller parameters */
 163        ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
 164        spi = ms->message->spi;
 165        if (spi->mode & SPI_CPHA)
 166                ctrl1 |= SPI_CTRL1_CPHA;
 167        if (spi->mode & SPI_CPOL)
 168                ctrl1 |= SPI_CTRL1_CPOL;
 169        if (spi->mode & SPI_LSB_FIRST)
 170                ctrl1 |= SPI_CTRL1_LSBFE;
 171        out_8(ms->regs + SPI_CTRL1, ctrl1);
 172
 173        /* Setup the controller speed */
 174        /* minimum divider is '2'.  Also, add '1' to force rounding the
 175         * divider up. */
 176        sppr = ((ms->ipb_freq / ms->message->spi->max_speed_hz) + 1) >> 1;
 177        spr = 0;
 178        if (sppr < 1)
 179                sppr = 1;
 180        while (((sppr - 1) & ~0x7) != 0) {
 181                sppr = (sppr + 1) >> 1; /* add '1' to force rounding up */
 182                spr++;
 183        }
 184        sppr--;         /* sppr quantity in register is offset by 1 */
 185        if (spr > 7) {
 186                /* Don't overrun limits of SPI baudrate register */
 187                spr = 7;
 188                sppr = 7;
 189        }
 190        out_8(ms->regs + SPI_BRR, sppr << 4 | spr); /* Set speed */
 191
 192        ms->cs_change = 1;
 193        ms->transfer = container_of(ms->message->transfers.next,
 194                                    struct spi_transfer, transfer_list);
 195
 196        mpc52xx_spi_start_transfer(ms);
 197        ms->state = mpc52xx_spi_fsmstate_transfer;
 198
 199        return FSM_CONTINUE;
 200}
 201
 202/*
 203 * TRANSFER state
 204 *
 205 * In the middle of a transfer.  If the SPI core has completed processing
 206 * a byte, then read out the received data and write out the next byte
 207 * (unless this transfer is finished; in which case go on to the wait
 208 * state)
 209 */
 210static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
 211                                         u8 status, u8 data)
 212{
 213        if (!status)
 214                return ms->irq0 ? FSM_STOP : FSM_POLL;
 215
 216        if (status & SPI_STATUS_WCOL) {
 217                /* The SPI controller is stoopid.  At slower speeds, it may
 218                 * raise the SPIF flag before the state machine is actually
 219                 * finished, which causes a collision (internal to the state
 220                 * machine only).  The manual recommends inserting a delay
 221                 * between receiving the interrupt and sending the next byte,
 222                 * but it can also be worked around simply by retrying the
 223                 * transfer which is what we do here. */
 224                ms->wcol_count++;
 225                ms->wcol_ticks += get_tbl() - ms->wcol_tx_timestamp;
 226                ms->wcol_tx_timestamp = get_tbl();
 227                data = 0;
 228                if (ms->tx_buf)
 229                        data = *(ms->tx_buf - 1);
 230                out_8(ms->regs + SPI_DATA, data); /* try again */
 231                return FSM_CONTINUE;
 232        } else if (status & SPI_STATUS_MODF) {
 233                ms->modf_count++;
 234                dev_err(&ms->master->dev, "mode fault\n");
 235                mpc52xx_spi_chipsel(ms, 0);
 236                ms->message->status = -EIO;
 237                if (ms->message->complete)
 238                        ms->message->complete(ms->message->context);
 239                ms->state = mpc52xx_spi_fsmstate_idle;
 240                return FSM_CONTINUE;
 241        }
 242
 243        /* Read data out of the spi device */
 244        ms->byte_count++;
 245        if (ms->rx_buf)
 246                *ms->rx_buf++ = data;
 247
 248        /* Is the transfer complete? */
 249        ms->len--;
 250        if (ms->len == 0) {
 251                ms->timestamp = get_tbl();
 252                ms->timestamp += ms->transfer->delay_usecs * tb_ticks_per_usec;
 253                ms->state = mpc52xx_spi_fsmstate_wait;
 254                return FSM_CONTINUE;
 255        }
 256
 257        /* Write out the next byte */
 258        ms->wcol_tx_timestamp = get_tbl();
 259        if (ms->tx_buf)
 260                out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
 261        else
 262                out_8(ms->regs + SPI_DATA, 0);
 263
 264        return FSM_CONTINUE;
 265}
 266
 267/*
 268 * WAIT state
 269 *
 270 * A transfer has completed; need to wait for the delay period to complete
 271 * before starting the next transfer
 272 */
 273static int
 274mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
 275{
 276        if (status && irq)
 277                dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
 278                        status);
 279
 280        if (((int)get_tbl()) - ms->timestamp < 0)
 281                return FSM_POLL;
 282
 283        ms->message->actual_length += ms->transfer->len;
 284
 285        /* Check if there is another transfer in this message.  If there
 286         * aren't then deactivate CS, notify sender, and drop back to idle
 287         * to start the next message. */
 288        if (ms->transfer->transfer_list.next == &ms->message->transfers) {
 289                ms->msg_count++;
 290                mpc52xx_spi_chipsel(ms, 0);
 291                ms->message->status = 0;
 292                if (ms->message->complete)
 293                        ms->message->complete(ms->message->context);
 294                ms->state = mpc52xx_spi_fsmstate_idle;
 295                return FSM_CONTINUE;
 296        }
 297
 298        /* There is another transfer; kick it off */
 299
 300        if (ms->cs_change)
 301                mpc52xx_spi_chipsel(ms, 0);
 302
 303        ms->transfer = container_of(ms->transfer->transfer_list.next,
 304                                    struct spi_transfer, transfer_list);
 305        mpc52xx_spi_start_transfer(ms);
 306        ms->state = mpc52xx_spi_fsmstate_transfer;
 307        return FSM_CONTINUE;
 308}
 309
 310/**
 311 * mpc52xx_spi_fsm_process - Finite State Machine iteration function
 312 * @irq: irq number that triggered the FSM or 0 for polling
 313 * @ms: pointer to mpc52xx_spi driver data
 314 */
 315static void mpc52xx_spi_fsm_process(int irq, struct mpc52xx_spi *ms)
 316{
 317        int rc = FSM_CONTINUE;
 318        u8 status, data;
 319
 320        while (rc == FSM_CONTINUE) {
 321                /* Interrupt cleared by read of STATUS followed by
 322                 * read of DATA registers */
 323                status = in_8(ms->regs + SPI_STATUS);
 324                data = in_8(ms->regs + SPI_DATA);
 325                rc = ms->state(irq, ms, status, data);
 326        }
 327
 328        if (rc == FSM_POLL)
 329                schedule_work(&ms->work);
 330}
 331
 332/**
 333 * mpc52xx_spi_irq - IRQ handler
 334 */
 335static irqreturn_t mpc52xx_spi_irq(int irq, void *_ms)
 336{
 337        struct mpc52xx_spi *ms = _ms;
 338        spin_lock(&ms->lock);
 339        mpc52xx_spi_fsm_process(irq, ms);
 340        spin_unlock(&ms->lock);
 341        return IRQ_HANDLED;
 342}
 343
 344/**
 345 * mpc52xx_spi_wq - Workqueue function for polling the state machine
 346 */
 347static void mpc52xx_spi_wq(struct work_struct *work)
 348{
 349        struct mpc52xx_spi *ms = container_of(work, struct mpc52xx_spi, work);
 350        unsigned long flags;
 351
 352        spin_lock_irqsave(&ms->lock, flags);
 353        mpc52xx_spi_fsm_process(0, ms);
 354        spin_unlock_irqrestore(&ms->lock, flags);
 355}
 356
 357/*
 358 * spi_master ops
 359 */
 360
 361static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
 362{
 363        struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
 364        unsigned long flags;
 365
 366        m->actual_length = 0;
 367        m->status = -EINPROGRESS;
 368
 369        spin_lock_irqsave(&ms->lock, flags);
 370        list_add_tail(&m->queue, &ms->queue);
 371        spin_unlock_irqrestore(&ms->lock, flags);
 372        schedule_work(&ms->work);
 373
 374        return 0;
 375}
 376
 377/*
 378 * OF Platform Bus Binding
 379 */
 380static int mpc52xx_spi_probe(struct platform_device *op)
 381{
 382        struct spi_master *master;
 383        struct mpc52xx_spi *ms;
 384        void __iomem *regs;
 385        u8 ctrl1;
 386        int rc, i = 0;
 387        int gpio_cs;
 388
 389        /* MMIO registers */
 390        dev_dbg(&op->dev, "probing mpc5200 SPI device\n");
 391        regs = of_iomap(op->dev.of_node, 0);
 392        if (!regs)
 393                return -ENODEV;
 394
 395        /* initialize the device */
 396        ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
 397        out_8(regs + SPI_CTRL1, ctrl1);
 398        out_8(regs + SPI_CTRL2, 0x0);
 399        out_8(regs + SPI_DATADIR, 0xe); /* Set output pins */
 400        out_8(regs + SPI_PORTDATA, 0x8);        /* Deassert /SS signal */
 401
 402        /* Clear the status register and re-read it to check for a MODF
 403         * failure.  This driver cannot currently handle multiple masters
 404         * on the SPI bus.  This fault will also occur if the SPI signals
 405         * are not connected to any pins (port_config setting) */
 406        in_8(regs + SPI_STATUS);
 407        out_8(regs + SPI_CTRL1, ctrl1);
 408
 409        in_8(regs + SPI_DATA);
 410        if (in_8(regs + SPI_STATUS) & SPI_STATUS_MODF) {
 411                dev_err(&op->dev, "mode fault; is port_config correct?\n");
 412                rc = -EIO;
 413                goto err_init;
 414        }
 415
 416        dev_dbg(&op->dev, "allocating spi_master struct\n");
 417        master = spi_alloc_master(&op->dev, sizeof *ms);
 418        if (!master) {
 419                rc = -ENOMEM;
 420                goto err_alloc;
 421        }
 422
 423        master->transfer = mpc52xx_spi_transfer;
 424        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
 425        master->bits_per_word_mask = SPI_BPW_MASK(8);
 426        master->dev.of_node = op->dev.of_node;
 427
 428        platform_set_drvdata(op, master);
 429
 430        ms = spi_master_get_devdata(master);
 431        ms->master = master;
 432        ms->regs = regs;
 433        ms->irq0 = irq_of_parse_and_map(op->dev.of_node, 0);
 434        ms->irq1 = irq_of_parse_and_map(op->dev.of_node, 1);
 435        ms->state = mpc52xx_spi_fsmstate_idle;
 436        ms->ipb_freq = mpc5xxx_get_bus_frequency(op->dev.of_node);
 437        ms->gpio_cs_count = of_gpio_count(op->dev.of_node);
 438        if (ms->gpio_cs_count > 0) {
 439                master->num_chipselect = ms->gpio_cs_count;
 440                ms->gpio_cs = kmalloc_array(ms->gpio_cs_count,
 441                                            sizeof(*ms->gpio_cs),
 442                                            GFP_KERNEL);
 443                if (!ms->gpio_cs) {
 444                        rc = -ENOMEM;
 445                        goto err_alloc_gpio;
 446                }
 447
 448                for (i = 0; i < ms->gpio_cs_count; i++) {
 449                        gpio_cs = of_get_gpio(op->dev.of_node, i);
 450                        if (gpio_cs < 0) {
 451                                dev_err(&op->dev,
 452                                        "could not parse the gpio field in oftree\n");
 453                                rc = -ENODEV;
 454                                goto err_gpio;
 455                        }
 456
 457                        rc = gpio_request(gpio_cs, dev_name(&op->dev));
 458                        if (rc) {
 459                                dev_err(&op->dev,
 460                                        "can't request spi cs gpio #%d on gpio line %d\n",
 461                                        i, gpio_cs);
 462                                goto err_gpio;
 463                        }
 464
 465                        gpio_direction_output(gpio_cs, 1);
 466                        ms->gpio_cs[i] = gpio_cs;
 467                }
 468        }
 469
 470        spin_lock_init(&ms->lock);
 471        INIT_LIST_HEAD(&ms->queue);
 472        INIT_WORK(&ms->work, mpc52xx_spi_wq);
 473
 474        /* Decide if interrupts can be used */
 475        if (ms->irq0 && ms->irq1) {
 476                rc = request_irq(ms->irq0, mpc52xx_spi_irq, 0,
 477                                  "mpc5200-spi-modf", ms);
 478                rc |= request_irq(ms->irq1, mpc52xx_spi_irq, 0,
 479                                  "mpc5200-spi-spif", ms);
 480                if (rc) {
 481                        free_irq(ms->irq0, ms);
 482                        free_irq(ms->irq1, ms);
 483                        ms->irq0 = ms->irq1 = 0;
 484                }
 485        } else {
 486                /* operate in polled mode */
 487                ms->irq0 = ms->irq1 = 0;
 488        }
 489
 490        if (!ms->irq0)
 491                dev_info(&op->dev, "using polled mode\n");
 492
 493        dev_dbg(&op->dev, "registering spi_master struct\n");
 494        rc = spi_register_master(master);
 495        if (rc)
 496                goto err_register;
 497
 498        dev_info(&ms->master->dev, "registered MPC5200 SPI bus\n");
 499
 500        return rc;
 501
 502 err_register:
 503        dev_err(&ms->master->dev, "initialization failed\n");
 504 err_gpio:
 505        while (i-- > 0)
 506                gpio_free(ms->gpio_cs[i]);
 507
 508        kfree(ms->gpio_cs);
 509 err_alloc_gpio:
 510        spi_master_put(master);
 511 err_alloc:
 512 err_init:
 513        iounmap(regs);
 514        return rc;
 515}
 516
 517static int mpc52xx_spi_remove(struct platform_device *op)
 518{
 519        struct spi_master *master = spi_master_get(platform_get_drvdata(op));
 520        struct mpc52xx_spi *ms = spi_master_get_devdata(master);
 521        int i;
 522
 523        free_irq(ms->irq0, ms);
 524        free_irq(ms->irq1, ms);
 525
 526        for (i = 0; i < ms->gpio_cs_count; i++)
 527                gpio_free(ms->gpio_cs[i]);
 528
 529        kfree(ms->gpio_cs);
 530        spi_unregister_master(master);
 531        iounmap(ms->regs);
 532        spi_master_put(master);
 533
 534        return 0;
 535}
 536
 537static const struct of_device_id mpc52xx_spi_match[] = {
 538        { .compatible = "fsl,mpc5200-spi", },
 539        {}
 540};
 541MODULE_DEVICE_TABLE(of, mpc52xx_spi_match);
 542
 543static struct platform_driver mpc52xx_spi_of_driver = {
 544        .driver = {
 545                .name = "mpc52xx-spi",
 546                .of_match_table = mpc52xx_spi_match,
 547        },
 548        .probe = mpc52xx_spi_probe,
 549        .remove = mpc52xx_spi_remove,
 550};
 551module_platform_driver(mpc52xx_spi_of_driver);
 552