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9#include <linux/device.h>
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/sysfs.h>
13#include <linux/spi/spi.h>
14#include <linux/err.h>
15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/module.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21#include <linux/iio/events.h>
22
23#include "ad7280a.h"
24
25
26#define AD7280A_CELL_VOLTAGE_1 0x0
27#define AD7280A_CELL_VOLTAGE_2 0x1
28#define AD7280A_CELL_VOLTAGE_3 0x2
29#define AD7280A_CELL_VOLTAGE_4 0x3
30#define AD7280A_CELL_VOLTAGE_5 0x4
31#define AD7280A_CELL_VOLTAGE_6 0x5
32#define AD7280A_AUX_ADC_1 0x6
33#define AD7280A_AUX_ADC_2 0x7
34#define AD7280A_AUX_ADC_3 0x8
35#define AD7280A_AUX_ADC_4 0x9
36#define AD7280A_AUX_ADC_5 0xA
37#define AD7280A_AUX_ADC_6 0xB
38#define AD7280A_SELF_TEST 0xC
39#define AD7280A_CONTROL_HB 0xD
40#define AD7280A_CONTROL_LB 0xE
41#define AD7280A_CELL_OVERVOLTAGE 0xF
42#define AD7280A_CELL_UNDERVOLTAGE 0x10
43#define AD7280A_AUX_ADC_OVERVOLTAGE 0x11
44#define AD7280A_AUX_ADC_UNDERVOLTAGE 0x12
45#define AD7280A_ALERT 0x13
46#define AD7280A_CELL_BALANCE 0x14
47#define AD7280A_CB1_TIMER 0x15
48#define AD7280A_CB2_TIMER 0x16
49#define AD7280A_CB3_TIMER 0x17
50#define AD7280A_CB4_TIMER 0x18
51#define AD7280A_CB5_TIMER 0x19
52#define AD7280A_CB6_TIMER 0x1A
53#define AD7280A_PD_TIMER 0x1B
54#define AD7280A_READ 0x1C
55#define AD7280A_CNVST_CONTROL 0x1D
56
57
58#define AD7280A_CTRL_HB_CONV_INPUT_ALL 0
59#define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 BIT(6)
60#define AD7280A_CTRL_HB_CONV_INPUT_6CELL BIT(7)
61#define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST (BIT(7) | BIT(6))
62#define AD7280A_CTRL_HB_CONV_RES_READ_ALL 0
63#define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4 BIT(4)
64#define AD7280A_CTRL_HB_CONV_RES_READ_6CELL BIT(5)
65#define AD7280A_CTRL_HB_CONV_RES_READ_NO (BIT(5) | BIT(4))
66#define AD7280A_CTRL_HB_CONV_START_CNVST 0
67#define AD7280A_CTRL_HB_CONV_START_CS BIT(3)
68#define AD7280A_CTRL_HB_CONV_AVG_DIS 0
69#define AD7280A_CTRL_HB_CONV_AVG_2 BIT(1)
70#define AD7280A_CTRL_HB_CONV_AVG_4 BIT(2)
71#define AD7280A_CTRL_HB_CONV_AVG_8 (BIT(2) | BIT(1))
72#define AD7280A_CTRL_HB_CONV_AVG(x) ((x) << 1)
73#define AD7280A_CTRL_HB_PWRDN_SW BIT(0)
74
75#define AD7280A_CTRL_LB_SWRST BIT(7)
76#define AD7280A_CTRL_LB_ACQ_TIME_400ns 0
77#define AD7280A_CTRL_LB_ACQ_TIME_800ns BIT(5)
78#define AD7280A_CTRL_LB_ACQ_TIME_1200ns BIT(6)
79#define AD7280A_CTRL_LB_ACQ_TIME_1600ns (BIT(6) | BIT(5))
80#define AD7280A_CTRL_LB_ACQ_TIME(x) ((x) << 5)
81#define AD7280A_CTRL_LB_MUST_SET BIT(4)
82#define AD7280A_CTRL_LB_THERMISTOR_EN BIT(3)
83#define AD7280A_CTRL_LB_LOCK_DEV_ADDR BIT(2)
84#define AD7280A_CTRL_LB_INC_DEV_ADDR BIT(1)
85#define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN BIT(0)
86
87#define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6)
88#define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6))
89
90#define AD7280A_ALL_CELLS (0xAD << 16)
91
92#define AD7280A_MAX_SPI_CLK_HZ 700000
93#define AD7280A_MAX_CHAIN 8
94#define AD7280A_CELLS_PER_DEV 6
95#define AD7280A_BITS 12
96#define AD7280A_NUM_CH (AD7280A_AUX_ADC_6 - \
97 AD7280A_CELL_VOLTAGE_1 + 1)
98
99#define AD7280A_DEVADDR_MASTER 0
100#define AD7280A_DEVADDR_ALL 0x1F
101
102#define AD7280A_DEVADDR(addr) (((addr & 0x1) << 4) | ((addr & 0x2) << 3) | \
103 (addr & 0x4) | ((addr & 0x8) >> 3) | \
104 ((addr & 0x10) >> 4))
105
106
107
108
109
110
111#define AD7280A_READ_TXVAL 0xF800030A
112
113
114
115
116
117
118#define POLYNOM 0x2F
119#define POLYNOM_ORDER 8
120#define HIGHBIT (1 << (POLYNOM_ORDER - 1))
121
122struct ad7280_state {
123 struct spi_device *spi;
124 struct iio_chan_spec *channels;
125 struct iio_dev_attr *iio_attr;
126 int slave_num;
127 int scan_cnt;
128 int readback_delay_us;
129 unsigned char crc_tab[256];
130 unsigned char ctrl_hb;
131 unsigned char ctrl_lb;
132 unsigned char cell_threshhigh;
133 unsigned char cell_threshlow;
134 unsigned char aux_threshhigh;
135 unsigned char aux_threshlow;
136 unsigned char cb_mask[AD7280A_MAX_CHAIN];
137 struct mutex lock;
138
139 __be32 buf[2] ____cacheline_aligned;
140};
141
142static void ad7280_crc8_build_table(unsigned char *crc_tab)
143{
144 unsigned char bit, crc;
145 int cnt, i;
146
147 for (cnt = 0; cnt < 256; cnt++) {
148 crc = cnt;
149 for (i = 0; i < 8; i++) {
150 bit = crc & HIGHBIT;
151 crc <<= 1;
152 if (bit)
153 crc ^= POLYNOM;
154 }
155 crc_tab[cnt] = crc;
156 }
157}
158
159static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val)
160{
161 unsigned char crc;
162
163 crc = crc_tab[val >> 16 & 0xFF];
164 crc = crc_tab[crc ^ (val >> 8 & 0xFF)];
165
166 return crc ^ (val & 0xFF);
167}
168
169static int ad7280_check_crc(struct ad7280_state *st, unsigned int val)
170{
171 unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10);
172
173 if (crc != ((val >> 2) & 0xFF))
174 return -EIO;
175
176 return 0;
177}
178
179
180
181
182
183
184
185
186
187static void ad7280_delay(struct ad7280_state *st)
188{
189 if (st->readback_delay_us < 50)
190 udelay(st->readback_delay_us);
191 else
192 usleep_range(250, 500);
193}
194
195static int __ad7280_read32(struct ad7280_state *st, unsigned int *val)
196{
197 int ret;
198 struct spi_transfer t = {
199 .tx_buf = &st->buf[0],
200 .rx_buf = &st->buf[1],
201 .len = 4,
202 };
203
204 st->buf[0] = cpu_to_be32(AD7280A_READ_TXVAL);
205
206 ret = spi_sync_transfer(st->spi, &t, 1);
207 if (ret)
208 return ret;
209
210 *val = be32_to_cpu(st->buf[1]);
211
212 return 0;
213}
214
215static int ad7280_write(struct ad7280_state *st, unsigned int devaddr,
216 unsigned int addr, bool all, unsigned int val)
217{
218 unsigned int reg = devaddr << 27 | addr << 21 |
219 (val & 0xFF) << 13 | all << 12;
220
221 reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2;
222 st->buf[0] = cpu_to_be32(reg);
223
224 return spi_write(st->spi, &st->buf[0], 4);
225}
226
227static int ad7280_read(struct ad7280_state *st, unsigned int devaddr,
228 unsigned int addr)
229{
230 int ret;
231 unsigned int tmp;
232
233
234 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
235 AD7280A_CTRL_HB_CONV_INPUT_ALL |
236 AD7280A_CTRL_HB_CONV_RES_READ_NO |
237 st->ctrl_hb);
238 if (ret)
239 return ret;
240
241
242 ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
243 AD7280A_CTRL_HB_CONV_INPUT_ALL |
244 AD7280A_CTRL_HB_CONV_RES_READ_ALL |
245 st->ctrl_hb);
246 if (ret)
247 return ret;
248
249
250 ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
251 if (ret)
252 return ret;
253
254 __ad7280_read32(st, &tmp);
255
256 if (ad7280_check_crc(st, tmp))
257 return -EIO;
258
259 if (((tmp >> 27) != devaddr) || (((tmp >> 21) & 0x3F) != addr))
260 return -EFAULT;
261
262 return (tmp >> 13) & 0xFF;
263}
264
265static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr,
266 unsigned int addr)
267{
268 int ret;
269 unsigned int tmp;
270
271 ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
272 if (ret)
273 return ret;
274
275 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
276 AD7280A_CTRL_HB_CONV_INPUT_ALL |
277 AD7280A_CTRL_HB_CONV_RES_READ_NO |
278 st->ctrl_hb);
279 if (ret)
280 return ret;
281
282 ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
283 AD7280A_CTRL_HB_CONV_INPUT_ALL |
284 AD7280A_CTRL_HB_CONV_RES_READ_ALL |
285 AD7280A_CTRL_HB_CONV_START_CS |
286 st->ctrl_hb);
287 if (ret)
288 return ret;
289
290 ad7280_delay(st);
291
292 __ad7280_read32(st, &tmp);
293
294 if (ad7280_check_crc(st, tmp))
295 return -EIO;
296
297 if (((tmp >> 27) != devaddr) || (((tmp >> 23) & 0xF) != addr))
298 return -EFAULT;
299
300 return (tmp >> 11) & 0xFFF;
301}
302
303static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt,
304 unsigned int *array)
305{
306 int i, ret;
307 unsigned int tmp, sum = 0;
308
309 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
310 AD7280A_CELL_VOLTAGE_1 << 2);
311 if (ret)
312 return ret;
313
314 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
315 AD7280A_CTRL_HB_CONV_INPUT_ALL |
316 AD7280A_CTRL_HB_CONV_RES_READ_ALL |
317 AD7280A_CTRL_HB_CONV_START_CS |
318 st->ctrl_hb);
319 if (ret)
320 return ret;
321
322 ad7280_delay(st);
323
324 for (i = 0; i < cnt; i++) {
325 __ad7280_read32(st, &tmp);
326
327 if (ad7280_check_crc(st, tmp))
328 return -EIO;
329
330 if (array)
331 array[i] = tmp;
332
333 if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6)
334 sum += ((tmp >> 11) & 0xFFF);
335 }
336
337 return sum;
338}
339
340static int ad7280_chain_setup(struct ad7280_state *st)
341{
342 unsigned int val, n;
343 int ret;
344
345 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
346 AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
347 AD7280A_CTRL_LB_LOCK_DEV_ADDR |
348 AD7280A_CTRL_LB_MUST_SET |
349 AD7280A_CTRL_LB_SWRST |
350 st->ctrl_lb);
351 if (ret)
352 return ret;
353
354 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
355 AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
356 AD7280A_CTRL_LB_LOCK_DEV_ADDR |
357 AD7280A_CTRL_LB_MUST_SET |
358 st->ctrl_lb);
359 if (ret)
360 return ret;
361
362 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
363 AD7280A_CONTROL_LB << 2);
364 if (ret)
365 return ret;
366
367 for (n = 0; n <= AD7280A_MAX_CHAIN; n++) {
368 __ad7280_read32(st, &val);
369 if (val == 0)
370 return n - 1;
371
372 if (ad7280_check_crc(st, val))
373 return -EIO;
374
375 if (n != AD7280A_DEVADDR(val >> 27))
376 return -EIO;
377 }
378
379 return -EFAULT;
380}
381
382static ssize_t ad7280_show_balance_sw(struct device *dev,
383 struct device_attribute *attr,
384 char *buf)
385{
386 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
387 struct ad7280_state *st = iio_priv(indio_dev);
388 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
389
390 return sprintf(buf, "%d\n",
391 !!(st->cb_mask[this_attr->address >> 8] &
392 (1 << ((this_attr->address & 0xFF) + 2))));
393}
394
395static ssize_t ad7280_store_balance_sw(struct device *dev,
396 struct device_attribute *attr,
397 const char *buf,
398 size_t len)
399{
400 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
401 struct ad7280_state *st = iio_priv(indio_dev);
402 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
403 bool readin;
404 int ret;
405 unsigned int devaddr, ch;
406
407 ret = strtobool(buf, &readin);
408 if (ret)
409 return ret;
410
411 devaddr = this_attr->address >> 8;
412 ch = this_attr->address & 0xFF;
413
414 mutex_lock(&st->lock);
415 if (readin)
416 st->cb_mask[devaddr] |= 1 << (ch + 2);
417 else
418 st->cb_mask[devaddr] &= ~(1 << (ch + 2));
419
420 ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE,
421 0, st->cb_mask[devaddr]);
422 mutex_unlock(&st->lock);
423
424 return ret ? ret : len;
425}
426
427static ssize_t ad7280_show_balance_timer(struct device *dev,
428 struct device_attribute *attr,
429 char *buf)
430{
431 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
432 struct ad7280_state *st = iio_priv(indio_dev);
433 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
434 int ret;
435 unsigned int msecs;
436
437 mutex_lock(&st->lock);
438 ret = ad7280_read(st, this_attr->address >> 8,
439 this_attr->address & 0xFF);
440 mutex_unlock(&st->lock);
441
442 if (ret < 0)
443 return ret;
444
445 msecs = (ret >> 3) * 71500;
446
447 return sprintf(buf, "%u\n", msecs);
448}
449
450static ssize_t ad7280_store_balance_timer(struct device *dev,
451 struct device_attribute *attr,
452 const char *buf,
453 size_t len)
454{
455 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
456 struct ad7280_state *st = iio_priv(indio_dev);
457 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
458 unsigned long val;
459 int ret;
460
461 ret = kstrtoul(buf, 10, &val);
462 if (ret)
463 return ret;
464
465 val /= 71500;
466
467 if (val > 31)
468 return -EINVAL;
469
470 mutex_lock(&st->lock);
471 ret = ad7280_write(st, this_attr->address >> 8,
472 this_attr->address & 0xFF,
473 0, (val & 0x1F) << 3);
474 mutex_unlock(&st->lock);
475
476 return ret ? ret : len;
477}
478
479static struct attribute *ad7280_attributes[AD7280A_MAX_CHAIN *
480 AD7280A_CELLS_PER_DEV * 2 + 1];
481
482static const struct attribute_group ad7280_attrs_group = {
483 .attrs = ad7280_attributes,
484};
485
486static int ad7280_channel_init(struct ad7280_state *st)
487{
488 int dev, ch, cnt;
489
490 st->channels = kcalloc((st->slave_num + 1) * 12 + 2,
491 sizeof(*st->channels), GFP_KERNEL);
492 if (!st->channels)
493 return -ENOMEM;
494
495 for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
496 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6;
497 ch++, cnt++) {
498 if (ch < AD7280A_AUX_ADC_1) {
499 st->channels[cnt].type = IIO_VOLTAGE;
500 st->channels[cnt].differential = 1;
501 st->channels[cnt].channel = (dev * 6) + ch;
502 st->channels[cnt].channel2 =
503 st->channels[cnt].channel + 1;
504 } else {
505 st->channels[cnt].type = IIO_TEMP;
506 st->channels[cnt].channel = (dev * 6) + ch - 6;
507 }
508 st->channels[cnt].indexed = 1;
509 st->channels[cnt].info_mask_separate =
510 BIT(IIO_CHAN_INFO_RAW);
511 st->channels[cnt].info_mask_shared_by_type =
512 BIT(IIO_CHAN_INFO_SCALE);
513 st->channels[cnt].address =
514 AD7280A_DEVADDR(dev) << 8 | ch;
515 st->channels[cnt].scan_index = cnt;
516 st->channels[cnt].scan_type.sign = 'u';
517 st->channels[cnt].scan_type.realbits = 12;
518 st->channels[cnt].scan_type.storagebits = 32;
519 st->channels[cnt].scan_type.shift = 0;
520 }
521
522 st->channels[cnt].type = IIO_VOLTAGE;
523 st->channels[cnt].differential = 1;
524 st->channels[cnt].channel = 0;
525 st->channels[cnt].channel2 = dev * 6;
526 st->channels[cnt].address = AD7280A_ALL_CELLS;
527 st->channels[cnt].indexed = 1;
528 st->channels[cnt].info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
529 st->channels[cnt].info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
530 st->channels[cnt].scan_index = cnt;
531 st->channels[cnt].scan_type.sign = 'u';
532 st->channels[cnt].scan_type.realbits = 32;
533 st->channels[cnt].scan_type.storagebits = 32;
534 st->channels[cnt].scan_type.shift = 0;
535 cnt++;
536 st->channels[cnt].type = IIO_TIMESTAMP;
537 st->channels[cnt].channel = -1;
538 st->channels[cnt].scan_index = cnt;
539 st->channels[cnt].scan_type.sign = 's';
540 st->channels[cnt].scan_type.realbits = 64;
541 st->channels[cnt].scan_type.storagebits = 64;
542 st->channels[cnt].scan_type.shift = 0;
543
544 return cnt + 1;
545}
546
547static int ad7280_attr_init(struct ad7280_state *st)
548{
549 int dev, ch, cnt;
550
551 st->iio_attr = kcalloc(2, sizeof(*st->iio_attr) *
552 (st->slave_num + 1) * AD7280A_CELLS_PER_DEV,
553 GFP_KERNEL);
554 if (!st->iio_attr)
555 return -ENOMEM;
556
557 for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
558 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6;
559 ch++, cnt++) {
560 st->iio_attr[cnt].address =
561 AD7280A_DEVADDR(dev) << 8 | ch;
562 st->iio_attr[cnt].dev_attr.attr.mode =
563 0644;
564 st->iio_attr[cnt].dev_attr.show =
565 ad7280_show_balance_sw;
566 st->iio_attr[cnt].dev_attr.store =
567 ad7280_store_balance_sw;
568 st->iio_attr[cnt].dev_attr.attr.name =
569 kasprintf(GFP_KERNEL,
570 "in%d-in%d_balance_switch_en",
571 dev * AD7280A_CELLS_PER_DEV + ch,
572 dev * AD7280A_CELLS_PER_DEV + ch + 1);
573 ad7280_attributes[cnt] =
574 &st->iio_attr[cnt].dev_attr.attr;
575 cnt++;
576 st->iio_attr[cnt].address =
577 AD7280A_DEVADDR(dev) << 8 |
578 (AD7280A_CB1_TIMER + ch);
579 st->iio_attr[cnt].dev_attr.attr.mode =
580 0644;
581 st->iio_attr[cnt].dev_attr.show =
582 ad7280_show_balance_timer;
583 st->iio_attr[cnt].dev_attr.store =
584 ad7280_store_balance_timer;
585 st->iio_attr[cnt].dev_attr.attr.name =
586 kasprintf(GFP_KERNEL,
587 "in%d-in%d_balance_timer",
588 dev * AD7280A_CELLS_PER_DEV + ch,
589 dev * AD7280A_CELLS_PER_DEV + ch + 1);
590 ad7280_attributes[cnt] =
591 &st->iio_attr[cnt].dev_attr.attr;
592 }
593
594 ad7280_attributes[cnt] = NULL;
595
596 return 0;
597}
598
599static ssize_t ad7280_read_channel_config(struct device *dev,
600 struct device_attribute *attr,
601 char *buf)
602{
603 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
604 struct ad7280_state *st = iio_priv(indio_dev);
605 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
606 unsigned int val;
607
608 switch ((u32)this_attr->address) {
609 case AD7280A_CELL_OVERVOLTAGE:
610 val = 1000 + (st->cell_threshhigh * 1568) / 100;
611 break;
612 case AD7280A_CELL_UNDERVOLTAGE:
613 val = 1000 + (st->cell_threshlow * 1568) / 100;
614 break;
615 case AD7280A_AUX_ADC_OVERVOLTAGE:
616 val = (st->aux_threshhigh * 196) / 10;
617 break;
618 case AD7280A_AUX_ADC_UNDERVOLTAGE:
619 val = (st->aux_threshlow * 196) / 10;
620 break;
621 default:
622 return -EINVAL;
623 }
624
625 return sprintf(buf, "%u\n", val);
626}
627
628static ssize_t ad7280_write_channel_config(struct device *dev,
629 struct device_attribute *attr,
630 const char *buf,
631 size_t len)
632{
633 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
634 struct ad7280_state *st = iio_priv(indio_dev);
635 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
636
637 long val;
638 int ret;
639
640 ret = kstrtol(buf, 10, &val);
641 if (ret)
642 return ret;
643
644 switch ((u32)this_attr->address) {
645 case AD7280A_CELL_OVERVOLTAGE:
646 case AD7280A_CELL_UNDERVOLTAGE:
647 val = ((val - 1000) * 100) / 1568;
648 break;
649 case AD7280A_AUX_ADC_OVERVOLTAGE:
650 case AD7280A_AUX_ADC_UNDERVOLTAGE:
651 val = (val * 10) / 196;
652 break;
653 default:
654 return -EFAULT;
655 }
656
657 val = clamp(val, 0L, 0xFFL);
658
659 mutex_lock(&st->lock);
660 switch ((u32)this_attr->address) {
661 case AD7280A_CELL_OVERVOLTAGE:
662 st->cell_threshhigh = val;
663 break;
664 case AD7280A_CELL_UNDERVOLTAGE:
665 st->cell_threshlow = val;
666 break;
667 case AD7280A_AUX_ADC_OVERVOLTAGE:
668 st->aux_threshhigh = val;
669 break;
670 case AD7280A_AUX_ADC_UNDERVOLTAGE:
671 st->aux_threshlow = val;
672 break;
673 }
674
675 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
676 this_attr->address, 1, val);
677
678 mutex_unlock(&st->lock);
679
680 return ret ? ret : len;
681}
682
683static irqreturn_t ad7280_event_handler(int irq, void *private)
684{
685 struct iio_dev *indio_dev = private;
686 struct ad7280_state *st = iio_priv(indio_dev);
687 unsigned int *channels;
688 int i, ret;
689
690 channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL);
691 if (!channels)
692 return IRQ_HANDLED;
693
694 ret = ad7280_read_all_channels(st, st->scan_cnt, channels);
695 if (ret < 0)
696 goto out;
697
698 for (i = 0; i < st->scan_cnt; i++) {
699 if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) {
700 if (((channels[i] >> 11) & 0xFFF) >=
701 st->cell_threshhigh)
702 iio_push_event(indio_dev,
703 IIO_EVENT_CODE(IIO_VOLTAGE,
704 1,
705 0,
706 IIO_EV_DIR_RISING,
707 IIO_EV_TYPE_THRESH,
708 0, 0, 0),
709 iio_get_time_ns(indio_dev));
710 else if (((channels[i] >> 11) & 0xFFF) <=
711 st->cell_threshlow)
712 iio_push_event(indio_dev,
713 IIO_EVENT_CODE(IIO_VOLTAGE,
714 1,
715 0,
716 IIO_EV_DIR_FALLING,
717 IIO_EV_TYPE_THRESH,
718 0, 0, 0),
719 iio_get_time_ns(indio_dev));
720 } else {
721 if (((channels[i] >> 11) & 0xFFF) >= st->aux_threshhigh)
722 iio_push_event(indio_dev,
723 IIO_UNMOD_EVENT_CODE(
724 IIO_TEMP,
725 0,
726 IIO_EV_TYPE_THRESH,
727 IIO_EV_DIR_RISING),
728 iio_get_time_ns(indio_dev));
729 else if (((channels[i] >> 11) & 0xFFF) <=
730 st->aux_threshlow)
731 iio_push_event(indio_dev,
732 IIO_UNMOD_EVENT_CODE(
733 IIO_TEMP,
734 0,
735 IIO_EV_TYPE_THRESH,
736 IIO_EV_DIR_FALLING),
737 iio_get_time_ns(indio_dev));
738 }
739 }
740
741out:
742 kfree(channels);
743
744 return IRQ_HANDLED;
745}
746
747static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value,
748 in_voltage-voltage_thresh_low_value,
749 0644,
750 ad7280_read_channel_config,
751 ad7280_write_channel_config,
752 AD7280A_CELL_UNDERVOLTAGE);
753
754static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value,
755 in_voltage-voltage_thresh_high_value,
756 0644,
757 ad7280_read_channel_config,
758 ad7280_write_channel_config,
759 AD7280A_CELL_OVERVOLTAGE);
760
761static IIO_DEVICE_ATTR(in_temp_thresh_low_value,
762 0644,
763 ad7280_read_channel_config,
764 ad7280_write_channel_config,
765 AD7280A_AUX_ADC_UNDERVOLTAGE);
766
767static IIO_DEVICE_ATTR(in_temp_thresh_high_value,
768 0644,
769 ad7280_read_channel_config,
770 ad7280_write_channel_config,
771 AD7280A_AUX_ADC_OVERVOLTAGE);
772
773static struct attribute *ad7280_event_attributes[] = {
774 &iio_dev_attr_in_thresh_low_value.dev_attr.attr,
775 &iio_dev_attr_in_thresh_high_value.dev_attr.attr,
776 &iio_dev_attr_in_temp_thresh_low_value.dev_attr.attr,
777 &iio_dev_attr_in_temp_thresh_high_value.dev_attr.attr,
778 NULL,
779};
780
781static const struct attribute_group ad7280_event_attrs_group = {
782 .attrs = ad7280_event_attributes,
783};
784
785static int ad7280_read_raw(struct iio_dev *indio_dev,
786 struct iio_chan_spec const *chan,
787 int *val,
788 int *val2,
789 long m)
790{
791 struct ad7280_state *st = iio_priv(indio_dev);
792 int ret;
793
794 switch (m) {
795 case IIO_CHAN_INFO_RAW:
796 mutex_lock(&st->lock);
797 if (chan->address == AD7280A_ALL_CELLS)
798 ret = ad7280_read_all_channels(st, st->scan_cnt, NULL);
799 else
800 ret = ad7280_read_channel(st, chan->address >> 8,
801 chan->address & 0xFF);
802 mutex_unlock(&st->lock);
803
804 if (ret < 0)
805 return ret;
806
807 *val = ret;
808
809 return IIO_VAL_INT;
810 case IIO_CHAN_INFO_SCALE:
811 if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6)
812 *val = 4000;
813 else
814 *val = 5000;
815
816 *val2 = AD7280A_BITS;
817 return IIO_VAL_FRACTIONAL_LOG2;
818 }
819 return -EINVAL;
820}
821
822static const struct iio_info ad7280_info = {
823 .read_raw = ad7280_read_raw,
824 .event_attrs = &ad7280_event_attrs_group,
825 .attrs = &ad7280_attrs_group,
826 .driver_module = THIS_MODULE,
827};
828
829static const struct ad7280_platform_data ad7793_default_pdata = {
830 .acquisition_time = AD7280A_ACQ_TIME_400ns,
831 .conversion_averaging = AD7280A_CONV_AVG_DIS,
832 .thermistor_term_en = true,
833};
834
835static int ad7280_probe(struct spi_device *spi)
836{
837 const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev);
838 struct ad7280_state *st;
839 int ret;
840 const unsigned short tACQ_ns[4] = {465, 1010, 1460, 1890};
841 const unsigned short nAVG[4] = {1, 2, 4, 8};
842 struct iio_dev *indio_dev;
843
844 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
845 if (!indio_dev)
846 return -ENOMEM;
847
848 st = iio_priv(indio_dev);
849 spi_set_drvdata(spi, indio_dev);
850 st->spi = spi;
851 mutex_init(&st->lock);
852
853 if (!pdata)
854 pdata = &ad7793_default_pdata;
855
856 ad7280_crc8_build_table(st->crc_tab);
857
858 st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ;
859 st->spi->mode = SPI_MODE_1;
860 spi_setup(st->spi);
861
862 st->ctrl_lb = AD7280A_CTRL_LB_ACQ_TIME(pdata->acquisition_time & 0x3);
863 st->ctrl_hb = AD7280A_CTRL_HB_CONV_AVG(pdata->conversion_averaging
864 & 0x3) | (pdata->thermistor_term_en ?
865 AD7280A_CTRL_LB_THERMISTOR_EN : 0);
866
867 ret = ad7280_chain_setup(st);
868 if (ret < 0)
869 return ret;
870
871 st->slave_num = ret;
872 st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH;
873 st->cell_threshhigh = 0xFF;
874 st->aux_threshhigh = 0xFF;
875
876
877
878
879
880
881
882
883
884 st->readback_delay_us =
885 ((tACQ_ns[pdata->acquisition_time & 0x3] + 695) *
886 (AD7280A_NUM_CH * nAVG[pdata->conversion_averaging & 0x3]))
887 - tACQ_ns[pdata->acquisition_time & 0x3] +
888 st->slave_num * 250;
889
890
891 st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000);
892 st->readback_delay_us += 5;
893
894 indio_dev->name = spi_get_device_id(spi)->name;
895 indio_dev->dev.parent = &spi->dev;
896 indio_dev->modes = INDIO_DIRECT_MODE;
897
898 ret = ad7280_channel_init(st);
899 if (ret < 0)
900 return ret;
901
902 indio_dev->num_channels = ret;
903 indio_dev->channels = st->channels;
904 indio_dev->info = &ad7280_info;
905
906 ret = ad7280_attr_init(st);
907 if (ret < 0)
908 goto error_free_channels;
909
910 ret = iio_device_register(indio_dev);
911 if (ret)
912 goto error_free_attr;
913
914 if (spi->irq > 0) {
915 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
916 AD7280A_ALERT, 1,
917 AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN);
918 if (ret)
919 goto error_unregister;
920
921 ret = ad7280_write(st, AD7280A_DEVADDR(st->slave_num),
922 AD7280A_ALERT, 0,
923 AD7280A_ALERT_GEN_STATIC_HIGH |
924 (pdata->chain_last_alert_ignore & 0xF));
925 if (ret)
926 goto error_unregister;
927
928 ret = request_threaded_irq(spi->irq,
929 NULL,
930 ad7280_event_handler,
931 IRQF_TRIGGER_FALLING |
932 IRQF_ONESHOT,
933 indio_dev->name,
934 indio_dev);
935 if (ret)
936 goto error_unregister;
937 }
938
939 return 0;
940error_unregister:
941 iio_device_unregister(indio_dev);
942
943error_free_attr:
944 kfree(st->iio_attr);
945
946error_free_channels:
947 kfree(st->channels);
948
949 return ret;
950}
951
952static int ad7280_remove(struct spi_device *spi)
953{
954 struct iio_dev *indio_dev = spi_get_drvdata(spi);
955 struct ad7280_state *st = iio_priv(indio_dev);
956
957 if (spi->irq > 0)
958 free_irq(spi->irq, indio_dev);
959 iio_device_unregister(indio_dev);
960
961 ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
962 AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb);
963
964 kfree(st->channels);
965 kfree(st->iio_attr);
966
967 return 0;
968}
969
970static const struct spi_device_id ad7280_id[] = {
971 {"ad7280a", 0},
972 {}
973};
974MODULE_DEVICE_TABLE(spi, ad7280_id);
975
976static struct spi_driver ad7280_driver = {
977 .driver = {
978 .name = "ad7280",
979 },
980 .probe = ad7280_probe,
981 .remove = ad7280_remove,
982 .id_table = ad7280_id,
983};
984module_spi_driver(ad7280_driver);
985
986MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
987MODULE_DESCRIPTION("Analog Devices AD7280A");
988MODULE_LICENSE("GPL v2");
989
