LXR linux/drivers/staging/sm750fb/ddk750

   1#ifndef DDK750_CHIP_H__
   2#define DDK750_CHIP_H__
   3#define DEFAULT_INPUT_CLOCK 14318181 /* Default reference clock */
   4#ifndef SM750LE_REVISION_ID
   5#define SM750LE_REVISION_ID ((unsigned char)0xfe)
   6#endif
   7
   8#include <linux/io.h>
   9#include <linux/ioport.h>
  10#include <linux/uaccess.h>
  11
  12extern void __iomem *mmio750;
  13
  14/* software control endianness */
  15static inline u32 peek32(u32 addr)
  16{
  17        return readl(addr + mmio750);
  18}
  19
  20static inline void poke32(u32 data, u32 addr)
  21{
  22        writel(data, addr + mmio750);
  23}
  24
  25/* This is all the chips recognized by this library */
  26typedef enum _logical_chip_type_t {
  27        SM_UNKNOWN,
  28        SM718,
  29        SM750,
  30        SM750LE,
  31}
  32logical_chip_type_t;
  33
  34typedef enum _clock_type_t {
  35        MXCLK_PLL,
  36        PRIMARY_PLL,
  37        SECONDARY_PLL,
  38        VGA0_PLL,
  39        VGA1_PLL,
  40}
  41clock_type_t;
  42
  43struct pll_value {
  44        clock_type_t clockType;
  45        unsigned long inputFreq; /* Input clock frequency to the PLL */
  46
  47        /* Use this when clockType = PANEL_PLL */
  48        unsigned long M;
  49        unsigned long N;
  50        unsigned long OD;
  51        unsigned long POD;
  52};
  53
  54/* input struct to initChipParam() function */
  55struct initchip_param {
  56        /* Use power mode 0 or 1 */
  57        unsigned short powerMode;
  58
  59        /*
  60         * Speed of main chip clock in MHz unit
  61         * 0 = keep the current clock setting
  62         * Others = the new main chip clock
  63         */
  64        unsigned short chipClock;
  65
  66        /*
  67         * Speed of memory clock in MHz unit
  68         * 0 = keep the current clock setting
  69         * Others = the new memory clock
  70         */
  71        unsigned short memClock;
  72
  73        /*
  74         * Speed of master clock in MHz unit
  75         * 0 = keep the current clock setting
  76         * Others = the new master clock
  77         */
  78        unsigned short masterClock;
  79
  80        /*
  81         * 0 = leave all engine state untouched.
  82         * 1 = make sure they are off: 2D, Overlay,
  83         * video alpha, alpha, hardware cursors
  84         */
  85        unsigned short setAllEngOff;
  86
  87        /*
  88         * 0 = Do not reset the memory controller
  89         * 1 = Reset the memory controller
  90         */
  91        unsigned char resetMemory;
  92
  93        /* More initialization parameter can be added if needed */
  94};
  95
  96logical_chip_type_t sm750_get_chip_type(void);
  97void sm750_set_chip_type(unsigned short devId, u8 revId);
  98unsigned int sm750_calc_pll_value(unsigned int request, struct  pll_value *pll);
  99unsigned int sm750_format_pll_reg(struct pll_value *pPLL);
 100unsigned int ddk750_get_vm_size(void);
 101int ddk750_init_hw(struct initchip_param *pinit_param);
 102
 103#endif
 104