linux/drivers/thermal/rockchip_thermal.c
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   1/*
   2 * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
   3 * Caesar Wang <wxt@rock-chips.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms and conditions of the GNU General Public License,
   7 * version 2, as published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 */
  14
  15#include <linux/clk.h>
  16#include <linux/delay.h>
  17#include <linux/interrupt.h>
  18#include <linux/io.h>
  19#include <linux/module.h>
  20#include <linux/of.h>
  21#include <linux/of_address.h>
  22#include <linux/of_irq.h>
  23#include <linux/platform_device.h>
  24#include <linux/regmap.h>
  25#include <linux/reset.h>
  26#include <linux/thermal.h>
  27#include <linux/mfd/syscon.h>
  28#include <linux/pinctrl/consumer.h>
  29
  30/**
  31 * If the temperature over a period of time High,
  32 * the resulting TSHUT gave CRU module,let it reset the entire chip,
  33 * or via GPIO give PMIC.
  34 */
  35enum tshut_mode {
  36        TSHUT_MODE_CRU = 0,
  37        TSHUT_MODE_GPIO,
  38};
  39
  40/**
  41 * The system Temperature Sensors tshut(tshut) polarity
  42 * the bit 8 is tshut polarity.
  43 * 0: low active, 1: high active
  44 */
  45enum tshut_polarity {
  46        TSHUT_LOW_ACTIVE = 0,
  47        TSHUT_HIGH_ACTIVE,
  48};
  49
  50/**
  51 * The system has two Temperature Sensors.
  52 * sensor0 is for CPU, and sensor1 is for GPU.
  53 */
  54enum sensor_id {
  55        SENSOR_CPU = 0,
  56        SENSOR_GPU,
  57};
  58
  59/**
  60 * The conversion table has the adc value and temperature.
  61 * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
  62 * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
  63 */
  64enum adc_sort_mode {
  65        ADC_DECREMENT = 0,
  66        ADC_INCREMENT,
  67};
  68
  69/**
  70 * The max sensors is two in rockchip SoCs.
  71 * Two sensors: CPU and GPU sensor.
  72 */
  73#define SOC_MAX_SENSORS 2
  74
  75/**
  76 * struct chip_tsadc_table - hold information about chip-specific differences
  77 * @id: conversion table
  78 * @length: size of conversion table
  79 * @data_mask: mask to apply on data inputs
  80 * @mode: sort mode of this adc variant (incrementing or decrementing)
  81 */
  82struct chip_tsadc_table {
  83        const struct tsadc_table *id;
  84        unsigned int length;
  85        u32 data_mask;
  86        enum adc_sort_mode mode;
  87};
  88
  89/**
  90 * struct rockchip_tsadc_chip - hold the private data of tsadc chip
  91 * @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel
  92 * @chn_num: the channel number of tsadc chip
  93 * @tshut_temp: the hardware-controlled shutdown temperature value
  94 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
  95 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
  96 * @initialize: SoC special initialize tsadc controller method
  97 * @irq_ack: clear the interrupt
  98 * @get_temp: get the temperature
  99 * @set_alarm_temp: set the high temperature interrupt
 100 * @set_tshut_temp: set the hardware-controlled shutdown temperature
 101 * @set_tshut_mode: set the hardware-controlled shutdown mode
 102 * @table: the chip-specific conversion table
 103 */
 104struct rockchip_tsadc_chip {
 105        /* The sensor id of chip correspond to the ADC channel */
 106        int chn_id[SOC_MAX_SENSORS];
 107        int chn_num;
 108
 109        /* The hardware-controlled tshut property */
 110        int tshut_temp;
 111        enum tshut_mode tshut_mode;
 112        enum tshut_polarity tshut_polarity;
 113
 114        /* Chip-wide methods */
 115        void (*initialize)(struct regmap *grf,
 116                           void __iomem *reg, enum tshut_polarity p);
 117        void (*irq_ack)(void __iomem *reg);
 118        void (*control)(void __iomem *reg, bool on);
 119
 120        /* Per-sensor methods */
 121        int (*get_temp)(const struct chip_tsadc_table *table,
 122                        int chn, void __iomem *reg, int *temp);
 123        int (*set_alarm_temp)(const struct chip_tsadc_table *table,
 124                              int chn, void __iomem *reg, int temp);
 125        int (*set_tshut_temp)(const struct chip_tsadc_table *table,
 126                              int chn, void __iomem *reg, int temp);
 127        void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
 128
 129        /* Per-table methods */
 130        struct chip_tsadc_table table;
 131};
 132
 133/**
 134 * struct rockchip_thermal_sensor - hold the information of thermal sensor
 135 * @thermal:  pointer to the platform/configuration data
 136 * @tzd: pointer to a thermal zone
 137 * @id: identifier of the thermal sensor
 138 */
 139struct rockchip_thermal_sensor {
 140        struct rockchip_thermal_data *thermal;
 141        struct thermal_zone_device *tzd;
 142        int id;
 143};
 144
 145/**
 146 * struct rockchip_thermal_data - hold the private data of thermal driver
 147 * @chip: pointer to the platform/configuration data
 148 * @pdev: platform device of thermal
 149 * @reset: the reset controller of tsadc
 150 * @sensors[SOC_MAX_SENSORS]: the thermal sensor
 151 * @clk: the controller clock is divided by the exteral 24MHz
 152 * @pclk: the advanced peripherals bus clock
 153 * @grf: the general register file will be used to do static set by software
 154 * @regs: the base address of tsadc controller
 155 * @tshut_temp: the hardware-controlled shutdown temperature value
 156 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
 157 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
 158 */
 159struct rockchip_thermal_data {
 160        const struct rockchip_tsadc_chip *chip;
 161        struct platform_device *pdev;
 162        struct reset_control *reset;
 163
 164        struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
 165
 166        struct clk *clk;
 167        struct clk *pclk;
 168
 169        struct regmap *grf;
 170        void __iomem *regs;
 171
 172        int tshut_temp;
 173        enum tshut_mode tshut_mode;
 174        enum tshut_polarity tshut_polarity;
 175};
 176
 177/**
 178 * TSADC Sensor Register description:
 179 *
 180 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
 181 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
 182 *
 183 */
 184#define TSADCV2_USER_CON                        0x00
 185#define TSADCV2_AUTO_CON                        0x04
 186#define TSADCV2_INT_EN                          0x08
 187#define TSADCV2_INT_PD                          0x0c
 188#define TSADCV2_DATA(chn)                       (0x20 + (chn) * 0x04)
 189#define TSADCV2_COMP_INT(chn)                   (0x30 + (chn) * 0x04)
 190#define TSADCV2_COMP_SHUT(chn)                  (0x40 + (chn) * 0x04)
 191#define TSADCV2_HIGHT_INT_DEBOUNCE              0x60
 192#define TSADCV2_HIGHT_TSHUT_DEBOUNCE            0x64
 193#define TSADCV2_AUTO_PERIOD                     0x68
 194#define TSADCV2_AUTO_PERIOD_HT                  0x6c
 195
 196#define TSADCV2_AUTO_EN                         BIT(0)
 197#define TSADCV2_AUTO_SRC_EN(chn)                BIT(4 + (chn))
 198#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH        BIT(8)
 199
 200#define TSADCV3_AUTO_Q_SEL_EN                   BIT(1)
 201
 202#define TSADCV2_INT_SRC_EN(chn)                 BIT(chn)
 203#define TSADCV2_SHUT_2GPIO_SRC_EN(chn)          BIT(4 + (chn))
 204#define TSADCV2_SHUT_2CRU_SRC_EN(chn)           BIT(8 + (chn))
 205
 206#define TSADCV2_INT_PD_CLEAR_MASK               ~BIT(8)
 207#define TSADCV3_INT_PD_CLEAR_MASK               ~BIT(16)
 208
 209#define TSADCV2_DATA_MASK                       0xfff
 210#define TSADCV3_DATA_MASK                       0x3ff
 211
 212#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT        4
 213#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT      4
 214#define TSADCV2_AUTO_PERIOD_TIME                250 /* 250ms */
 215#define TSADCV2_AUTO_PERIOD_HT_TIME             50  /* 50ms */
 216#define TSADCV3_AUTO_PERIOD_TIME                1875 /* 2.5ms */
 217#define TSADCV3_AUTO_PERIOD_HT_TIME             1875 /* 2.5ms */
 218
 219#define TSADCV2_USER_INTER_PD_SOC               0x340 /* 13 clocks */
 220
 221#define GRF_SARADC_TESTBIT                      0x0e644
 222#define GRF_TSADC_TESTBIT_L                     0x0e648
 223#define GRF_TSADC_TESTBIT_H                     0x0e64c
 224
 225#define GRF_SARADC_TESTBIT_ON                   (0x10001 << 2)
 226#define GRF_TSADC_TESTBIT_H_ON                  (0x10001 << 2)
 227#define GRF_TSADC_VCM_EN_L                      (0x10001 << 7)
 228#define GRF_TSADC_VCM_EN_H                      (0x10001 << 7)
 229
 230/**
 231 * struct tsadc_table - code to temperature conversion table
 232 * @code: the value of adc channel
 233 * @temp: the temperature
 234 * Note:
 235 * code to temperature mapping of the temperature sensor is a piece wise linear
 236 * curve.Any temperature, code faling between to 2 give temperatures can be
 237 * linearly interpolated.
 238 * Code to Temperature mapping should be updated based on manufacturer results.
 239 */
 240struct tsadc_table {
 241        u32 code;
 242        int temp;
 243};
 244
 245static const struct tsadc_table rk3228_code_table[] = {
 246        {0, -40000},
 247        {588, -40000},
 248        {593, -35000},
 249        {598, -30000},
 250        {603, -25000},
 251        {608, -20000},
 252        {613, -15000},
 253        {618, -10000},
 254        {623, -5000},
 255        {629, 0},
 256        {634, 5000},
 257        {639, 10000},
 258        {644, 15000},
 259        {649, 20000},
 260        {654, 25000},
 261        {660, 30000},
 262        {665, 35000},
 263        {670, 40000},
 264        {675, 45000},
 265        {681, 50000},
 266        {686, 55000},
 267        {691, 60000},
 268        {696, 65000},
 269        {702, 70000},
 270        {707, 75000},
 271        {712, 80000},
 272        {717, 85000},
 273        {723, 90000},
 274        {728, 95000},
 275        {733, 100000},
 276        {738, 105000},
 277        {744, 110000},
 278        {749, 115000},
 279        {754, 120000},
 280        {760, 125000},
 281        {TSADCV2_DATA_MASK, 125000},
 282};
 283
 284static const struct tsadc_table rk3288_code_table[] = {
 285        {TSADCV2_DATA_MASK, -40000},
 286        {3800, -40000},
 287        {3792, -35000},
 288        {3783, -30000},
 289        {3774, -25000},
 290        {3765, -20000},
 291        {3756, -15000},
 292        {3747, -10000},
 293        {3737, -5000},
 294        {3728, 0},
 295        {3718, 5000},
 296        {3708, 10000},
 297        {3698, 15000},
 298        {3688, 20000},
 299        {3678, 25000},
 300        {3667, 30000},
 301        {3656, 35000},
 302        {3645, 40000},
 303        {3634, 45000},
 304        {3623, 50000},
 305        {3611, 55000},
 306        {3600, 60000},
 307        {3588, 65000},
 308        {3575, 70000},
 309        {3563, 75000},
 310        {3550, 80000},
 311        {3537, 85000},
 312        {3524, 90000},
 313        {3510, 95000},
 314        {3496, 100000},
 315        {3482, 105000},
 316        {3467, 110000},
 317        {3452, 115000},
 318        {3437, 120000},
 319        {3421, 125000},
 320        {0, 125000},
 321};
 322
 323static const struct tsadc_table rk3368_code_table[] = {
 324        {0, -40000},
 325        {106, -40000},
 326        {108, -35000},
 327        {110, -30000},
 328        {112, -25000},
 329        {114, -20000},
 330        {116, -15000},
 331        {118, -10000},
 332        {120, -5000},
 333        {122, 0},
 334        {124, 5000},
 335        {126, 10000},
 336        {128, 15000},
 337        {130, 20000},
 338        {132, 25000},
 339        {134, 30000},
 340        {136, 35000},
 341        {138, 40000},
 342        {140, 45000},
 343        {142, 50000},
 344        {144, 55000},
 345        {146, 60000},
 346        {148, 65000},
 347        {150, 70000},
 348        {152, 75000},
 349        {154, 80000},
 350        {156, 85000},
 351        {158, 90000},
 352        {160, 95000},
 353        {162, 100000},
 354        {163, 105000},
 355        {165, 110000},
 356        {167, 115000},
 357        {169, 120000},
 358        {171, 125000},
 359        {TSADCV3_DATA_MASK, 125000},
 360};
 361
 362static const struct tsadc_table rk3399_code_table[] = {
 363        {0, -40000},
 364        {402, -40000},
 365        {410, -35000},
 366        {419, -30000},
 367        {427, -25000},
 368        {436, -20000},
 369        {444, -15000},
 370        {453, -10000},
 371        {461, -5000},
 372        {470, 0},
 373        {478, 5000},
 374        {487, 10000},
 375        {496, 15000},
 376        {504, 20000},
 377        {513, 25000},
 378        {521, 30000},
 379        {530, 35000},
 380        {538, 40000},
 381        {547, 45000},
 382        {555, 50000},
 383        {564, 55000},
 384        {573, 60000},
 385        {581, 65000},
 386        {590, 70000},
 387        {599, 75000},
 388        {607, 80000},
 389        {616, 85000},
 390        {624, 90000},
 391        {633, 95000},
 392        {642, 100000},
 393        {650, 105000},
 394        {659, 110000},
 395        {668, 115000},
 396        {677, 120000},
 397        {685, 125000},
 398        {TSADCV3_DATA_MASK, 125000},
 399};
 400
 401static u32 rk_tsadcv2_temp_to_code(const struct chip_tsadc_table *table,
 402                                   int temp)
 403{
 404        int high, low, mid;
 405        unsigned long num;
 406        unsigned int denom;
 407        u32 error = table->data_mask;
 408
 409        low = 0;
 410        high = (table->length - 1) - 1; /* ignore the last check for table */
 411        mid = (high + low) / 2;
 412
 413        /* Return mask code data when the temp is over table range */
 414        if (temp < table->id[low].temp || temp > table->id[high].temp)
 415                goto exit;
 416
 417        while (low <= high) {
 418                if (temp == table->id[mid].temp)
 419                        return table->id[mid].code;
 420                else if (temp < table->id[mid].temp)
 421                        high = mid - 1;
 422                else
 423                        low = mid + 1;
 424                mid = (low + high) / 2;
 425        }
 426
 427        /*
 428         * The conversion code granularity provided by the table. Let's
 429         * assume that the relationship between temperature and
 430         * analog value between 2 table entries is linear and interpolate
 431         * to produce less granular result.
 432         */
 433        num = abs(table->id[mid + 1].code - table->id[mid].code);
 434        num *= temp - table->id[mid].temp;
 435        denom = table->id[mid + 1].temp - table->id[mid].temp;
 436
 437        switch (table->mode) {
 438        case ADC_DECREMENT:
 439                return table->id[mid].code - (num / denom);
 440        case ADC_INCREMENT:
 441                return table->id[mid].code + (num / denom);
 442        default:
 443                pr_err("%s: unknown table mode: %d\n", __func__, table->mode);
 444                return error;
 445        }
 446
 447exit:
 448        pr_err("%s: invalid temperature, temp=%d error=%d\n",
 449               __func__, temp, error);
 450        return error;
 451}
 452
 453static int rk_tsadcv2_code_to_temp(const struct chip_tsadc_table *table,
 454                                   u32 code, int *temp)
 455{
 456        unsigned int low = 1;
 457        unsigned int high = table->length - 1;
 458        unsigned int mid = (low + high) / 2;
 459        unsigned int num;
 460        unsigned long denom;
 461
 462        WARN_ON(table->length < 2);
 463
 464        switch (table->mode) {
 465        case ADC_DECREMENT:
 466                code &= table->data_mask;
 467                if (code <= table->id[high].code)
 468                        return -EAGAIN;         /* Incorrect reading */
 469
 470                while (low <= high) {
 471                        if (code >= table->id[mid].code &&
 472                            code < table->id[mid - 1].code)
 473                                break;
 474                        else if (code < table->id[mid].code)
 475                                low = mid + 1;
 476                        else
 477                                high = mid - 1;
 478
 479                        mid = (low + high) / 2;
 480                }
 481                break;
 482        case ADC_INCREMENT:
 483                code &= table->data_mask;
 484                if (code < table->id[low].code)
 485                        return -EAGAIN;         /* Incorrect reading */
 486
 487                while (low <= high) {
 488                        if (code <= table->id[mid].code &&
 489                            code > table->id[mid - 1].code)
 490                                break;
 491                        else if (code > table->id[mid].code)
 492                                low = mid + 1;
 493                        else
 494                                high = mid - 1;
 495
 496                        mid = (low + high) / 2;
 497                }
 498                break;
 499        default:
 500                pr_err("%s: unknown table mode: %d\n", __func__, table->mode);
 501                return -EINVAL;
 502        }
 503
 504        /*
 505         * The 5C granularity provided by the table is too much. Let's
 506         * assume that the relationship between sensor readings and
 507         * temperature between 2 table entries is linear and interpolate
 508         * to produce less granular result.
 509         */
 510        num = table->id[mid].temp - table->id[mid - 1].temp;
 511        num *= abs(table->id[mid - 1].code - code);
 512        denom = abs(table->id[mid - 1].code - table->id[mid].code);
 513        *temp = table->id[mid - 1].temp + (num / denom);
 514
 515        return 0;
 516}
 517
 518/**
 519 * rk_tsadcv2_initialize - initialize TASDC Controller.
 520 *
 521 * (1) Set TSADC_V2_AUTO_PERIOD:
 522 *     Configure the interleave between every two accessing of
 523 *     TSADC in normal operation.
 524 *
 525 * (2) Set TSADCV2_AUTO_PERIOD_HT:
 526 *     Configure the interleave between every two accessing of
 527 *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
 528 *
 529 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
 530 *     If the temperature is higher than COMP_INT or COMP_SHUT for
 531 *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
 532 */
 533static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
 534                                  enum tshut_polarity tshut_polarity)
 535{
 536        if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 537                writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 538                               regs + TSADCV2_AUTO_CON);
 539        else
 540                writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 541                               regs + TSADCV2_AUTO_CON);
 542
 543        writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 544        writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 545                       regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 546        writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 547                       regs + TSADCV2_AUTO_PERIOD_HT);
 548        writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 549                       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 550}
 551
 552/**
 553 * rk_tsadcv3_initialize - initialize TASDC Controller.
 554 *
 555 * (1) The tsadc control power sequence.
 556 *
 557 * (2) Set TSADC_V2_AUTO_PERIOD:
 558 *     Configure the interleave between every two accessing of
 559 *     TSADC in normal operation.
 560 *
 561 * (2) Set TSADCV2_AUTO_PERIOD_HT:
 562 *     Configure the interleave between every two accessing of
 563 *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
 564 *
 565 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
 566 *     If the temperature is higher than COMP_INT or COMP_SHUT for
 567 *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
 568 */
 569static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
 570                                  enum tshut_polarity tshut_polarity)
 571{
 572        /* The tsadc control power sequence */
 573        if (IS_ERR(grf)) {
 574                /* Set interleave value to workround ic time sync issue */
 575                writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
 576                               TSADCV2_USER_CON);
 577
 578                writel_relaxed(TSADCV2_AUTO_PERIOD_TIME,
 579                               regs + TSADCV2_AUTO_PERIOD);
 580                writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 581                               regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 582                writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 583                               regs + TSADCV2_AUTO_PERIOD_HT);
 584                writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 585                               regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 586
 587        } else {
 588                /* Enable the voltage common mode feature */
 589                regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L);
 590                regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H);
 591
 592                usleep_range(15, 100); /* The spec note says at least 15 us */
 593                regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
 594                regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
 595                usleep_range(90, 200); /* The spec note says at least 90 us */
 596
 597                writel_relaxed(TSADCV3_AUTO_PERIOD_TIME,
 598                               regs + TSADCV2_AUTO_PERIOD);
 599                writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 600                               regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 601                writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
 602                               regs + TSADCV2_AUTO_PERIOD_HT);
 603                writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 604                               regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 605        }
 606
 607        if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 608                writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 609                               regs + TSADCV2_AUTO_CON);
 610        else
 611                writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 612                               regs + TSADCV2_AUTO_CON);
 613}
 614
 615static void rk_tsadcv2_irq_ack(void __iomem *regs)
 616{
 617        u32 val;
 618
 619        val = readl_relaxed(regs + TSADCV2_INT_PD);
 620        writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 621}
 622
 623static void rk_tsadcv3_irq_ack(void __iomem *regs)
 624{
 625        u32 val;
 626
 627        val = readl_relaxed(regs + TSADCV2_INT_PD);
 628        writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 629}
 630
 631static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 632{
 633        u32 val;
 634
 635        val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 636        if (enable)
 637                val |= TSADCV2_AUTO_EN;
 638        else
 639                val &= ~TSADCV2_AUTO_EN;
 640
 641        writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 642}
 643
 644/**
 645 * rk_tsadcv3_control - the tsadc controller is enabled or disabled.
 646 *
 647 * NOTE: TSADC controller works at auto mode, and some SoCs need set the
 648 * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output
 649 * adc value if setting this bit to enable.
 650 */
 651static void rk_tsadcv3_control(void __iomem *regs, bool enable)
 652{
 653        u32 val;
 654
 655        val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 656        if (enable)
 657                val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
 658        else
 659                val &= ~TSADCV2_AUTO_EN;
 660
 661        writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 662}
 663
 664static int rk_tsadcv2_get_temp(const struct chip_tsadc_table *table,
 665                               int chn, void __iomem *regs, int *temp)
 666{
 667        u32 val;
 668
 669        val = readl_relaxed(regs + TSADCV2_DATA(chn));
 670
 671        return rk_tsadcv2_code_to_temp(table, val, temp);
 672}
 673
 674static int rk_tsadcv2_alarm_temp(const struct chip_tsadc_table *table,
 675                                 int chn, void __iomem *regs, int temp)
 676{
 677        u32 alarm_value;
 678        u32 int_en, int_clr;
 679
 680        /*
 681         * In some cases, some sensors didn't need the trip points, the
 682         * set_trips will pass {-INT_MAX, INT_MAX} to trigger tsadc alarm
 683         * in the end, ignore this case and disable the high temperature
 684         * interrupt.
 685         */
 686        if (temp == INT_MAX) {
 687                int_clr = readl_relaxed(regs + TSADCV2_INT_EN);
 688                int_clr &= ~TSADCV2_INT_SRC_EN(chn);
 689                writel_relaxed(int_clr, regs + TSADCV2_INT_EN);
 690                return 0;
 691        }
 692
 693        /* Make sure the value is valid */
 694        alarm_value = rk_tsadcv2_temp_to_code(table, temp);
 695        if (alarm_value == table->data_mask)
 696                return -ERANGE;
 697
 698        writel_relaxed(alarm_value & table->data_mask,
 699                       regs + TSADCV2_COMP_INT(chn));
 700
 701        int_en = readl_relaxed(regs + TSADCV2_INT_EN);
 702        int_en |= TSADCV2_INT_SRC_EN(chn);
 703        writel_relaxed(int_en, regs + TSADCV2_INT_EN);
 704
 705        return 0;
 706}
 707
 708static int rk_tsadcv2_tshut_temp(const struct chip_tsadc_table *table,
 709                                 int chn, void __iomem *regs, int temp)
 710{
 711        u32 tshut_value, val;
 712
 713        /* Make sure the value is valid */
 714        tshut_value = rk_tsadcv2_temp_to_code(table, temp);
 715        if (tshut_value == table->data_mask)
 716                return -ERANGE;
 717
 718        writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 719
 720        /* TSHUT will be valid */
 721        val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 722        writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 723
 724        return 0;
 725}
 726
 727static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 728                                  enum tshut_mode mode)
 729{
 730        u32 val;
 731
 732        val = readl_relaxed(regs + TSADCV2_INT_EN);
 733        if (mode == TSHUT_MODE_GPIO) {
 734                val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
 735                val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 736        } else {
 737                val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 738                val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
 739        }
 740
 741        writel_relaxed(val, regs + TSADCV2_INT_EN);
 742}
 743
 744static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
 745        .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 746        .chn_num = 1, /* one channel for tsadc */
 747
 748        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 749        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 750        .tshut_temp = 95000,
 751
 752        .initialize = rk_tsadcv2_initialize,
 753        .irq_ack = rk_tsadcv3_irq_ack,
 754        .control = rk_tsadcv3_control,
 755        .get_temp = rk_tsadcv2_get_temp,
 756        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 757        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 758        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 759
 760        .table = {
 761                .id = rk3228_code_table,
 762                .length = ARRAY_SIZE(rk3228_code_table),
 763                .data_mask = TSADCV3_DATA_MASK,
 764                .mode = ADC_INCREMENT,
 765        },
 766};
 767
 768static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 769        .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
 770        .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
 771        .chn_num = 2, /* two channels for tsadc */
 772
 773        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 774        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 775        .tshut_temp = 95000,
 776
 777        .initialize = rk_tsadcv2_initialize,
 778        .irq_ack = rk_tsadcv2_irq_ack,
 779        .control = rk_tsadcv2_control,
 780        .get_temp = rk_tsadcv2_get_temp,
 781        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 782        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 783        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 784
 785        .table = {
 786                .id = rk3288_code_table,
 787                .length = ARRAY_SIZE(rk3288_code_table),
 788                .data_mask = TSADCV2_DATA_MASK,
 789                .mode = ADC_DECREMENT,
 790        },
 791};
 792
 793static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
 794        .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 795        .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 796        .chn_num = 2, /* two channels for tsadc */
 797
 798        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 799        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 800        .tshut_temp = 95000,
 801
 802        .initialize = rk_tsadcv3_initialize,
 803        .irq_ack = rk_tsadcv3_irq_ack,
 804        .control = rk_tsadcv3_control,
 805        .get_temp = rk_tsadcv2_get_temp,
 806        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 807        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 808        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 809
 810        .table = {
 811                .id = rk3228_code_table,
 812                .length = ARRAY_SIZE(rk3228_code_table),
 813                .data_mask = TSADCV3_DATA_MASK,
 814                .mode = ADC_INCREMENT,
 815        },
 816};
 817
 818static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 819        .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 820        .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 821        .chn_num = 2, /* two channels for tsadc */
 822
 823        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 824        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 825        .tshut_temp = 95000,
 826
 827        .initialize = rk_tsadcv2_initialize,
 828        .irq_ack = rk_tsadcv2_irq_ack,
 829        .control = rk_tsadcv2_control,
 830        .get_temp = rk_tsadcv2_get_temp,
 831        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 832        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 833        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 834
 835        .table = {
 836                .id = rk3368_code_table,
 837                .length = ARRAY_SIZE(rk3368_code_table),
 838                .data_mask = TSADCV3_DATA_MASK,
 839                .mode = ADC_INCREMENT,
 840        },
 841};
 842
 843static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
 844        .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 845        .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 846        .chn_num = 2, /* two channels for tsadc */
 847
 848        .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 849        .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 850        .tshut_temp = 95000,
 851
 852        .initialize = rk_tsadcv3_initialize,
 853        .irq_ack = rk_tsadcv3_irq_ack,
 854        .control = rk_tsadcv3_control,
 855        .get_temp = rk_tsadcv2_get_temp,
 856        .set_alarm_temp = rk_tsadcv2_alarm_temp,
 857        .set_tshut_temp = rk_tsadcv2_tshut_temp,
 858        .set_tshut_mode = rk_tsadcv2_tshut_mode,
 859
 860        .table = {
 861                .id = rk3399_code_table,
 862                .length = ARRAY_SIZE(rk3399_code_table),
 863                .data_mask = TSADCV3_DATA_MASK,
 864                .mode = ADC_INCREMENT,
 865        },
 866};
 867
 868static const struct of_device_id of_rockchip_thermal_match[] = {
 869        {
 870                .compatible = "rockchip,rk3228-tsadc",
 871                .data = (void *)&rk3228_tsadc_data,
 872        },
 873        {
 874                .compatible = "rockchip,rk3288-tsadc",
 875                .data = (void *)&rk3288_tsadc_data,
 876        },
 877        {
 878                .compatible = "rockchip,rk3366-tsadc",
 879                .data = (void *)&rk3366_tsadc_data,
 880        },
 881        {
 882                .compatible = "rockchip,rk3368-tsadc",
 883                .data = (void *)&rk3368_tsadc_data,
 884        },
 885        {
 886                .compatible = "rockchip,rk3399-tsadc",
 887                .data = (void *)&rk3399_tsadc_data,
 888        },
 889        { /* end */ },
 890};
 891MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
 892
 893static void
 894rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
 895{
 896        struct thermal_zone_device *tzd = sensor->tzd;
 897
 898        tzd->ops->set_mode(tzd,
 899                on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
 900}
 901
 902static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 903{
 904        struct rockchip_thermal_data *thermal = dev;
 905        int i;
 906
 907        dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
 908
 909        thermal->chip->irq_ack(thermal->regs);
 910
 911        for (i = 0; i < thermal->chip->chn_num; i++)
 912                thermal_zone_device_update(thermal->sensors[i].tzd,
 913                                           THERMAL_EVENT_UNSPECIFIED);
 914
 915        return IRQ_HANDLED;
 916}
 917
 918static int rockchip_thermal_set_trips(void *_sensor, int low, int high)
 919{
 920        struct rockchip_thermal_sensor *sensor = _sensor;
 921        struct rockchip_thermal_data *thermal = sensor->thermal;
 922        const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 923
 924        dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n",
 925                __func__, sensor->id, low, high);
 926
 927        return tsadc->set_alarm_temp(&tsadc->table,
 928                                     sensor->id, thermal->regs, high);
 929}
 930
 931static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
 932{
 933        struct rockchip_thermal_sensor *sensor = _sensor;
 934        struct rockchip_thermal_data *thermal = sensor->thermal;
 935        const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
 936        int retval;
 937
 938        retval = tsadc->get_temp(&tsadc->table,
 939                                 sensor->id, thermal->regs, out_temp);
 940        dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
 941                sensor->id, *out_temp, retval);
 942
 943        return retval;
 944}
 945
 946static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
 947        .get_temp = rockchip_thermal_get_temp,
 948        .set_trips = rockchip_thermal_set_trips,
 949};
 950
 951static int rockchip_configure_from_dt(struct device *dev,
 952                                      struct device_node *np,
 953                                      struct rockchip_thermal_data *thermal)
 954{
 955        u32 shut_temp, tshut_mode, tshut_polarity;
 956
 957        if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
 958                dev_warn(dev,
 959                         "Missing tshut temp property, using default %d\n",
 960                         thermal->chip->tshut_temp);
 961                thermal->tshut_temp = thermal->chip->tshut_temp;
 962        } else {
 963                if (shut_temp > INT_MAX) {
 964                        dev_err(dev, "Invalid tshut temperature specified: %d\n",
 965                                shut_temp);
 966                        return -ERANGE;
 967                }
 968                thermal->tshut_temp = shut_temp;
 969        }
 970
 971        if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
 972                dev_warn(dev,
 973                         "Missing tshut mode property, using default (%s)\n",
 974                         thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
 975                                "gpio" : "cru");
 976                thermal->tshut_mode = thermal->chip->tshut_mode;
 977        } else {
 978                thermal->tshut_mode = tshut_mode;
 979        }
 980
 981        if (thermal->tshut_mode > 1) {
 982                dev_err(dev, "Invalid tshut mode specified: %d\n",
 983                        thermal->tshut_mode);
 984                return -EINVAL;
 985        }
 986
 987        if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
 988                                 &tshut_polarity)) {
 989                dev_warn(dev,
 990                         "Missing tshut-polarity property, using default (%s)\n",
 991                         thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
 992                                "low" : "high");
 993                thermal->tshut_polarity = thermal->chip->tshut_polarity;
 994        } else {
 995                thermal->tshut_polarity = tshut_polarity;
 996        }
 997
 998        if (thermal->tshut_polarity > 1) {
 999                dev_err(dev, "Invalid tshut-polarity specified: %d\n",
1000                        thermal->tshut_polarity);
1001                return -EINVAL;
1002        }
1003
1004        /* The tsadc wont to handle the error in here since some SoCs didn't
1005         * need this property.
1006         */
1007        thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
1008        if (IS_ERR(thermal->grf))
1009                dev_warn(dev, "Missing rockchip,grf property\n");
1010
1011        return 0;
1012}
1013
1014static int
1015rockchip_thermal_register_sensor(struct platform_device *pdev,
1016                                 struct rockchip_thermal_data *thermal,
1017                                 struct rockchip_thermal_sensor *sensor,
1018                                 int id)
1019{
1020        const struct rockchip_tsadc_chip *tsadc = thermal->chip;
1021        int error;
1022
1023        tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
1024
1025        error = tsadc->set_tshut_temp(&tsadc->table, id, thermal->regs,
1026                              thermal->tshut_temp);
1027        if (error)
1028                dev_err(&pdev->dev, "%s: invalid tshut=%d, error=%d\n",
1029                        __func__, thermal->tshut_temp, error);
1030
1031        sensor->thermal = thermal;
1032        sensor->id = id;
1033        sensor->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, id,
1034                                        sensor, &rockchip_of_thermal_ops);
1035        if (IS_ERR(sensor->tzd)) {
1036                error = PTR_ERR(sensor->tzd);
1037                dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
1038                        id, error);
1039                return error;
1040        }
1041
1042        return 0;
1043}
1044
1045/**
1046 * Reset TSADC Controller, reset all tsadc registers.
1047 */
1048static void rockchip_thermal_reset_controller(struct reset_control *reset)
1049{
1050        reset_control_assert(reset);
1051        usleep_range(10, 20);
1052        reset_control_deassert(reset);
1053}
1054
1055static int rockchip_thermal_probe(struct platform_device *pdev)
1056{
1057        struct device_node *np = pdev->dev.of_node;
1058        struct rockchip_thermal_data *thermal;
1059        const struct of_device_id *match;
1060        struct resource *res;
1061        int irq;
1062        int i;
1063        int error;
1064
1065        match = of_match_node(of_rockchip_thermal_match, np);
1066        if (!match)
1067                return -ENXIO;
1068
1069        irq = platform_get_irq(pdev, 0);
1070        if (irq < 0) {
1071                dev_err(&pdev->dev, "no irq resource?\n");
1072                return -EINVAL;
1073        }
1074
1075        thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
1076                               GFP_KERNEL);
1077        if (!thermal)
1078                return -ENOMEM;
1079
1080        thermal->pdev = pdev;
1081
1082        thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
1083        if (!thermal->chip)
1084                return -EINVAL;
1085
1086        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1087        thermal->regs = devm_ioremap_resource(&pdev->dev, res);
1088        if (IS_ERR(thermal->regs))
1089                return PTR_ERR(thermal->regs);
1090
1091        thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
1092        if (IS_ERR(thermal->reset)) {
1093                error = PTR_ERR(thermal->reset);
1094                dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
1095                return error;
1096        }
1097
1098        thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1099        if (IS_ERR(thermal->clk)) {
1100                error = PTR_ERR(thermal->clk);
1101                dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1102                return error;
1103        }
1104
1105        thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1106        if (IS_ERR(thermal->pclk)) {
1107                error = PTR_ERR(thermal->pclk);
1108                dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1109                        error);
1110                return error;
1111        }
1112
1113        error = clk_prepare_enable(thermal->clk);
1114        if (error) {
1115                dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
1116                        error);
1117                return error;
1118        }
1119
1120        error = clk_prepare_enable(thermal->pclk);
1121        if (error) {
1122                dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1123                goto err_disable_clk;
1124        }
1125
1126        rockchip_thermal_reset_controller(thermal->reset);
1127
1128        error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1129        if (error) {
1130                dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1131                        error);
1132                goto err_disable_pclk;
1133        }
1134
1135        thermal->chip->initialize(thermal->grf, thermal->regs,
1136                                  thermal->tshut_polarity);
1137
1138        for (i = 0; i < thermal->chip->chn_num; i++) {
1139                error = rockchip_thermal_register_sensor(pdev, thermal,
1140                                                &thermal->sensors[i],
1141                                                thermal->chip->chn_id[i]);
1142                if (error) {
1143                        dev_err(&pdev->dev,
1144                                "failed to register sensor[%d] : error = %d\n",
1145                                i, error);
1146                        goto err_disable_pclk;
1147                }
1148        }
1149
1150        error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1151                                          &rockchip_thermal_alarm_irq_thread,
1152                                          IRQF_ONESHOT,
1153                                          "rockchip_thermal", thermal);
1154        if (error) {
1155                dev_err(&pdev->dev,
1156                        "failed to request tsadc irq: %d\n", error);
1157                goto err_disable_pclk;
1158        }
1159
1160        thermal->chip->control(thermal->regs, true);
1161
1162        for (i = 0; i < thermal->chip->chn_num; i++)
1163                rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1164
1165        platform_set_drvdata(pdev, thermal);
1166
1167        return 0;
1168
1169err_disable_pclk:
1170        clk_disable_unprepare(thermal->pclk);
1171err_disable_clk:
1172        clk_disable_unprepare(thermal->clk);
1173
1174        return error;
1175}
1176
1177static int rockchip_thermal_remove(struct platform_device *pdev)
1178{
1179        struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1180        int i;
1181
1182        for (i = 0; i < thermal->chip->chn_num; i++) {
1183                struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1184
1185                rockchip_thermal_toggle_sensor(sensor, false);
1186        }
1187
1188        thermal->chip->control(thermal->regs, false);
1189
1190        clk_disable_unprepare(thermal->pclk);
1191        clk_disable_unprepare(thermal->clk);
1192
1193        return 0;
1194}
1195
1196static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1197{
1198        struct platform_device *pdev = to_platform_device(dev);
1199        struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1200        int i;
1201
1202        for (i = 0; i < thermal->chip->chn_num; i++)
1203                rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1204
1205        thermal->chip->control(thermal->regs, false);
1206
1207        clk_disable(thermal->pclk);
1208        clk_disable(thermal->clk);
1209
1210        pinctrl_pm_select_sleep_state(dev);
1211
1212        return 0;
1213}
1214
1215static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1216{
1217        struct platform_device *pdev = to_platform_device(dev);
1218        struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1219        int i;
1220        int error;
1221
1222        error = clk_enable(thermal->clk);
1223        if (error)
1224                return error;
1225
1226        error = clk_enable(thermal->pclk);
1227        if (error) {
1228                clk_disable(thermal->clk);
1229                return error;
1230        }
1231
1232        rockchip_thermal_reset_controller(thermal->reset);
1233
1234        thermal->chip->initialize(thermal->grf, thermal->regs,
1235                                  thermal->tshut_polarity);
1236
1237        for (i = 0; i < thermal->chip->chn_num; i++) {
1238                int id = thermal->sensors[i].id;
1239
1240                thermal->chip->set_tshut_mode(id, thermal->regs,
1241                                              thermal->tshut_mode);
1242
1243                error = thermal->chip->set_tshut_temp(&thermal->chip->table,
1244                                              id, thermal->regs,
1245                                              thermal->tshut_temp);
1246                if (error)
1247                        dev_err(&pdev->dev, "%s: invalid tshut=%d, error=%d\n",
1248                                __func__, thermal->tshut_temp, error);
1249        }
1250
1251        thermal->chip->control(thermal->regs, true);
1252
1253        for (i = 0; i < thermal->chip->chn_num; i++)
1254                rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1255
1256        pinctrl_pm_select_default_state(dev);
1257
1258        return 0;
1259}
1260
1261static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1262                         rockchip_thermal_suspend, rockchip_thermal_resume);
1263
1264static struct platform_driver rockchip_thermal_driver = {
1265        .driver = {
1266                .name = "rockchip-thermal",
1267                .pm = &rockchip_thermal_pm_ops,
1268                .of_match_table = of_rockchip_thermal_match,
1269        },
1270        .probe = rockchip_thermal_probe,
1271        .remove = rockchip_thermal_remove,
1272};
1273
1274module_platform_driver(rockchip_thermal_driver);
1275
1276MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1277MODULE_AUTHOR("Rockchip, Inc.");
1278MODULE_LICENSE("GPL v2");
1279MODULE_ALIAS("platform:rockchip-thermal");
1280