linux/drivers/usb/host/ehci-hcd.c
<<
>>
Prefs
   1/*
   2 * Enhanced Host Controller Interface (EHCI) driver for USB.
   3 *
   4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5 *
   6 * Copyright (c) 2000-2004 by David Brownell
   7 *
   8 * This program is free software; you can redistribute it and/or modify it
   9 * under the terms of the GNU General Public License as published by the
  10 * Free Software Foundation; either version 2 of the License, or (at your
  11 * option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful, but
  14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16 * for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software Foundation,
  20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21 */
  22
  23#include <linux/module.h>
  24#include <linux/pci.h>
  25#include <linux/dmapool.h>
  26#include <linux/kernel.h>
  27#include <linux/delay.h>
  28#include <linux/ioport.h>
  29#include <linux/sched.h>
  30#include <linux/vmalloc.h>
  31#include <linux/errno.h>
  32#include <linux/init.h>
  33#include <linux/hrtimer.h>
  34#include <linux/list.h>
  35#include <linux/interrupt.h>
  36#include <linux/usb.h>
  37#include <linux/usb/hcd.h>
  38#include <linux/moduleparam.h>
  39#include <linux/dma-mapping.h>
  40#include <linux/debugfs.h>
  41#include <linux/slab.h>
  42
  43#include <asm/byteorder.h>
  44#include <asm/io.h>
  45#include <asm/irq.h>
  46#include <asm/unaligned.h>
  47
  48#if defined(CONFIG_PPC_PS3)
  49#include <asm/firmware.h>
  50#endif
  51
  52/*-------------------------------------------------------------------------*/
  53
  54/*
  55 * EHCI hc_driver implementation ... experimental, incomplete.
  56 * Based on the final 1.0 register interface specification.
  57 *
  58 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  59 * First was PCMCIA, like ISA; then CardBus, which is PCI.
  60 * Next comes "CardBay", using USB 2.0 signals.
  61 *
  62 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  63 * Special thanks to Intel and VIA for providing host controllers to
  64 * test this driver on, and Cypress (including In-System Design) for
  65 * providing early devices for those host controllers to talk to!
  66 */
  67
  68#define DRIVER_AUTHOR "David Brownell"
  69#define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  70
  71static const char       hcd_name [] = "ehci_hcd";
  72
  73
  74#undef EHCI_URB_TRACE
  75
  76/* magic numbers that can affect system performance */
  77#define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  78#define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  79#define EHCI_TUNE_RL_TT         0
  80#define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  81#define EHCI_TUNE_MULT_TT       1
  82/*
  83 * Some drivers think it's safe to schedule isochronous transfers more than
  84 * 256 ms into the future (partly as a result of an old bug in the scheduling
  85 * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  86 * length of 512 frames instead of 256.
  87 */
  88#define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  89
  90/* Initial IRQ latency:  faster than hw default */
  91static int log2_irq_thresh = 0;         // 0 to 6
  92module_param (log2_irq_thresh, int, S_IRUGO);
  93MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  94
  95/* initial park setting:  slower than hw default */
  96static unsigned park = 0;
  97module_param (park, uint, S_IRUGO);
  98MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
  99
 100/* for flakey hardware, ignore overcurrent indicators */
 101static bool ignore_oc;
 102module_param (ignore_oc, bool, S_IRUGO);
 103MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 104
 105#define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 106
 107/*-------------------------------------------------------------------------*/
 108
 109#include "ehci.h"
 110#include "pci-quirks.h"
 111
 112static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
 113                struct ehci_tt *tt);
 114
 115/*
 116 * The MosChip MCS9990 controller updates its microframe counter
 117 * a little before the frame counter, and occasionally we will read
 118 * the invalid intermediate value.  Avoid problems by checking the
 119 * microframe number (the low-order 3 bits); if they are 0 then
 120 * re-read the register to get the correct value.
 121 */
 122static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
 123{
 124        unsigned uf;
 125
 126        uf = ehci_readl(ehci, &ehci->regs->frame_index);
 127        if (unlikely((uf & 7) == 0))
 128                uf = ehci_readl(ehci, &ehci->regs->frame_index);
 129        return uf;
 130}
 131
 132static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
 133{
 134        if (ehci->frame_index_bug)
 135                return ehci_moschip_read_frame_index(ehci);
 136        return ehci_readl(ehci, &ehci->regs->frame_index);
 137}
 138
 139#include "ehci-dbg.c"
 140
 141/*-------------------------------------------------------------------------*/
 142
 143/*
 144 * ehci_handshake - spin reading hc until handshake completes or fails
 145 * @ptr: address of hc register to be read
 146 * @mask: bits to look at in result of read
 147 * @done: value of those bits when handshake succeeds
 148 * @usec: timeout in microseconds
 149 *
 150 * Returns negative errno, or zero on success
 151 *
 152 * Success happens when the "mask" bits have the specified value (hardware
 153 * handshake done).  There are two failure modes:  "usec" have passed (major
 154 * hardware flakeout), or the register reads as all-ones (hardware removed).
 155 *
 156 * That last failure should_only happen in cases like physical cardbus eject
 157 * before driver shutdown. But it also seems to be caused by bugs in cardbus
 158 * bridge shutdown:  shutting down the bridge before the devices using it.
 159 */
 160int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
 161                   u32 mask, u32 done, int usec)
 162{
 163        u32     result;
 164
 165        do {
 166                result = ehci_readl(ehci, ptr);
 167                if (result == ~(u32)0)          /* card removed */
 168                        return -ENODEV;
 169                result &= mask;
 170                if (result == done)
 171                        return 0;
 172                udelay (1);
 173                usec--;
 174        } while (usec > 0);
 175        return -ETIMEDOUT;
 176}
 177EXPORT_SYMBOL_GPL(ehci_handshake);
 178
 179/* check TDI/ARC silicon is in host mode */
 180static int tdi_in_host_mode (struct ehci_hcd *ehci)
 181{
 182        u32             tmp;
 183
 184        tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 185        return (tmp & 3) == USBMODE_CM_HC;
 186}
 187
 188/*
 189 * Force HC to halt state from unknown (EHCI spec section 2.3).
 190 * Must be called with interrupts enabled and the lock not held.
 191 */
 192static int ehci_halt (struct ehci_hcd *ehci)
 193{
 194        u32     temp;
 195
 196        spin_lock_irq(&ehci->lock);
 197
 198        /* disable any irqs left enabled by previous code */
 199        ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 200
 201        if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 202                spin_unlock_irq(&ehci->lock);
 203                return 0;
 204        }
 205
 206        /*
 207         * This routine gets called during probe before ehci->command
 208         * has been initialized, so we can't rely on its value.
 209         */
 210        ehci->command &= ~CMD_RUN;
 211        temp = ehci_readl(ehci, &ehci->regs->command);
 212        temp &= ~(CMD_RUN | CMD_IAAD);
 213        ehci_writel(ehci, temp, &ehci->regs->command);
 214
 215        spin_unlock_irq(&ehci->lock);
 216        synchronize_irq(ehci_to_hcd(ehci)->irq);
 217
 218        return ehci_handshake(ehci, &ehci->regs->status,
 219                          STS_HALT, STS_HALT, 16 * 125);
 220}
 221
 222/* put TDI/ARC silicon into EHCI mode */
 223static void tdi_reset (struct ehci_hcd *ehci)
 224{
 225        u32             tmp;
 226
 227        tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 228        tmp |= USBMODE_CM_HC;
 229        /* The default byte access to MMR space is LE after
 230         * controller reset. Set the required endian mode
 231         * for transfer buffers to match the host microprocessor
 232         */
 233        if (ehci_big_endian_mmio(ehci))
 234                tmp |= USBMODE_BE;
 235        ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 236}
 237
 238/*
 239 * Reset a non-running (STS_HALT == 1) controller.
 240 * Must be called with interrupts enabled and the lock not held.
 241 */
 242int ehci_reset(struct ehci_hcd *ehci)
 243{
 244        int     retval;
 245        u32     command = ehci_readl(ehci, &ehci->regs->command);
 246
 247        /* If the EHCI debug controller is active, special care must be
 248         * taken before and after a host controller reset */
 249        if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 250                ehci->debug = NULL;
 251
 252        command |= CMD_RESET;
 253        dbg_cmd (ehci, "reset", command);
 254        ehci_writel(ehci, command, &ehci->regs->command);
 255        ehci->rh_state = EHCI_RH_HALTED;
 256        ehci->next_statechange = jiffies;
 257        retval = ehci_handshake(ehci, &ehci->regs->command,
 258                            CMD_RESET, 0, 250 * 1000);
 259
 260        if (ehci->has_hostpc) {
 261                ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 262                                &ehci->regs->usbmode_ex);
 263                ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 264        }
 265        if (retval)
 266                return retval;
 267
 268        if (ehci_is_TDI(ehci))
 269                tdi_reset (ehci);
 270
 271        if (ehci->debug)
 272                dbgp_external_startup(ehci_to_hcd(ehci));
 273
 274        ehci->port_c_suspend = ehci->suspended_ports =
 275                        ehci->resuming_ports = 0;
 276        return retval;
 277}
 278EXPORT_SYMBOL_GPL(ehci_reset);
 279
 280/*
 281 * Idle the controller (turn off the schedules).
 282 * Must be called with interrupts enabled and the lock not held.
 283 */
 284static void ehci_quiesce (struct ehci_hcd *ehci)
 285{
 286        u32     temp;
 287
 288        if (ehci->rh_state != EHCI_RH_RUNNING)
 289                return;
 290
 291        /* wait for any schedule enables/disables to take effect */
 292        temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 293        ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
 294                        16 * 125);
 295
 296        /* then disable anything that's still active */
 297        spin_lock_irq(&ehci->lock);
 298        ehci->command &= ~(CMD_ASE | CMD_PSE);
 299        ehci_writel(ehci, ehci->command, &ehci->regs->command);
 300        spin_unlock_irq(&ehci->lock);
 301
 302        /* hardware can take 16 microframes to turn off ... */
 303        ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
 304                        16 * 125);
 305}
 306
 307/*-------------------------------------------------------------------------*/
 308
 309static void end_iaa_cycle(struct ehci_hcd *ehci);
 310static void end_unlink_async(struct ehci_hcd *ehci);
 311static void unlink_empty_async(struct ehci_hcd *ehci);
 312static void ehci_work(struct ehci_hcd *ehci);
 313static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 314static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 315static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable);
 316
 317#include "ehci-timer.c"
 318#include "ehci-hub.c"
 319#include "ehci-mem.c"
 320#include "ehci-q.c"
 321#include "ehci-sched.c"
 322#include "ehci-sysfs.c"
 323
 324/*-------------------------------------------------------------------------*/
 325
 326/* On some systems, leaving remote wakeup enabled prevents system shutdown.
 327 * The firmware seems to think that powering off is a wakeup event!
 328 * This routine turns off remote wakeup and everything else, on all ports.
 329 */
 330static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 331{
 332        int     port = HCS_N_PORTS(ehci->hcs_params);
 333
 334        while (port--) {
 335                spin_unlock_irq(&ehci->lock);
 336                ehci_port_power(ehci, port, false);
 337                spin_lock_irq(&ehci->lock);
 338                ehci_writel(ehci, PORT_RWC_BITS,
 339                                &ehci->regs->port_status[port]);
 340        }
 341}
 342
 343/*
 344 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 345 * Must be called with interrupts enabled and the lock not held.
 346 */
 347static void ehci_silence_controller(struct ehci_hcd *ehci)
 348{
 349        ehci_halt(ehci);
 350
 351        spin_lock_irq(&ehci->lock);
 352        ehci->rh_state = EHCI_RH_HALTED;
 353        ehci_turn_off_all_ports(ehci);
 354
 355        /* make BIOS/etc use companion controller during reboot */
 356        ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 357
 358        /* unblock posted writes */
 359        ehci_readl(ehci, &ehci->regs->configured_flag);
 360        spin_unlock_irq(&ehci->lock);
 361}
 362
 363/* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 364 * This forcibly disables dma and IRQs, helping kexec and other cases
 365 * where the next system software may expect clean state.
 366 */
 367static void ehci_shutdown(struct usb_hcd *hcd)
 368{
 369        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 370
 371        /**
 372         * Protect the system from crashing at system shutdown in cases where
 373         * usb host is not added yet from OTG controller driver.
 374         * As ehci_setup() not done yet, so stop accessing registers or
 375         * variables initialized in ehci_setup()
 376         */
 377        if (!ehci->sbrn)
 378                return;
 379
 380        spin_lock_irq(&ehci->lock);
 381        ehci->shutdown = true;
 382        ehci->rh_state = EHCI_RH_STOPPING;
 383        ehci->enabled_hrtimer_events = 0;
 384        spin_unlock_irq(&ehci->lock);
 385
 386        ehci_silence_controller(ehci);
 387
 388        hrtimer_cancel(&ehci->hrtimer);
 389}
 390
 391/*-------------------------------------------------------------------------*/
 392
 393/*
 394 * ehci_work is called from some interrupts, timers, and so on.
 395 * it calls driver completion functions, after dropping ehci->lock.
 396 */
 397static void ehci_work (struct ehci_hcd *ehci)
 398{
 399        /* another CPU may drop ehci->lock during a schedule scan while
 400         * it reports urb completions.  this flag guards against bogus
 401         * attempts at re-entrant schedule scanning.
 402         */
 403        if (ehci->scanning) {
 404                ehci->need_rescan = true;
 405                return;
 406        }
 407        ehci->scanning = true;
 408
 409 rescan:
 410        ehci->need_rescan = false;
 411        if (ehci->async_count)
 412                scan_async(ehci);
 413        if (ehci->intr_count > 0)
 414                scan_intr(ehci);
 415        if (ehci->isoc_count > 0)
 416                scan_isoc(ehci);
 417        if (ehci->need_rescan)
 418                goto rescan;
 419        ehci->scanning = false;
 420
 421        /* the IO watchdog guards against hardware or driver bugs that
 422         * misplace IRQs, and should let us run completely without IRQs.
 423         * such lossage has been observed on both VT6202 and VT8235.
 424         */
 425        turn_on_io_watchdog(ehci);
 426}
 427
 428/*
 429 * Called when the ehci_hcd module is removed.
 430 */
 431static void ehci_stop (struct usb_hcd *hcd)
 432{
 433        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 434
 435        ehci_dbg (ehci, "stop\n");
 436
 437        /* no more interrupts ... */
 438
 439        spin_lock_irq(&ehci->lock);
 440        ehci->enabled_hrtimer_events = 0;
 441        spin_unlock_irq(&ehci->lock);
 442
 443        ehci_quiesce(ehci);
 444        ehci_silence_controller(ehci);
 445        ehci_reset (ehci);
 446
 447        hrtimer_cancel(&ehci->hrtimer);
 448        remove_sysfs_files(ehci);
 449        remove_debug_files (ehci);
 450
 451        /* root hub is shut down separately (first, when possible) */
 452        spin_lock_irq (&ehci->lock);
 453        end_free_itds(ehci);
 454        spin_unlock_irq (&ehci->lock);
 455        ehci_mem_cleanup (ehci);
 456
 457        if (ehci->amd_pll_fix == 1)
 458                usb_amd_dev_put();
 459
 460        dbg_status (ehci, "ehci_stop completed",
 461                    ehci_readl(ehci, &ehci->regs->status));
 462}
 463
 464/* one-time init, only for memory state */
 465static int ehci_init(struct usb_hcd *hcd)
 466{
 467        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 468        u32                     temp;
 469        int                     retval;
 470        u32                     hcc_params;
 471        struct ehci_qh_hw       *hw;
 472
 473        spin_lock_init(&ehci->lock);
 474
 475        /*
 476         * keep io watchdog by default, those good HCDs could turn off it later
 477         */
 478        ehci->need_io_watchdog = 1;
 479
 480        hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 481        ehci->hrtimer.function = ehci_hrtimer_func;
 482        ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 483
 484        hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 485
 486        /*
 487         * by default set standard 80% (== 100 usec/uframe) max periodic
 488         * bandwidth as required by USB 2.0
 489         */
 490        ehci->uframe_periodic_max = 100;
 491
 492        /*
 493         * hw default: 1K periodic list heads, one per frame.
 494         * periodic_size can shrink by USBCMD update if hcc_params allows.
 495         */
 496        ehci->periodic_size = DEFAULT_I_TDPS;
 497        INIT_LIST_HEAD(&ehci->async_unlink);
 498        INIT_LIST_HEAD(&ehci->async_idle);
 499        INIT_LIST_HEAD(&ehci->intr_unlink_wait);
 500        INIT_LIST_HEAD(&ehci->intr_unlink);
 501        INIT_LIST_HEAD(&ehci->intr_qh_list);
 502        INIT_LIST_HEAD(&ehci->cached_itd_list);
 503        INIT_LIST_HEAD(&ehci->cached_sitd_list);
 504        INIT_LIST_HEAD(&ehci->tt_list);
 505
 506        if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 507                /* periodic schedule size can be smaller than default */
 508                switch (EHCI_TUNE_FLS) {
 509                case 0: ehci->periodic_size = 1024; break;
 510                case 1: ehci->periodic_size = 512; break;
 511                case 2: ehci->periodic_size = 256; break;
 512                default:        BUG();
 513                }
 514        }
 515        if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 516                return retval;
 517
 518        /* controllers may cache some of the periodic schedule ... */
 519        if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 520                ehci->i_thresh = 0;
 521        else                                    // N microframes cached
 522                ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 523
 524        /*
 525         * dedicate a qh for the async ring head, since we couldn't unlink
 526         * a 'real' qh without stopping the async schedule [4.8].  use it
 527         * as the 'reclamation list head' too.
 528         * its dummy is used in hw_alt_next of many tds, to prevent the qh
 529         * from automatically advancing to the next td after short reads.
 530         */
 531        ehci->async->qh_next.qh = NULL;
 532        hw = ehci->async->hw;
 533        hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 534        hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 535#if defined(CONFIG_PPC_PS3)
 536        hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 537#endif
 538        hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 539        hw->hw_qtd_next = EHCI_LIST_END(ehci);
 540        ehci->async->qh_state = QH_STATE_LINKED;
 541        hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 542
 543        /* clear interrupt enables, set irq latency */
 544        if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 545                log2_irq_thresh = 0;
 546        temp = 1 << (16 + log2_irq_thresh);
 547        if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 548                ehci->has_ppcd = 1;
 549                ehci_dbg(ehci, "enable per-port change event\n");
 550                temp |= CMD_PPCEE;
 551        }
 552        if (HCC_CANPARK(hcc_params)) {
 553                /* HW default park == 3, on hardware that supports it (like
 554                 * NVidia and ALI silicon), maximizes throughput on the async
 555                 * schedule by avoiding QH fetches between transfers.
 556                 *
 557                 * With fast usb storage devices and NForce2, "park" seems to
 558                 * make problems:  throughput reduction (!), data errors...
 559                 */
 560                if (park) {
 561                        park = min(park, (unsigned) 3);
 562                        temp |= CMD_PARK;
 563                        temp |= park << 8;
 564                }
 565                ehci_dbg(ehci, "park %d\n", park);
 566        }
 567        if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 568                /* periodic schedule size can be smaller than default */
 569                temp &= ~(3 << 2);
 570                temp |= (EHCI_TUNE_FLS << 2);
 571        }
 572        ehci->command = temp;
 573
 574        /* Accept arbitrarily long scatter-gather lists */
 575        if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 576                hcd->self.sg_tablesize = ~0;
 577
 578        /* Prepare for unlinking active QHs */
 579        ehci->old_current = ~0;
 580        return 0;
 581}
 582
 583/* start HC running; it's halted, ehci_init() has been run (once) */
 584static int ehci_run (struct usb_hcd *hcd)
 585{
 586        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 587        u32                     temp;
 588        u32                     hcc_params;
 589
 590        hcd->uses_new_polling = 1;
 591
 592        /* EHCI spec section 4.1 */
 593
 594        ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 595        ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 596
 597        /*
 598         * hcc_params controls whether ehci->regs->segment must (!!!)
 599         * be used; it constrains QH/ITD/SITD and QTD locations.
 600         * dma_pool consistent memory always uses segment zero.
 601         * streaming mappings for I/O buffers, like pci_map_single(),
 602         * can return segments above 4GB, if the device allows.
 603         *
 604         * NOTE:  the dma mask is visible through dev->dma_mask, so
 605         * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 606         * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 607         * host side drivers though.
 608         */
 609        hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 610        if (HCC_64BIT_ADDR(hcc_params)) {
 611                ehci_writel(ehci, 0, &ehci->regs->segment);
 612#if 0
 613// this is deeply broken on almost all architectures
 614                if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 615                        ehci_info(ehci, "enabled 64bit DMA\n");
 616#endif
 617        }
 618
 619
 620        // Philips, Intel, and maybe others need CMD_RUN before the
 621        // root hub will detect new devices (why?); NEC doesn't
 622        ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 623        ehci->command |= CMD_RUN;
 624        ehci_writel(ehci, ehci->command, &ehci->regs->command);
 625        dbg_cmd (ehci, "init", ehci->command);
 626
 627        /*
 628         * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 629         * are explicitly handed to companion controller(s), so no TT is
 630         * involved with the root hub.  (Except where one is integrated,
 631         * and there's no companion controller unless maybe for USB OTG.)
 632         *
 633         * Turning on the CF flag will transfer ownership of all ports
 634         * from the companions to the EHCI controller.  If any of the
 635         * companions are in the middle of a port reset at the time, it
 636         * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 637         * guarantees that no resets are in progress.  After we set CF,
 638         * a short delay lets the hardware catch up; new resets shouldn't
 639         * be started before the port switching actions could complete.
 640         */
 641        down_write(&ehci_cf_port_reset_rwsem);
 642        ehci->rh_state = EHCI_RH_RUNNING;
 643        ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 644        ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 645        msleep(5);
 646        up_write(&ehci_cf_port_reset_rwsem);
 647        ehci->last_periodic_enable = ktime_get_real();
 648
 649        temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 650        ehci_info (ehci,
 651                "USB %x.%x started, EHCI %x.%02x%s\n",
 652                ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 653                temp >> 8, temp & 0xff,
 654                ignore_oc ? ", overcurrent ignored" : "");
 655
 656        ehci_writel(ehci, INTR_MASK,
 657                    &ehci->regs->intr_enable); /* Turn On Interrupts */
 658
 659        /* GRR this is run-once init(), being done every time the HC starts.
 660         * So long as they're part of class devices, we can't do it init()
 661         * since the class device isn't created that early.
 662         */
 663        create_debug_files(ehci);
 664        create_sysfs_files(ehci);
 665
 666        return 0;
 667}
 668
 669int ehci_setup(struct usb_hcd *hcd)
 670{
 671        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 672        int retval;
 673
 674        ehci->regs = (void __iomem *)ehci->caps +
 675            HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 676        dbg_hcs_params(ehci, "reset");
 677        dbg_hcc_params(ehci, "reset");
 678
 679        /* cache this readonly data; minimize chip reads */
 680        ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 681
 682        ehci->sbrn = HCD_USB2;
 683
 684        /* data structure init */
 685        retval = ehci_init(hcd);
 686        if (retval)
 687                return retval;
 688
 689        retval = ehci_halt(ehci);
 690        if (retval) {
 691                ehci_mem_cleanup(ehci);
 692                return retval;
 693        }
 694
 695        ehci_reset(ehci);
 696
 697        return 0;
 698}
 699EXPORT_SYMBOL_GPL(ehci_setup);
 700
 701/*-------------------------------------------------------------------------*/
 702
 703static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 704{
 705        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 706        u32                     status, masked_status, pcd_status = 0, cmd;
 707        int                     bh;
 708        unsigned long           flags;
 709
 710        /*
 711         * For threadirqs option we use spin_lock_irqsave() variant to prevent
 712         * deadlock with ehci hrtimer callback, because hrtimer callbacks run
 713         * in interrupt context even when threadirqs is specified. We can go
 714         * back to spin_lock() variant when hrtimer callbacks become threaded.
 715         */
 716        spin_lock_irqsave(&ehci->lock, flags);
 717
 718        status = ehci_readl(ehci, &ehci->regs->status);
 719
 720        /* e.g. cardbus physical eject */
 721        if (status == ~(u32) 0) {
 722                ehci_dbg (ehci, "device removed\n");
 723                goto dead;
 724        }
 725
 726        /*
 727         * We don't use STS_FLR, but some controllers don't like it to
 728         * remain on, so mask it out along with the other status bits.
 729         */
 730        masked_status = status & (INTR_MASK | STS_FLR);
 731
 732        /* Shared IRQ? */
 733        if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 734                spin_unlock_irqrestore(&ehci->lock, flags);
 735                return IRQ_NONE;
 736        }
 737
 738        /* clear (just) interrupts */
 739        ehci_writel(ehci, masked_status, &ehci->regs->status);
 740        cmd = ehci_readl(ehci, &ehci->regs->command);
 741        bh = 0;
 742
 743        /* normal [4.15.1.2] or error [4.15.1.1] completion */
 744        if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 745                if (likely ((status & STS_ERR) == 0))
 746                        COUNT (ehci->stats.normal);
 747                else
 748                        COUNT (ehci->stats.error);
 749                bh = 1;
 750        }
 751
 752        /* complete the unlinking of some qh [4.15.2.3] */
 753        if (status & STS_IAA) {
 754
 755                /* Turn off the IAA watchdog */
 756                ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 757
 758                /*
 759                 * Mild optimization: Allow another IAAD to reset the
 760                 * hrtimer, if one occurs before the next expiration.
 761                 * In theory we could always cancel the hrtimer, but
 762                 * tests show that about half the time it will be reset
 763                 * for some other event anyway.
 764                 */
 765                if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 766                        ++ehci->next_hrtimer_event;
 767
 768                /* guard against (alleged) silicon errata */
 769                if (cmd & CMD_IAAD)
 770                        ehci_dbg(ehci, "IAA with IAAD still set?\n");
 771                if (ehci->iaa_in_progress)
 772                        COUNT(ehci->stats.iaa);
 773                end_iaa_cycle(ehci);
 774        }
 775
 776        /* remote wakeup [4.3.1] */
 777        if (status & STS_PCD) {
 778                unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 779                u32             ppcd = ~0;
 780
 781                /* kick root hub later */
 782                pcd_status = status;
 783
 784                /* resume root hub? */
 785                if (ehci->rh_state == EHCI_RH_SUSPENDED)
 786                        usb_hcd_resume_root_hub(hcd);
 787
 788                /* get per-port change detect bits */
 789                if (ehci->has_ppcd)
 790                        ppcd = status >> 16;
 791
 792                while (i--) {
 793                        int pstatus;
 794
 795                        /* leverage per-port change bits feature */
 796                        if (!(ppcd & (1 << i)))
 797                                continue;
 798                        pstatus = ehci_readl(ehci,
 799                                         &ehci->regs->port_status[i]);
 800
 801                        if (pstatus & PORT_OWNER)
 802                                continue;
 803                        if (!(test_bit(i, &ehci->suspended_ports) &&
 804                                        ((pstatus & PORT_RESUME) ||
 805                                                !(pstatus & PORT_SUSPEND)) &&
 806                                        (pstatus & PORT_PE) &&
 807                                        ehci->reset_done[i] == 0))
 808                                continue;
 809
 810                        /* start USB_RESUME_TIMEOUT msec resume signaling from
 811                         * this port, and make hub_wq collect
 812                         * PORT_STAT_C_SUSPEND to stop that signaling.
 813                         */
 814                        ehci->reset_done[i] = jiffies +
 815                                msecs_to_jiffies(USB_RESUME_TIMEOUT);
 816                        set_bit(i, &ehci->resuming_ports);
 817                        ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 818                        usb_hcd_start_port_resume(&hcd->self, i);
 819                        mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 820                }
 821        }
 822
 823        /* PCI errors [4.15.2.4] */
 824        if (unlikely ((status & STS_FATAL) != 0)) {
 825                ehci_err(ehci, "fatal error\n");
 826                dbg_cmd(ehci, "fatal", cmd);
 827                dbg_status(ehci, "fatal", status);
 828dead:
 829                usb_hc_died(hcd);
 830
 831                /* Don't let the controller do anything more */
 832                ehci->shutdown = true;
 833                ehci->rh_state = EHCI_RH_STOPPING;
 834                ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 835                ehci_writel(ehci, ehci->command, &ehci->regs->command);
 836                ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 837                ehci_handle_controller_death(ehci);
 838
 839                /* Handle completions when the controller stops */
 840                bh = 0;
 841        }
 842
 843        if (bh)
 844                ehci_work (ehci);
 845        spin_unlock_irqrestore(&ehci->lock, flags);
 846        if (pcd_status)
 847                usb_hcd_poll_rh_status(hcd);
 848        return IRQ_HANDLED;
 849}
 850
 851/*-------------------------------------------------------------------------*/
 852
 853/*
 854 * non-error returns are a promise to giveback() the urb later
 855 * we drop ownership so next owner (or urb unlink) can get it
 856 *
 857 * urb + dev is in hcd.self.controller.urb_list
 858 * we're queueing TDs onto software and hardware lists
 859 *
 860 * hcd-specific init for hcpriv hasn't been done yet
 861 *
 862 * NOTE:  control, bulk, and interrupt share the same code to append TDs
 863 * to a (possibly active) QH, and the same QH scanning code.
 864 */
 865static int ehci_urb_enqueue (
 866        struct usb_hcd  *hcd,
 867        struct urb      *urb,
 868        gfp_t           mem_flags
 869) {
 870        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 871        struct list_head        qtd_list;
 872
 873        INIT_LIST_HEAD (&qtd_list);
 874
 875        switch (usb_pipetype (urb->pipe)) {
 876        case PIPE_CONTROL:
 877                /* qh_completions() code doesn't handle all the fault cases
 878                 * in multi-TD control transfers.  Even 1KB is rare anyway.
 879                 */
 880                if (urb->transfer_buffer_length > (16 * 1024))
 881                        return -EMSGSIZE;
 882                /* FALLTHROUGH */
 883        /* case PIPE_BULK: */
 884        default:
 885                if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 886                        return -ENOMEM;
 887                return submit_async(ehci, urb, &qtd_list, mem_flags);
 888
 889        case PIPE_INTERRUPT:
 890                if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 891                        return -ENOMEM;
 892                return intr_submit(ehci, urb, &qtd_list, mem_flags);
 893
 894        case PIPE_ISOCHRONOUS:
 895                if (urb->dev->speed == USB_SPEED_HIGH)
 896                        return itd_submit (ehci, urb, mem_flags);
 897                else
 898                        return sitd_submit (ehci, urb, mem_flags);
 899        }
 900}
 901
 902/* remove from hardware lists
 903 * completions normally happen asynchronously
 904 */
 905
 906static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 907{
 908        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 909        struct ehci_qh          *qh;
 910        unsigned long           flags;
 911        int                     rc;
 912
 913        spin_lock_irqsave (&ehci->lock, flags);
 914        rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 915        if (rc)
 916                goto done;
 917
 918        if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
 919                /*
 920                 * We don't expedite dequeue for isochronous URBs.
 921                 * Just wait until they complete normally or their
 922                 * time slot expires.
 923                 */
 924        } else {
 925                qh = (struct ehci_qh *) urb->hcpriv;
 926                qh->unlink_reason |= QH_UNLINK_REQUESTED;
 927                switch (qh->qh_state) {
 928                case QH_STATE_LINKED:
 929                        if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
 930                                start_unlink_intr(ehci, qh);
 931                        else
 932                                start_unlink_async(ehci, qh);
 933                        break;
 934                case QH_STATE_COMPLETING:
 935                        qh->dequeue_during_giveback = 1;
 936                        break;
 937                case QH_STATE_UNLINK:
 938                case QH_STATE_UNLINK_WAIT:
 939                        /* already started */
 940                        break;
 941                case QH_STATE_IDLE:
 942                        /* QH might be waiting for a Clear-TT-Buffer */
 943                        qh_completions(ehci, qh);
 944                        break;
 945                }
 946        }
 947done:
 948        spin_unlock_irqrestore (&ehci->lock, flags);
 949        return rc;
 950}
 951
 952/*-------------------------------------------------------------------------*/
 953
 954// bulk qh holds the data toggle
 955
 956static void
 957ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 958{
 959        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 960        unsigned long           flags;
 961        struct ehci_qh          *qh;
 962
 963        /* ASSERT:  any requests/urbs are being unlinked */
 964        /* ASSERT:  nobody can be submitting urbs for this any more */
 965
 966rescan:
 967        spin_lock_irqsave (&ehci->lock, flags);
 968        qh = ep->hcpriv;
 969        if (!qh)
 970                goto done;
 971
 972        /* endpoints can be iso streams.  for now, we don't
 973         * accelerate iso completions ... so spin a while.
 974         */
 975        if (qh->hw == NULL) {
 976                struct ehci_iso_stream  *stream = ep->hcpriv;
 977
 978                if (!list_empty(&stream->td_list))
 979                        goto idle_timeout;
 980
 981                /* BUG_ON(!list_empty(&stream->free_list)); */
 982                reserve_release_iso_bandwidth(ehci, stream, -1);
 983                kfree(stream);
 984                goto done;
 985        }
 986
 987        qh->unlink_reason |= QH_UNLINK_REQUESTED;
 988        switch (qh->qh_state) {
 989        case QH_STATE_LINKED:
 990                if (list_empty(&qh->qtd_list))
 991                        qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
 992                else
 993                        WARN_ON(1);
 994                if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
 995                        start_unlink_async(ehci, qh);
 996                else
 997                        start_unlink_intr(ehci, qh);
 998                /* FALL THROUGH */
 999        case QH_STATE_COMPLETING:       /* already in unlinking */
1000        case QH_STATE_UNLINK:           /* wait for hw to finish? */
1001        case QH_STATE_UNLINK_WAIT:
1002idle_timeout:
1003                spin_unlock_irqrestore (&ehci->lock, flags);
1004                schedule_timeout_uninterruptible(1);
1005                goto rescan;
1006        case QH_STATE_IDLE:             /* fully unlinked */
1007                if (qh->clearing_tt)
1008                        goto idle_timeout;
1009                if (list_empty (&qh->qtd_list)) {
1010                        if (qh->ps.bw_uperiod)
1011                                reserve_release_intr_bandwidth(ehci, qh, -1);
1012                        qh_destroy(ehci, qh);
1013                        break;
1014                }
1015                /* else FALL THROUGH */
1016        default:
1017                /* caller was supposed to have unlinked any requests;
1018                 * that's not our job.  just leak this memory.
1019                 */
1020                ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1021                        qh, ep->desc.bEndpointAddress, qh->qh_state,
1022                        list_empty (&qh->qtd_list) ? "" : "(has tds)");
1023                break;
1024        }
1025 done:
1026        ep->hcpriv = NULL;
1027        spin_unlock_irqrestore (&ehci->lock, flags);
1028}
1029
1030static void
1031ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1032{
1033        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1034        struct ehci_qh          *qh;
1035        int                     eptype = usb_endpoint_type(&ep->desc);
1036        int                     epnum = usb_endpoint_num(&ep->desc);
1037        int                     is_out = usb_endpoint_dir_out(&ep->desc);
1038        unsigned long           flags;
1039
1040        if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1041                return;
1042
1043        spin_lock_irqsave(&ehci->lock, flags);
1044        qh = ep->hcpriv;
1045
1046        /* For Bulk and Interrupt endpoints we maintain the toggle state
1047         * in the hardware; the toggle bits in udev aren't used at all.
1048         * When an endpoint is reset by usb_clear_halt() we must reset
1049         * the toggle bit in the QH.
1050         */
1051        if (qh) {
1052                if (!list_empty(&qh->qtd_list)) {
1053                        WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1054                } else {
1055                        /* The toggle value in the QH can't be updated
1056                         * while the QH is active.  Unlink it now;
1057                         * re-linking will call qh_refresh().
1058                         */
1059                        usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1060                        qh->unlink_reason |= QH_UNLINK_REQUESTED;
1061                        if (eptype == USB_ENDPOINT_XFER_BULK)
1062                                start_unlink_async(ehci, qh);
1063                        else
1064                                start_unlink_intr(ehci, qh);
1065                }
1066        }
1067        spin_unlock_irqrestore(&ehci->lock, flags);
1068}
1069
1070static int ehci_get_frame (struct usb_hcd *hcd)
1071{
1072        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1073        return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1074}
1075
1076/*-------------------------------------------------------------------------*/
1077
1078/* Device addition and removal */
1079
1080static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1081{
1082        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1083
1084        spin_lock_irq(&ehci->lock);
1085        drop_tt(udev);
1086        spin_unlock_irq(&ehci->lock);
1087}
1088
1089/*-------------------------------------------------------------------------*/
1090
1091#ifdef  CONFIG_PM
1092
1093/* suspend/resume, section 4.3 */
1094
1095/* These routines handle the generic parts of controller suspend/resume */
1096
1097int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1098{
1099        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1100
1101        if (time_before(jiffies, ehci->next_statechange))
1102                msleep(10);
1103
1104        /*
1105         * Root hub was already suspended.  Disable IRQ emission and
1106         * mark HW unaccessible.  The PM and USB cores make sure that
1107         * the root hub is either suspended or stopped.
1108         */
1109        ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1110
1111        spin_lock_irq(&ehci->lock);
1112        ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1113        (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1114
1115        clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1116        spin_unlock_irq(&ehci->lock);
1117
1118        synchronize_irq(hcd->irq);
1119
1120        /* Check for race with a wakeup request */
1121        if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1122                ehci_resume(hcd, false);
1123                return -EBUSY;
1124        }
1125
1126        return 0;
1127}
1128EXPORT_SYMBOL_GPL(ehci_suspend);
1129
1130/* Returns 0 if power was preserved, 1 if power was lost */
1131int ehci_resume(struct usb_hcd *hcd, bool force_reset)
1132{
1133        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1134
1135        if (time_before(jiffies, ehci->next_statechange))
1136                msleep(100);
1137
1138        /* Mark hardware accessible again as we are back to full power by now */
1139        set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1140
1141        if (ehci->shutdown)
1142                return 0;               /* Controller is dead */
1143
1144        /*
1145         * If CF is still set and reset isn't forced
1146         * then we maintained suspend power.
1147         * Just undo the effect of ehci_suspend().
1148         */
1149        if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1150                        !force_reset) {
1151                int     mask = INTR_MASK;
1152
1153                ehci_prepare_ports_for_controller_resume(ehci);
1154
1155                spin_lock_irq(&ehci->lock);
1156                if (ehci->shutdown)
1157                        goto skip;
1158
1159                if (!hcd->self.root_hub->do_remote_wakeup)
1160                        mask &= ~STS_PCD;
1161                ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1162                ehci_readl(ehci, &ehci->regs->intr_enable);
1163 skip:
1164                spin_unlock_irq(&ehci->lock);
1165                return 0;
1166        }
1167
1168        /*
1169         * Else reset, to cope with power loss or resume from hibernation
1170         * having let the firmware kick in during reboot.
1171         */
1172        usb_root_hub_lost_power(hcd->self.root_hub);
1173        (void) ehci_halt(ehci);
1174        (void) ehci_reset(ehci);
1175
1176        spin_lock_irq(&ehci->lock);
1177        if (ehci->shutdown)
1178                goto skip;
1179
1180        ehci_writel(ehci, ehci->command, &ehci->regs->command);
1181        ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1182        ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1183
1184        ehci->rh_state = EHCI_RH_SUSPENDED;
1185        spin_unlock_irq(&ehci->lock);
1186
1187        return 1;
1188}
1189EXPORT_SYMBOL_GPL(ehci_resume);
1190
1191#endif
1192
1193/*-------------------------------------------------------------------------*/
1194
1195/*
1196 * Generic structure: This gets copied for platform drivers so that
1197 * individual entries can be overridden as needed.
1198 */
1199
1200static const struct hc_driver ehci_hc_driver = {
1201        .description =          hcd_name,
1202        .product_desc =         "EHCI Host Controller",
1203        .hcd_priv_size =        sizeof(struct ehci_hcd),
1204
1205        /*
1206         * generic hardware linkage
1207         */
1208        .irq =                  ehci_irq,
1209        .flags =                HCD_MEMORY | HCD_USB2 | HCD_BH,
1210
1211        /*
1212         * basic lifecycle operations
1213         */
1214        .reset =                ehci_setup,
1215        .start =                ehci_run,
1216        .stop =                 ehci_stop,
1217        .shutdown =             ehci_shutdown,
1218
1219        /*
1220         * managing i/o requests and associated device resources
1221         */
1222        .urb_enqueue =          ehci_urb_enqueue,
1223        .urb_dequeue =          ehci_urb_dequeue,
1224        .endpoint_disable =     ehci_endpoint_disable,
1225        .endpoint_reset =       ehci_endpoint_reset,
1226        .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1227
1228        /*
1229         * scheduling support
1230         */
1231        .get_frame_number =     ehci_get_frame,
1232
1233        /*
1234         * root hub support
1235         */
1236        .hub_status_data =      ehci_hub_status_data,
1237        .hub_control =          ehci_hub_control,
1238        .bus_suspend =          ehci_bus_suspend,
1239        .bus_resume =           ehci_bus_resume,
1240        .relinquish_port =      ehci_relinquish_port,
1241        .port_handed_over =     ehci_port_handed_over,
1242
1243        /*
1244         * device support
1245         */
1246        .free_dev =             ehci_remove_device,
1247};
1248
1249void ehci_init_driver(struct hc_driver *drv,
1250                const struct ehci_driver_overrides *over)
1251{
1252        /* Copy the generic table to drv and then apply the overrides */
1253        *drv = ehci_hc_driver;
1254
1255        if (over) {
1256                drv->hcd_priv_size += over->extra_priv_size;
1257                if (over->reset)
1258                        drv->reset = over->reset;
1259                if (over->port_power)
1260                        drv->port_power = over->port_power;
1261        }
1262}
1263EXPORT_SYMBOL_GPL(ehci_init_driver);
1264
1265/*-------------------------------------------------------------------------*/
1266
1267MODULE_DESCRIPTION(DRIVER_DESC);
1268MODULE_AUTHOR (DRIVER_AUTHOR);
1269MODULE_LICENSE ("GPL");
1270
1271#ifdef CONFIG_USB_EHCI_SH
1272#include "ehci-sh.c"
1273#define PLATFORM_DRIVER         ehci_hcd_sh_driver
1274#endif
1275
1276#ifdef CONFIG_PPC_PS3
1277#include "ehci-ps3.c"
1278#define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1279#endif
1280
1281#ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1282#include "ehci-ppc-of.c"
1283#define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1284#endif
1285
1286#ifdef CONFIG_XPS_USB_HCD_XILINX
1287#include "ehci-xilinx-of.c"
1288#define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1289#endif
1290
1291#ifdef CONFIG_TILE_USB
1292#include "ehci-tilegx.c"
1293#define PLATFORM_DRIVER         ehci_hcd_tilegx_driver
1294#endif
1295
1296#ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1297#include "ehci-pmcmsp.c"
1298#define PLATFORM_DRIVER         ehci_hcd_msp_driver
1299#endif
1300
1301#ifdef CONFIG_SPARC_LEON
1302#include "ehci-grlib.c"
1303#define PLATFORM_DRIVER         ehci_grlib_driver
1304#endif
1305
1306#ifdef CONFIG_USB_EHCI_MV
1307#include "ehci-mv.c"
1308#define        PLATFORM_DRIVER         ehci_mv_driver
1309#endif
1310
1311static int __init ehci_hcd_init(void)
1312{
1313        int retval = 0;
1314
1315        if (usb_disabled())
1316                return -ENODEV;
1317
1318        printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1319        set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1320        if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1321                        test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1322                printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1323                                " before uhci_hcd and ohci_hcd, not after\n");
1324
1325        pr_debug("%s: block sizes: qh %zd qtd %zd itd %zd sitd %zd\n",
1326                 hcd_name,
1327                 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1328                 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1329
1330#ifdef CONFIG_DYNAMIC_DEBUG
1331        ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1332        if (!ehci_debug_root) {
1333                retval = -ENOENT;
1334                goto err_debug;
1335        }
1336#endif
1337
1338#ifdef PLATFORM_DRIVER
1339        retval = platform_driver_register(&PLATFORM_DRIVER);
1340        if (retval < 0)
1341                goto clean0;
1342#endif
1343
1344#ifdef PS3_SYSTEM_BUS_DRIVER
1345        retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1346        if (retval < 0)
1347                goto clean2;
1348#endif
1349
1350#ifdef OF_PLATFORM_DRIVER
1351        retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1352        if (retval < 0)
1353                goto clean3;
1354#endif
1355
1356#ifdef XILINX_OF_PLATFORM_DRIVER
1357        retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1358        if (retval < 0)
1359                goto clean4;
1360#endif
1361        return retval;
1362
1363#ifdef XILINX_OF_PLATFORM_DRIVER
1364        /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1365clean4:
1366#endif
1367#ifdef OF_PLATFORM_DRIVER
1368        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1369clean3:
1370#endif
1371#ifdef PS3_SYSTEM_BUS_DRIVER
1372        ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1373clean2:
1374#endif
1375#ifdef PLATFORM_DRIVER
1376        platform_driver_unregister(&PLATFORM_DRIVER);
1377clean0:
1378#endif
1379#ifdef CONFIG_DYNAMIC_DEBUG
1380        debugfs_remove(ehci_debug_root);
1381        ehci_debug_root = NULL;
1382err_debug:
1383#endif
1384        clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1385        return retval;
1386}
1387module_init(ehci_hcd_init);
1388
1389static void __exit ehci_hcd_cleanup(void)
1390{
1391#ifdef XILINX_OF_PLATFORM_DRIVER
1392        platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1393#endif
1394#ifdef OF_PLATFORM_DRIVER
1395        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1396#endif
1397#ifdef PLATFORM_DRIVER
1398        platform_driver_unregister(&PLATFORM_DRIVER);
1399#endif
1400#ifdef PS3_SYSTEM_BUS_DRIVER
1401        ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1402#endif
1403#ifdef CONFIG_DYNAMIC_DEBUG
1404        debugfs_remove(ehci_debug_root);
1405#endif
1406        clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1407}
1408module_exit(ehci_hcd_cleanup);
1409