LXR linux/drivers/usb/mtu3/mtu3.h

   1/*
   2 * mtu3.h - MediaTek USB3 DRD header
   3 *
   4 * Copyright (C) 2016 MediaTek Inc.
   5 *
   6 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
   7 *
   8 * This software is licensed under the terms of the GNU General Public
   9 * License version 2, as published by the Free Software Foundation, and
  10 * may be copied, distributed, and modified under those terms.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 */
  18
  19#ifndef __MTU3_H__
  20#define __MTU3_H__
  21
  22#include <linux/device.h>
  23#include <linux/dmapool.h>
  24#include <linux/extcon.h>
  25#include <linux/interrupt.h>
  26#include <linux/list.h>
  27#include <linux/phy/phy.h>
  28#include <linux/regulator/consumer.h>
  29#include <linux/usb.h>
  30#include <linux/usb/ch9.h>
  31#include <linux/usb/gadget.h>
  32#include <linux/usb/otg.h>
  33
  34struct mtu3;
  35struct mtu3_ep;
  36struct mtu3_request;
  37
  38#include "mtu3_hw_regs.h"
  39#include "mtu3_qmu.h"
  40
  41#define MU3D_EP_TXCR0(epnum)    (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
  42#define MU3D_EP_TXCR1(epnum)    (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
  43#define MU3D_EP_TXCR2(epnum)    (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
  44
  45#define MU3D_EP_RXCR0(epnum)    (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
  46#define MU3D_EP_RXCR1(epnum)    (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
  47#define MU3D_EP_RXCR2(epnum)    (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
  48
  49#define USB_QMU_RQCSR(epnum)    (U3D_RXQCSR1 + (((epnum) - 1) * 0x10))
  50#define USB_QMU_RQSAR(epnum)    (U3D_RXQSAR1 + (((epnum) - 1) * 0x10))
  51#define USB_QMU_RQCPR(epnum)    (U3D_RXQCPR1 + (((epnum) - 1) * 0x10))
  52
  53#define USB_QMU_TQCSR(epnum)    (U3D_TXQCSR1 + (((epnum) - 1) * 0x10))
  54#define USB_QMU_TQSAR(epnum)    (U3D_TXQSAR1 + (((epnum) - 1) * 0x10))
  55#define USB_QMU_TQCPR(epnum)    (U3D_TXQCPR1 + (((epnum) - 1) * 0x10))
  56
  57#define SSUSB_U3_CTRL(p)        (U3D_SSUSB_U3_CTRL_0P + ((p) * 0x08))
  58#define SSUSB_U2_CTRL(p)        (U3D_SSUSB_U2_CTRL_0P + ((p) * 0x08))
  59
  60#define MTU3_DRIVER_NAME        "mtu3"
  61#define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  62
  63#define MTU3_EP_ENABLED         BIT(0)
  64#define MTU3_EP_STALL           BIT(1)
  65#define MTU3_EP_WEDGE           BIT(2)
  66#define MTU3_EP_BUSY            BIT(3)
  67
  68#define MTU3_U3_IP_SLOT_DEFAULT 2
  69#define MTU3_U2_IP_SLOT_DEFAULT 1
  70
  71/**
  72 * Normally the device works on HS or SS, to simplify fifo management,
  73 * devide fifo into some 512B parts, use bitmap to manage it; And
  74 * 128 bits size of bitmap is large enough, that means it can manage
  75 * up to 64KB fifo size.
  76 * NOTE: MTU3_EP_FIFO_UNIT should be power of two
  77 */
  78#define MTU3_EP_FIFO_UNIT               (1 << 9)
  79#define MTU3_FIFO_BIT_SIZE              128
  80#define MTU3_U2_IP_EP0_FIFO_SIZE        64
  81
  82/**
  83 * Maximum size of ep0 response buffer for ch9 requests,
  84 * the SET_SEL request uses 6 so far, and GET_STATUS is 2
  85 */
  86#define EP0_RESPONSE_BUF  6
  87
  88/* device operated link and speed got from DEVICE_CONF register */
  89enum mtu3_speed {
  90        MTU3_SPEED_INACTIVE = 0,
  91        MTU3_SPEED_FULL = 1,
  92        MTU3_SPEED_HIGH = 3,
  93        MTU3_SPEED_SUPER = 4,
  94};
  95
  96/**
  97 * @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP
  98 *              without data stage.
  99 * @MU3D_EP0_STATE_TX: IN data stage
 100 * @MU3D_EP0_STATE_RX: OUT data stage
 101 * @MU3D_EP0_STATE_TX_END: the last IN data is transferred, and
 102 *              waits for its completion interrupt
 103 * @MU3D_EP0_STATE_STALL: ep0 is in stall status, will be auto-cleared
 104 *              after receives a SETUP.
 105 */
 106enum mtu3_g_ep0_state {
 107        MU3D_EP0_STATE_SETUP = 1,
 108        MU3D_EP0_STATE_TX,
 109        MU3D_EP0_STATE_RX,
 110        MU3D_EP0_STATE_TX_END,
 111        MU3D_EP0_STATE_STALL,
 112};
 113
 114/**
 115 * @base: the base address of fifo
 116 * @limit: the bitmap size in bits
 117 * @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT
 118 */
 119struct mtu3_fifo_info {
 120        u32 base;
 121        u32 limit;
 122        DECLARE_BITMAP(bitmap, MTU3_FIFO_BIT_SIZE);
 123};
 124
 125/**
 126 * General Purpose Descriptor (GPD):
 127 *      The format of TX GPD is a little different from RX one.
 128 *      And the size of GPD is 16 bytes.
 129 *
 130 * @flag:
 131 *      bit0: Hardware Own (HWO)
 132 *      bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported
 133 *      bit2: Bypass (BPS), 1: HW skips this GPD if HWO = 1
 134 *      bit7: Interrupt On Completion (IOC)
 135 * @chksum: This is used to validate the contents of this GPD;
 136 *      If TXQ_CS_EN / RXQ_CS_EN bit is set, an interrupt is issued
 137 *      when checksum validation fails;
 138 *      Checksum value is calculated over the 16 bytes of the GPD by default;
 139 * @data_buf_len (RX ONLY): This value indicates the length of
 140 *      the assigned data buffer
 141 * @next_gpd: Physical address of the next GPD
 142 * @buffer: Physical address of the data buffer
 143 * @buf_len:
 144 *      (TX): This value indicates the length of the assigned data buffer
 145 *      (RX): The total length of data received
 146 * @ext_len: reserved
 147 * @ext_flag:
 148 *      bit5 (TX ONLY): Zero Length Packet (ZLP),
 149 */
 150struct qmu_gpd {
 151        __u8 flag;
 152        __u8 chksum;
 153        __le16 data_buf_len;
 154        __le32 next_gpd;
 155        __le32 buffer;
 156        __le16 buf_len;
 157        __u8 ext_len;
 158        __u8 ext_flag;
 159} __packed;
 160
 161/**
 162* dma: physical base address of GPD segment
 163* start: virtual base address of GPD segment
 164* end: the last GPD element
 165* enqueue: the first empty GPD to use
 166* dequeue: the first completed GPD serviced by ISR
 167* NOTE: the size of GPD ring should be >= 2
 168*/
 169struct mtu3_gpd_ring {
 170        dma_addr_t dma;
 171        struct qmu_gpd *start;
 172        struct qmu_gpd *end;
 173        struct qmu_gpd *enqueue;
 174        struct qmu_gpd *dequeue;
 175};
 176
 177/**
 178* @vbus: vbus 5V used by host mode
 179* @edev: external connector used to detect vbus and iddig changes
 180* @vbus_nb: notifier for vbus detection
 181* @vbus_nb: notifier for iddig(idpin) detection
 182* @extcon_reg_dwork: delay work for extcon notifier register, waiting for
 183*               xHCI driver initialization, it's necessary for system bootup
 184*               as device.
 185* @is_u3_drd: whether port0 supports usb3.0 dual-role device or not
 186* @id_*: used to maually switch between host and device modes by idpin
 187* @manual_drd_enabled: it's true when supports dual-role device by debugfs
 188*               to switch host/device modes depending on user input.
 189*/
 190struct otg_switch_mtk {
 191        struct regulator *vbus;
 192        struct extcon_dev *edev;
 193        struct notifier_block vbus_nb;
 194        struct notifier_block id_nb;
 195        struct delayed_work extcon_reg_dwork;
 196        bool is_u3_drd;
 197        /* dual-role switch by debugfs */
 198        struct pinctrl *id_pinctrl;
 199        struct pinctrl_state *id_float;
 200        struct pinctrl_state *id_ground;
 201        bool manual_drd_enabled;
 202};
 203
 204/**
 205 * @mac_base: register base address of device MAC, exclude xHCI's
 206 * @ippc_base: register base address of IP Power and Clock interface (IPPC)
 207 * @vusb33: usb3.3V shared by device/host IP
 208 * @sys_clk: system clock of mtu3, shared by device/host IP
 209 * @dr_mode: works in which mode:
 210 *              host only, device only or dual-role mode
 211 * @u2_ports: number of usb2.0 host ports
 212 * @u3_ports: number of usb3.0 host ports
 213 * @dbgfs_root: only used when supports manual dual-role switch via debugfs
 214 * @wakeup_en: it's true when supports remote wakeup in host mode
 215 * @wk_deb_p0: port0's wakeup debounce clock
 216 * @wk_deb_p1: it's optional, and depends on port1 is supported or not
 217 */
 218struct ssusb_mtk {
 219        struct device *dev;
 220        struct mtu3 *u3d;
 221        void __iomem *mac_base;
 222        void __iomem *ippc_base;
 223        struct phy **phys;
 224        int num_phys;
 225        /* common power & clock */
 226        struct regulator *vusb33;
 227        struct clk *sys_clk;
 228        struct clk *ref_clk;
 229        /* otg */
 230        struct otg_switch_mtk otg_switch;
 231        enum usb_dr_mode dr_mode;
 232        bool is_host;
 233        int u2_ports;
 234        int u3_ports;
 235        struct dentry *dbgfs_root;
 236        /* usb wakeup for host mode */
 237        bool wakeup_en;
 238        struct clk *wk_deb_p0;
 239        struct clk *wk_deb_p1;
 240        struct regmap *pericfg;
 241};
 242
 243/**
 244 * @fifo_size: it is (@slot + 1) * @fifo_seg_size
 245 * @fifo_seg_size: it is roundup_pow_of_two(@maxp)
 246 */
 247struct mtu3_ep {
 248        struct usb_ep ep;
 249        char name[12];
 250        struct mtu3 *mtu;
 251        u8 epnum;
 252        u8 type;
 253        u8 is_in;
 254        u16 maxp;
 255        int slot;
 256        u32 fifo_size;
 257        u32 fifo_addr;
 258        u32 fifo_seg_size;
 259        struct mtu3_fifo_info *fifo;
 260
 261        struct list_head req_list;
 262        struct mtu3_gpd_ring gpd_ring;
 263        const struct usb_ss_ep_comp_descriptor *comp_desc;
 264        const struct usb_endpoint_descriptor *desc;
 265
 266        int flags;
 267        u8 wedged;
 268        u8 busy;
 269};
 270
 271struct mtu3_request {
 272        struct usb_request request;
 273        struct list_head list;
 274        struct mtu3_ep *mep;
 275        struct mtu3 *mtu;
 276        struct qmu_gpd *gpd;
 277        int epnum;
 278};
 279
 280static inline struct ssusb_mtk *dev_to_ssusb(struct device *dev)
 281{
 282        return dev_get_drvdata(dev);
 283}
 284
 285/**
 286 * struct mtu3 - device driver instance data.
 287 * @slot: MTU3_U2_IP_SLOT_DEFAULT for U2 IP only,
 288 *              MTU3_U3_IP_SLOT_DEFAULT for U3 IP
 289 * @may_wakeup: means device's remote wakeup is enabled
 290 * @is_self_powered: is reported in device status and the config descriptor
 291 * @ep0_req: dummy request used while handling standard USB requests
 292 *              for GET_STATUS and SET_SEL
 293 * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests
 294 */
 295struct mtu3 {
 296        spinlock_t lock;
 297        struct ssusb_mtk *ssusb;
 298        struct device *dev;
 299        void __iomem *mac_base;
 300        void __iomem *ippc_base;
 301        int irq;
 302
 303        struct mtu3_fifo_info tx_fifo;
 304        struct mtu3_fifo_info rx_fifo;
 305
 306        struct mtu3_ep *ep_array;
 307        struct mtu3_ep *in_eps;
 308        struct mtu3_ep *out_eps;
 309        struct mtu3_ep *ep0;
 310        int num_eps;
 311        int slot;
 312        int active_ep;
 313
 314        struct dma_pool *qmu_gpd_pool;
 315        enum mtu3_g_ep0_state ep0_state;
 316        struct usb_gadget g;    /* the gadget */
 317        struct usb_gadget_driver *gadget_driver;
 318        struct mtu3_request ep0_req;
 319        u8 setup_buf[EP0_RESPONSE_BUF];
 320        u32 max_speed;
 321
 322        unsigned is_active:1;
 323        unsigned may_wakeup:1;
 324        unsigned is_self_powered:1;
 325        unsigned test_mode:1;
 326        unsigned softconnect:1;
 327        unsigned u1_enable:1;
 328        unsigned u2_enable:1;
 329        unsigned is_u3_ip:1;
 330
 331        u8 address;
 332        u8 test_mode_nr;
 333        u32 hw_version;
 334};
 335
 336static inline struct mtu3 *gadget_to_mtu3(struct usb_gadget *g)
 337{
 338        return container_of(g, struct mtu3, g);
 339}
 340
 341static inline int is_first_entry(const struct list_head *list,
 342        const struct list_head *head)
 343{
 344        return list_is_last(head, list);
 345}
 346
 347static inline struct mtu3_request *to_mtu3_request(struct usb_request *req)
 348{
 349        return req ? container_of(req, struct mtu3_request, request) : NULL;
 350}
 351
 352static inline struct mtu3_ep *to_mtu3_ep(struct usb_ep *ep)
 353{
 354        return ep ? container_of(ep, struct mtu3_ep, ep) : NULL;
 355}
 356
 357static inline struct mtu3_request *next_request(struct mtu3_ep *mep)
 358{
 359        return list_first_entry_or_null(&mep->req_list, struct mtu3_request,
 360                                        list);
 361}
 362
 363static inline void mtu3_writel(void __iomem *base, u32 offset, u32 data)
 364{
 365        writel(data, base + offset);
 366}
 367
 368static inline u32 mtu3_readl(void __iomem *base, u32 offset)
 369{
 370        return readl(base + offset);
 371}
 372
 373static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits)
 374{
 375        void __iomem *addr = base + offset;
 376        u32 tmp = readl(addr);
 377
 378        writel((tmp | (bits)), addr);
 379}
 380
 381static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits)
 382{
 383        void __iomem *addr = base + offset;
 384        u32 tmp = readl(addr);
 385
 386        writel((tmp & ~(bits)), addr);
 387}
 388
 389int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks);
 390struct usb_request *mtu3_alloc_request(struct usb_ep *ep, gfp_t gfp_flags);
 391void mtu3_free_request(struct usb_ep *ep, struct usb_request *req);
 392void mtu3_req_complete(struct mtu3_ep *mep,
 393                struct usb_request *req, int status);
 394
 395int mtu3_config_ep(struct mtu3 *mtu, struct mtu3_ep *mep,
 396                int interval, int burst, int mult);
 397void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep);
 398void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set);
 399void mtu3_ep0_setup(struct mtu3 *mtu);
 400void mtu3_start(struct mtu3 *mtu);
 401void mtu3_stop(struct mtu3 *mtu);
 402void mtu3_dev_on_off(struct mtu3 *mtu, int is_on);
 403
 404int mtu3_gadget_setup(struct mtu3 *mtu);
 405void mtu3_gadget_cleanup(struct mtu3 *mtu);
 406void mtu3_gadget_reset(struct mtu3 *mtu);
 407void mtu3_gadget_suspend(struct mtu3 *mtu);
 408void mtu3_gadget_resume(struct mtu3 *mtu);
 409void mtu3_gadget_disconnect(struct mtu3 *mtu);
 410
 411irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu);
 412extern const struct usb_ep_ops mtu3_ep0_ops;
 413
 414#endif
 415