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14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/device.h>
17#include <linux/err.h>
18#include <linux/extcon.h>
19#include <linux/gpio/consumer.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/of.h>
23#include <linux/platform_device.h>
24#include <linux/reboot.h>
25#include <linux/regulator/consumer.h>
26#include <linux/reset.h>
27#include <linux/slab.h>
28#include <linux/usb.h>
29#include <linux/usb/ulpi.h>
30
31#define HSPHY_AHBBURST 0x0090
32#define HSPHY_AHBMODE 0x0098
33#define HSPHY_GENCONFIG 0x009c
34#define HSPHY_GENCONFIG_2 0x00a0
35
36#define HSPHY_USBCMD 0x0140
37#define HSPHY_ULPI_VIEWPORT 0x0170
38#define HSPHY_CTRL 0x0240
39
40#define HSPHY_TXFIFO_IDLE_FORCE_DIS BIT(4)
41#define HSPHY_SESS_VLD_CTRL_EN BIT(7)
42#define HSPHY_POR_ASSERT BIT(0)
43#define HSPHY_RETEN BIT(1)
44
45#define HSPHY_SESS_VLD_CTRL BIT(25)
46
47#define ULPI_PWR_CLK_MNG_REG 0x88
48#define ULPI_PWR_OTG_COMP_DISABLE BIT(0)
49
50#define ULPI_MISC_A 0x96
51#define ULPI_MISC_A_VBUSVLDEXTSEL BIT(1)
52#define ULPI_MISC_A_VBUSVLDEXT BIT(0)
53
54#define HSPHY_3P3_MIN 3050000
55#define HSPHY_3P3_MAX 3300000
56
57#define HSPHY_1P8_MIN 1800000
58#define HSPHY_1P8_MAX 1800000
59
60#define HSPHY_VDD_MIN 5
61#define HSPHY_VDD_MAX 7
62
63struct phy_8x16 {
64 struct usb_phy phy;
65 void __iomem *regs;
66 struct clk *core_clk;
67 struct clk *iface_clk;
68 struct regulator_bulk_data regulator[3];
69
70 struct reset_control *phy_reset;
71
72 struct gpio_desc *switch_gpio;
73 struct notifier_block reboot_notify;
74};
75
76static int phy_8x16_notify_connect(struct usb_phy *phy,
77 enum usb_device_speed speed)
78{
79 struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
80 u32 val;
81
82 val = ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT;
83 usb_phy_io_write(&qphy->phy, val, ULPI_SET(ULPI_MISC_A));
84
85 val = readl(qphy->regs + HSPHY_USBCMD);
86 val |= HSPHY_SESS_VLD_CTRL;
87 writel(val, qphy->regs + HSPHY_USBCMD);
88
89 return 0;
90}
91
92static int phy_8x16_notify_disconnect(struct usb_phy *phy,
93 enum usb_device_speed speed)
94{
95 struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
96 u32 val;
97
98 val = ULPI_MISC_A_VBUSVLDEXT | ULPI_MISC_A_VBUSVLDEXTSEL;
99 usb_phy_io_write(&qphy->phy, val, ULPI_CLR(ULPI_MISC_A));
100
101 val = readl(qphy->regs + HSPHY_USBCMD);
102 val &= ~HSPHY_SESS_VLD_CTRL;
103 writel(val, qphy->regs + HSPHY_USBCMD);
104
105 return 0;
106}
107
108static int phy_8x16_vbus_on(struct phy_8x16 *qphy)
109{
110 phy_8x16_notify_connect(&qphy->phy, USB_SPEED_UNKNOWN);
111
112
113 gpiod_set_value_cansleep(qphy->switch_gpio, 0);
114
115 return 0;
116}
117
118static int phy_8x16_vbus_off(struct phy_8x16 *qphy)
119{
120 phy_8x16_notify_disconnect(&qphy->phy, USB_SPEED_UNKNOWN);
121
122
123 gpiod_set_value_cansleep(qphy->switch_gpio, 1);
124
125 return 0;
126}
127
128static int phy_8x16_vbus_notify(struct notifier_block *nb, unsigned long event,
129 void *ptr)
130{
131 struct usb_phy *usb_phy = container_of(nb, struct usb_phy, vbus_nb);
132 struct phy_8x16 *qphy = container_of(usb_phy, struct phy_8x16, phy);
133
134 if (event)
135 phy_8x16_vbus_on(qphy);
136 else
137 phy_8x16_vbus_off(qphy);
138
139 return NOTIFY_DONE;
140}
141
142static int phy_8x16_init(struct usb_phy *phy)
143{
144 struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
145 u32 val, init[] = {0x44, 0x6B, 0x24, 0x13};
146 u32 addr = ULPI_EXT_VENDOR_SPECIFIC;
147 int idx, state;
148
149 for (idx = 0; idx < ARRAY_SIZE(init); idx++)
150 usb_phy_io_write(phy, init[idx], addr + idx);
151
152 reset_control_reset(qphy->phy_reset);
153
154
155 val = readl(qphy->regs + HSPHY_CTRL);
156 val |= HSPHY_POR_ASSERT;
157 writel(val, qphy->regs + HSPHY_CTRL);
158
159
160
161
162
163
164 usleep_range(12, 15);
165
166
167 val = readl(qphy->regs + HSPHY_CTRL);
168 val &= ~HSPHY_POR_ASSERT;
169 writel(val, qphy->regs + HSPHY_CTRL);
170
171 usleep_range(10, 15);
172
173 writel(0x00, qphy->regs + HSPHY_AHBBURST);
174 writel(0x08, qphy->regs + HSPHY_AHBMODE);
175
176
177 val = readl(qphy->regs + HSPHY_GENCONFIG);
178 val &= ~HSPHY_TXFIFO_IDLE_FORCE_DIS;
179 writel(val, qphy->regs + HSPHY_GENCONFIG);
180
181 val = readl(qphy->regs + HSPHY_GENCONFIG_2);
182 val |= HSPHY_SESS_VLD_CTRL_EN;
183 writel(val, qphy->regs + HSPHY_GENCONFIG_2);
184
185 val = ULPI_PWR_OTG_COMP_DISABLE;
186 usb_phy_io_write(phy, val, ULPI_SET(ULPI_PWR_CLK_MNG_REG));
187
188 state = extcon_get_state(qphy->phy.edev, EXTCON_USB);
189 if (state)
190 phy_8x16_vbus_on(qphy);
191 else
192 phy_8x16_vbus_off(qphy);
193
194 val = usb_phy_io_read(&qphy->phy, ULPI_FUNC_CTRL);
195 val &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
196 val |= ULPI_FUNC_CTRL_OPMODE_NORMAL;
197 usb_phy_io_write(&qphy->phy, val, ULPI_FUNC_CTRL);
198
199 return 0;
200}
201
202static void phy_8x16_shutdown(struct usb_phy *phy)
203{
204 u32 val;
205
206
207 val = usb_phy_io_read(phy, ULPI_FUNC_CTRL);
208 val &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
209 val |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
210 usb_phy_io_write(phy, val, ULPI_FUNC_CTRL);
211}
212
213static int phy_8x16_read_devicetree(struct phy_8x16 *qphy)
214{
215 struct device *dev = qphy->phy.dev;
216 int ret;
217
218 qphy->core_clk = devm_clk_get(dev, "core");
219 if (IS_ERR(qphy->core_clk))
220 return PTR_ERR(qphy->core_clk);
221
222 qphy->iface_clk = devm_clk_get(dev, "iface");
223 if (IS_ERR(qphy->iface_clk))
224 return PTR_ERR(qphy->iface_clk);
225
226 qphy->regulator[0].supply = "v3p3";
227 qphy->regulator[1].supply = "v1p8";
228 qphy->regulator[2].supply = "vddcx";
229
230 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(qphy->regulator),
231 qphy->regulator);
232 if (ret)
233 return ret;
234
235 qphy->phy_reset = devm_reset_control_get(dev, "phy");
236 if (IS_ERR(qphy->phy_reset))
237 return PTR_ERR(qphy->phy_reset);
238
239 qphy->switch_gpio = devm_gpiod_get_optional(dev, "switch",
240 GPIOD_OUT_LOW);
241 return PTR_ERR_OR_ZERO(qphy->switch_gpio);
242}
243
244static int phy_8x16_reboot_notify(struct notifier_block *this,
245 unsigned long code, void *unused)
246{
247 struct phy_8x16 *qphy;
248
249 qphy = container_of(this, struct phy_8x16, reboot_notify);
250
251
252
253
254
255 gpiod_set_value_cansleep(qphy->switch_gpio, 0);
256 return NOTIFY_DONE;
257}
258
259static int phy_8x16_probe(struct platform_device *pdev)
260{
261 struct phy_8x16 *qphy;
262 struct resource *res;
263 struct usb_phy *phy;
264 int ret;
265
266 qphy = devm_kzalloc(&pdev->dev, sizeof(*qphy), GFP_KERNEL);
267 if (!qphy)
268 return -ENOMEM;
269
270 platform_set_drvdata(pdev, qphy);
271
272 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
273 if (!res)
274 return -EINVAL;
275
276 qphy->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
277 if (!qphy->regs)
278 return -ENOMEM;
279
280 phy = &qphy->phy;
281 phy->dev = &pdev->dev;
282 phy->label = dev_name(&pdev->dev);
283 phy->init = phy_8x16_init;
284 phy->shutdown = phy_8x16_shutdown;
285 phy->notify_connect = phy_8x16_notify_connect;
286 phy->notify_disconnect = phy_8x16_notify_disconnect;
287 phy->io_priv = qphy->regs + HSPHY_ULPI_VIEWPORT;
288 phy->io_ops = &ulpi_viewport_access_ops;
289 phy->type = USB_PHY_TYPE_USB2;
290 phy->vbus_nb.notifier_call = phy_8x16_vbus_notify;
291 phy->id_nb.notifier_call = NULL;
292
293 ret = phy_8x16_read_devicetree(qphy);
294 if (ret < 0)
295 return ret;
296
297 ret = clk_set_rate(qphy->core_clk, INT_MAX);
298 if (ret < 0)
299 dev_dbg(phy->dev, "Can't boost core clock\n");
300
301 ret = clk_prepare_enable(qphy->core_clk);
302 if (ret < 0)
303 return ret;
304
305 ret = clk_prepare_enable(qphy->iface_clk);
306 if (ret < 0)
307 goto off_core;
308
309 ret = regulator_bulk_enable(ARRAY_SIZE(qphy->regulator),
310 qphy->regulator);
311 if (WARN_ON(ret))
312 goto off_clks;
313
314 ret = usb_add_phy_dev(&qphy->phy);
315 if (ret)
316 goto off_power;
317
318 qphy->reboot_notify.notifier_call = phy_8x16_reboot_notify;
319 register_reboot_notifier(&qphy->reboot_notify);
320
321 return 0;
322
323off_power:
324 regulator_bulk_disable(ARRAY_SIZE(qphy->regulator), qphy->regulator);
325off_clks:
326 clk_disable_unprepare(qphy->iface_clk);
327off_core:
328 clk_disable_unprepare(qphy->core_clk);
329 return ret;
330}
331
332static int phy_8x16_remove(struct platform_device *pdev)
333{
334 struct phy_8x16 *qphy = platform_get_drvdata(pdev);
335
336 unregister_reboot_notifier(&qphy->reboot_notify);
337
338
339
340
341
342 gpiod_set_value_cansleep(qphy->switch_gpio, 0);
343
344 usb_remove_phy(&qphy->phy);
345
346 clk_disable_unprepare(qphy->iface_clk);
347 clk_disable_unprepare(qphy->core_clk);
348 regulator_bulk_disable(ARRAY_SIZE(qphy->regulator), qphy->regulator);
349 return 0;
350}
351
352static const struct of_device_id phy_8x16_dt_match[] = {
353 { .compatible = "qcom,usb-8x16-phy" },
354 { }
355};
356MODULE_DEVICE_TABLE(of, phy_8x16_dt_match);
357
358static struct platform_driver phy_8x16_driver = {
359 .probe = phy_8x16_probe,
360 .remove = phy_8x16_remove,
361 .driver = {
362 .name = "phy-qcom-8x16-usb",
363 .of_match_table = phy_8x16_dt_match,
364 },
365};
366module_platform_driver(phy_8x16_driver);
367
368MODULE_LICENSE("GPL v2");
369MODULE_DESCRIPTION("Qualcomm APQ8016/MSM8916 chipsets USB transceiver driver");
370
