linux/include/dt-bindings/clock/qcom,gcc-ipq8074.h
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   1/*
   2 * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
   3 *
   4 * This software is licensed under the terms of the GNU General Public
   5 * License version 2, as published by the Free Software Foundation, and
   6 * may be copied, distributed, and modified under those terms.
   7 *
   8 * This program is distributed in the hope that it will be useful,
   9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11 * GNU General Public License for more details.
  12 */
  13
  14#ifndef _DT_BINDINGS_CLOCK_IPQ_GCC_8074_H
  15#define _DT_BINDINGS_CLOCK_IPQ_GCC_8074_H
  16
  17#define GPLL0                                   0
  18#define GPLL0_MAIN                              1
  19#define GCC_SLEEP_CLK_SRC                       2
  20#define BLSP1_QUP1_I2C_APPS_CLK_SRC             3
  21#define BLSP1_QUP1_SPI_APPS_CLK_SRC             4
  22#define BLSP1_QUP2_I2C_APPS_CLK_SRC             5
  23#define BLSP1_QUP2_SPI_APPS_CLK_SRC             6
  24#define BLSP1_QUP3_I2C_APPS_CLK_SRC             7
  25#define BLSP1_QUP3_SPI_APPS_CLK_SRC             8
  26#define BLSP1_QUP4_I2C_APPS_CLK_SRC             9
  27#define BLSP1_QUP4_SPI_APPS_CLK_SRC             10
  28#define BLSP1_QUP5_I2C_APPS_CLK_SRC             11
  29#define BLSP1_QUP5_SPI_APPS_CLK_SRC             12
  30#define BLSP1_QUP6_I2C_APPS_CLK_SRC             13
  31#define BLSP1_QUP6_SPI_APPS_CLK_SRC             14
  32#define BLSP1_UART1_APPS_CLK_SRC                15
  33#define BLSP1_UART2_APPS_CLK_SRC                16
  34#define BLSP1_UART3_APPS_CLK_SRC                17
  35#define BLSP1_UART4_APPS_CLK_SRC                18
  36#define BLSP1_UART5_APPS_CLK_SRC                19
  37#define BLSP1_UART6_APPS_CLK_SRC                20
  38#define GCC_BLSP1_AHB_CLK                       21
  39#define GCC_BLSP1_QUP1_I2C_APPS_CLK             22
  40#define GCC_BLSP1_QUP1_SPI_APPS_CLK             23
  41#define GCC_BLSP1_QUP2_I2C_APPS_CLK             24
  42#define GCC_BLSP1_QUP2_SPI_APPS_CLK             25
  43#define GCC_BLSP1_QUP3_I2C_APPS_CLK             26
  44#define GCC_BLSP1_QUP3_SPI_APPS_CLK             27
  45#define GCC_BLSP1_QUP4_I2C_APPS_CLK             28
  46#define GCC_BLSP1_QUP4_SPI_APPS_CLK             29
  47#define GCC_BLSP1_QUP5_I2C_APPS_CLK             30
  48#define GCC_BLSP1_QUP5_SPI_APPS_CLK             31
  49#define GCC_BLSP1_QUP6_I2C_APPS_CLK             32
  50#define GCC_BLSP1_QUP6_SPI_APPS_CLK             33
  51#define GCC_BLSP1_UART1_APPS_CLK                34
  52#define GCC_BLSP1_UART2_APPS_CLK                35
  53#define GCC_BLSP1_UART3_APPS_CLK                36
  54#define GCC_BLSP1_UART4_APPS_CLK                37
  55#define GCC_BLSP1_UART5_APPS_CLK                38
  56#define GCC_BLSP1_UART6_APPS_CLK                39
  57#define GCC_PRNG_AHB_CLK                        40
  58#define GCC_QPIC_AHB_CLK                        41
  59#define GCC_QPIC_CLK                            42
  60#define PCNOC_BFDCD_CLK_SRC                     43
  61
  62#define GCC_BLSP1_BCR                           0
  63#define GCC_BLSP1_QUP1_BCR                      1
  64#define GCC_BLSP1_UART1_BCR                     2
  65#define GCC_BLSP1_QUP2_BCR                      3
  66#define GCC_BLSP1_UART2_BCR                     4
  67#define GCC_BLSP1_QUP3_BCR                      5
  68#define GCC_BLSP1_UART3_BCR                     6
  69#define GCC_BLSP1_QUP4_BCR                      7
  70#define GCC_BLSP1_UART4_BCR                     8
  71#define GCC_BLSP1_QUP5_BCR                      9
  72#define GCC_BLSP1_UART5_BCR                     10
  73#define GCC_BLSP1_QUP6_BCR                      11
  74#define GCC_BLSP1_UART6_BCR                     12
  75#define GCC_IMEM_BCR                            13
  76#define GCC_SMMU_BCR                            14
  77#define GCC_APSS_TCU_BCR                        15
  78#define GCC_SMMU_XPU_BCR                        16
  79#define GCC_PCNOC_TBU_BCR                       17
  80#define GCC_SMMU_CFG_BCR                        18
  81#define GCC_PRNG_BCR                            19
  82#define GCC_BOOT_ROM_BCR                        20
  83#define GCC_CRYPTO_BCR                          21
  84#define GCC_WCSS_BCR                            22
  85#define GCC_WCSS_Q6_BCR                         23
  86#define GCC_NSS_BCR                             24
  87#define GCC_SEC_CTRL_BCR                        25
  88#define GCC_ADSS_BCR                            26
  89#define GCC_DDRSS_BCR                           27
  90#define GCC_SYSTEM_NOC_BCR                      28
  91#define GCC_PCNOC_BCR                           29
  92#define GCC_TCSR_BCR                            30
  93#define GCC_QDSS_BCR                            31
  94#define GCC_DCD_BCR                             32
  95#define GCC_MSG_RAM_BCR                         33
  96#define GCC_MPM_BCR                             34
  97#define GCC_SPMI_BCR                            35
  98#define GCC_SPDM_BCR                            36
  99#define GCC_RBCPR_BCR                           37
 100#define GCC_RBCPR_MX_BCR                        38
 101#define GCC_TLMM_BCR                            39
 102#define GCC_RBCPR_WCSS_BCR                      40
 103#define GCC_USB0_PHY_BCR                        41
 104#define GCC_USB3PHY_0_PHY_BCR                   42
 105#define GCC_USB0_BCR                            43
 106#define GCC_USB1_PHY_BCR                        44
 107#define GCC_USB3PHY_1_PHY_BCR                   45
 108#define GCC_USB1_BCR                            46
 109#define GCC_QUSB2_0_PHY_BCR                     47
 110#define GCC_QUSB2_1_PHY_BCR                     48
 111#define GCC_SDCC1_BCR                           49
 112#define GCC_SDCC2_BCR                           50
 113#define GCC_SNOC_BUS_TIMEOUT0_BCR               51
 114#define GCC_SNOC_BUS_TIMEOUT2_BCR               52
 115#define GCC_SNOC_BUS_TIMEOUT3_BCR               53
 116#define GCC_PCNOC_BUS_TIMEOUT0_BCR              54
 117#define GCC_PCNOC_BUS_TIMEOUT1_BCR              55
 118#define GCC_PCNOC_BUS_TIMEOUT2_BCR              56
 119#define GCC_PCNOC_BUS_TIMEOUT3_BCR              57
 120#define GCC_PCNOC_BUS_TIMEOUT4_BCR              58
 121#define GCC_PCNOC_BUS_TIMEOUT5_BCR              59
 122#define GCC_PCNOC_BUS_TIMEOUT6_BCR              60
 123#define GCC_PCNOC_BUS_TIMEOUT7_BCR              61
 124#define GCC_PCNOC_BUS_TIMEOUT8_BCR              62
 125#define GCC_PCNOC_BUS_TIMEOUT9_BCR              63
 126#define GCC_UNIPHY0_BCR                         64
 127#define GCC_UNIPHY1_BCR                         65
 128#define GCC_UNIPHY2_BCR                         66
 129#define GCC_CMN_12GPLL_BCR                      67
 130#define GCC_QPIC_BCR                            68
 131#define GCC_MDIO_BCR                            69
 132#define GCC_PCIE1_TBU_BCR                       70
 133#define GCC_WCSS_CORE_TBU_BCR                   71
 134#define GCC_WCSS_Q6_TBU_BCR                     72
 135#define GCC_USB0_TBU_BCR                        73
 136#define GCC_USB1_TBU_BCR                        74
 137#define GCC_PCIE0_TBU_BCR                       75
 138#define GCC_NSS_NOC_TBU_BCR                     76
 139#define GCC_PCIE0_BCR                           77
 140#define GCC_PCIE0_PHY_BCR                       78
 141#define GCC_PCIE0PHY_PHY_BCR                    79
 142#define GCC_PCIE0_LINK_DOWN_BCR                 80
 143#define GCC_PCIE1_BCR                           81
 144#define GCC_PCIE1_PHY_BCR                       82
 145#define GCC_PCIE1PHY_PHY_BCR                    83
 146#define GCC_PCIE1_LINK_DOWN_BCR                 84
 147#define GCC_DCC_BCR                             85
 148#define GCC_APC0_VOLTAGE_DROOP_DETECTOR_BCR     86
 149#define GCC_APC1_VOLTAGE_DROOP_DETECTOR_BCR     87
 150#define GCC_SMMU_CATS_BCR                       88
 151
 152#endif
 153