1/* 2 * FPGA Framework 3 * 4 * Copyright (C) 2013-2015 Altera Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along with 16 * this program. If not, see <http://www.gnu.org/licenses/>. 17 */ 18#include <linux/mutex.h> 19#include <linux/platform_device.h> 20 21#ifndef _LINUX_FPGA_MGR_H 22#define _LINUX_FPGA_MGR_H 23 24struct fpga_manager; 25struct sg_table; 26 27/** 28 * enum fpga_mgr_states - fpga framework states 29 * @FPGA_MGR_STATE_UNKNOWN: can't determine state 30 * @FPGA_MGR_STATE_POWER_OFF: FPGA power is off 31 * @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up 32 * @FPGA_MGR_STATE_RESET: FPGA in reset state 33 * @FPGA_MGR_STATE_FIRMWARE_REQ: firmware request in progress 34 * @FPGA_MGR_STATE_FIRMWARE_REQ_ERR: firmware request failed 35 * @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming 36 * @FPGA_MGR_STATE_WRITE_INIT_ERR: Error during WRITE_INIT stage 37 * @FPGA_MGR_STATE_WRITE: writing image to FPGA 38 * @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA 39 * @FPGA_MGR_STATE_WRITE_COMPLETE: Doing post programming steps 40 * @FPGA_MGR_STATE_WRITE_COMPLETE_ERR: Error during WRITE_COMPLETE 41 * @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating 42 */ 43enum fpga_mgr_states { 44 /* default FPGA states */ 45 FPGA_MGR_STATE_UNKNOWN, 46 FPGA_MGR_STATE_POWER_OFF, 47 FPGA_MGR_STATE_POWER_UP, 48 FPGA_MGR_STATE_RESET, 49 50 /* getting an image for loading */ 51 FPGA_MGR_STATE_FIRMWARE_REQ, 52 FPGA_MGR_STATE_FIRMWARE_REQ_ERR, 53 54 /* write sequence: init, write, complete */ 55 FPGA_MGR_STATE_WRITE_INIT, 56 FPGA_MGR_STATE_WRITE_INIT_ERR, 57 FPGA_MGR_STATE_WRITE, 58 FPGA_MGR_STATE_WRITE_ERR, 59 FPGA_MGR_STATE_WRITE_COMPLETE, 60 FPGA_MGR_STATE_WRITE_COMPLETE_ERR, 61 62 /* fpga is programmed and operating */ 63 FPGA_MGR_STATE_OPERATING, 64}; 65 66/* 67 * FPGA Manager flags 68 * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported 69 * FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux booting 70 */ 71#define FPGA_MGR_PARTIAL_RECONFIG BIT(0) 72#define FPGA_MGR_EXTERNAL_CONFIG BIT(1) 73#define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2) 74 75/** 76 * struct fpga_image_info - information specific to a FPGA image 77 * @flags: boolean flags as defined above 78 * @enable_timeout_us: maximum time to enable traffic through bridge (uSec) 79 * @disable_timeout_us: maximum time to disable traffic through bridge (uSec) 80 * @config_complete_timeout_us: maximum time for FPGA to switch to operating 81 * status in the write_complete op. 82 */ 83struct fpga_image_info { 84 u32 flags; 85 u32 enable_timeout_us; 86 u32 disable_timeout_us; 87 u32 config_complete_timeout_us; 88}; 89 90/** 91 * struct fpga_manager_ops - ops for low level fpga manager drivers 92 * @initial_header_size: Maximum number of bytes that should be passed into write_init 93 * @state: returns an enum value of the FPGA's state 94 * @write_init: prepare the FPGA to receive confuration data 95 * @write: write count bytes of configuration data to the FPGA 96 * @write_sg: write the scatter list of configuration data to the FPGA 97 * @write_complete: set FPGA to operating state after writing is done 98 * @fpga_remove: optional: Set FPGA into a specific state during driver remove 99 * 100 * fpga_manager_ops are the low level functions implemented by a specific 101 * fpga manager driver. The optional ones are tested for NULL before being 102 * called, so leaving them out is fine. 103 */ 104struct fpga_manager_ops { 105 size_t initial_header_size; 106 enum fpga_mgr_states (*state)(struct fpga_manager *mgr); 107 int (*write_init)(struct fpga_manager *mgr, 108 struct fpga_image_info *info, 109 const char *buf, size_t count); 110 int (*write)(struct fpga_manager *mgr, const char *buf, size_t count); 111 int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt); 112 int (*write_complete)(struct fpga_manager *mgr, 113 struct fpga_image_info *info); 114 void (*fpga_remove)(struct fpga_manager *mgr); 115}; 116 117/** 118 * struct fpga_manager - fpga manager structure 119 * @name: name of low level fpga manager 120 * @dev: fpga manager device 121 * @ref_mutex: only allows one reference to fpga manager 122 * @state: state of fpga manager 123 * @mops: pointer to struct of fpga manager ops 124 * @priv: low level driver private date 125 */ 126struct fpga_manager { 127 const char *name; 128 struct device dev; 129 struct mutex ref_mutex; 130 enum fpga_mgr_states state; 131 const struct fpga_manager_ops *mops; 132 void *priv; 133}; 134 135#define to_fpga_manager(d) container_of(d, struct fpga_manager, dev) 136 137int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info, 138 const char *buf, size_t count); 139int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info, 140 struct sg_table *sgt); 141 142int fpga_mgr_firmware_load(struct fpga_manager *mgr, 143 struct fpga_image_info *info, 144 const char *image_name); 145 146struct fpga_manager *of_fpga_mgr_get(struct device_node *node); 147 148struct fpga_manager *fpga_mgr_get(struct device *dev); 149 150void fpga_mgr_put(struct fpga_manager *mgr); 151 152int fpga_mgr_register(struct device *dev, const char *name, 153 const struct fpga_manager_ops *mops, void *priv); 154 155void fpga_mgr_unregister(struct device *dev); 156 157#endif /*_LINUX_FPGA_MGR_H */ 158