LXR linux/include/linux/mmc/host.h

   1/*
   2 *  linux/include/linux/mmc/host.h
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License version 2 as
   6 * published by the Free Software Foundation.
   7 *
   8 *  Host driver specific definitions.
   9 */
  10#ifndef LINUX_MMC_HOST_H
  11#define LINUX_MMC_HOST_H
  12
  13#include <linux/sched.h>
  14#include <linux/device.h>
  15#include <linux/fault-inject.h>
  16
  17#include <linux/mmc/core.h>
  18#include <linux/mmc/card.h>
  19#include <linux/mmc/pm.h>
  20#include <linux/dma-direction.h>
  21
  22struct mmc_ios {
  23        unsigned int    clock;                  /* clock rate */
  24        unsigned short  vdd;
  25
  26/* vdd stores the bit number of the selected voltage range from below. */
  27
  28        unsigned char   bus_mode;               /* command output mode */
  29
  30#define MMC_BUSMODE_OPENDRAIN   1
  31#define MMC_BUSMODE_PUSHPULL    2
  32
  33        unsigned char   chip_select;            /* SPI chip select */
  34
  35#define MMC_CS_DONTCARE         0
  36#define MMC_CS_HIGH             1
  37#define MMC_CS_LOW              2
  38
  39        unsigned char   power_mode;             /* power supply mode */
  40
  41#define MMC_POWER_OFF           0
  42#define MMC_POWER_UP            1
  43#define MMC_POWER_ON            2
  44#define MMC_POWER_UNDEFINED     3
  45
  46        unsigned char   bus_width;              /* data bus width */
  47
  48#define MMC_BUS_WIDTH_1         0
  49#define MMC_BUS_WIDTH_4         2
  50#define MMC_BUS_WIDTH_8         3
  51
  52        unsigned char   timing;                 /* timing specification used */
  53
  54#define MMC_TIMING_LEGACY       0
  55#define MMC_TIMING_MMC_HS       1
  56#define MMC_TIMING_SD_HS        2
  57#define MMC_TIMING_UHS_SDR12    3
  58#define MMC_TIMING_UHS_SDR25    4
  59#define MMC_TIMING_UHS_SDR50    5
  60#define MMC_TIMING_UHS_SDR104   6
  61#define MMC_TIMING_UHS_DDR50    7
  62#define MMC_TIMING_MMC_DDR52    8
  63#define MMC_TIMING_MMC_HS200    9
  64#define MMC_TIMING_MMC_HS400    10
  65
  66        unsigned char   signal_voltage;         /* signalling voltage (1.8V or 3.3V) */
  67
  68#define MMC_SIGNAL_VOLTAGE_330  0
  69#define MMC_SIGNAL_VOLTAGE_180  1
  70#define MMC_SIGNAL_VOLTAGE_120  2
  71
  72        unsigned char   drv_type;               /* driver type (A, B, C, D) */
  73
  74#define MMC_SET_DRIVER_TYPE_B   0
  75#define MMC_SET_DRIVER_TYPE_A   1
  76#define MMC_SET_DRIVER_TYPE_C   2
  77#define MMC_SET_DRIVER_TYPE_D   3
  78
  79        bool enhanced_strobe;                   /* hs400es selection */
  80};
  81
  82struct mmc_host;
  83
  84struct mmc_host_ops {
  85        /*
  86         * It is optional for the host to implement pre_req and post_req in
  87         * order to support double buffering of requests (prepare one
  88         * request while another request is active).
  89         * pre_req() must always be followed by a post_req().
  90         * To undo a call made to pre_req(), call post_req() with
  91         * a nonzero err condition.
  92         */
  93        void    (*post_req)(struct mmc_host *host, struct mmc_request *req,
  94                            int err);
  95        void    (*pre_req)(struct mmc_host *host, struct mmc_request *req);
  96        void    (*request)(struct mmc_host *host, struct mmc_request *req);
  97
  98        /*
  99         * Avoid calling the next three functions too often or in a "fast
 100         * path", since underlaying controller might implement them in an
 101         * expensive and/or slow way. Also note that these functions might
 102         * sleep, so don't call them in the atomic contexts!
 103         */
 104
 105        /*
 106         * Notes to the set_ios callback:
 107         * ios->clock might be 0. For some controllers, setting 0Hz
 108         * as any other frequency works. However, some controllers
 109         * explicitly need to disable the clock. Otherwise e.g. voltage
 110         * switching might fail because the SDCLK is not really quiet.
 111         */
 112        void    (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
 113
 114        /*
 115         * Return values for the get_ro callback should be:
 116         *   0 for a read/write card
 117         *   1 for a read-only card
 118         *   -ENOSYS when not supported (equal to NULL callback)
 119         *   or a negative errno value when something bad happened
 120         */
 121        int     (*get_ro)(struct mmc_host *host);
 122
 123        /*
 124         * Return values for the get_cd callback should be:
 125         *   0 for a absent card
 126         *   1 for a present card
 127         *   -ENOSYS when not supported (equal to NULL callback)
 128         *   or a negative errno value when something bad happened
 129         */
 130        int     (*get_cd)(struct mmc_host *host);
 131
 132        void    (*enable_sdio_irq)(struct mmc_host *host, int enable);
 133        void    (*ack_sdio_irq)(struct mmc_host *host);
 134
 135        /* optional callback for HC quirks */
 136        void    (*init_card)(struct mmc_host *host, struct mmc_card *card);
 137
 138        int     (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
 139
 140        /* Check if the card is pulling dat[0:3] low */
 141        int     (*card_busy)(struct mmc_host *host);
 142
 143        /* The tuning command opcode value is different for SD and eMMC cards */
 144        int     (*execute_tuning)(struct mmc_host *host, u32 opcode);
 145
 146        /* Prepare HS400 target operating frequency depending host driver */
 147        int     (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
 148        /* Prepare enhanced strobe depending host driver */
 149        void    (*hs400_enhanced_strobe)(struct mmc_host *host,
 150                                         struct mmc_ios *ios);
 151        int     (*select_drive_strength)(struct mmc_card *card,
 152                                         unsigned int max_dtr, int host_drv,
 153                                         int card_drv, int *drv_type);
 154        void    (*hw_reset)(struct mmc_host *host);
 155        void    (*card_event)(struct mmc_host *host);
 156
 157        /*
 158         * Optional callback to support controllers with HW issues for multiple
 159         * I/O. Returns the number of supported blocks for the request.
 160         */
 161        int     (*multi_io_quirk)(struct mmc_card *card,
 162                                  unsigned int direction, int blk_size);
 163};
 164
 165struct mmc_async_req {
 166        /* active mmc request */
 167        struct mmc_request      *mrq;
 168        /*
 169         * Check error status of completed mmc request.
 170         * Returns 0 if success otherwise non zero.
 171         */
 172        enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
 173};
 174
 175/**
 176 * struct mmc_slot - MMC slot functions
 177 *
 178 * @cd_irq:             MMC/SD-card slot hotplug detection IRQ or -EINVAL
 179 * @handler_priv:       MMC/SD-card slot context
 180 *
 181 * Some MMC/SD host controllers implement slot-functions like card and
 182 * write-protect detection natively. However, a large number of controllers
 183 * leave these functions to the CPU. This struct provides a hook to attach
 184 * such slot-function drivers.
 185 */
 186struct mmc_slot {
 187        int cd_irq;
 188        bool cd_wake_enabled;
 189        void *handler_priv;
 190};
 191
 192/**
 193 * mmc_context_info - synchronization details for mmc context
 194 * @is_done_rcv         wake up reason was done request
 195 * @is_new_req          wake up reason was new request
 196 * @is_waiting_last_req mmc context waiting for single running request
 197 * @wait                wait queue
 198 */
 199struct mmc_context_info {
 200        bool                    is_done_rcv;
 201        bool                    is_new_req;
 202        bool                    is_waiting_last_req;
 203        wait_queue_head_t       wait;
 204};
 205
 206struct regulator;
 207struct mmc_pwrseq;
 208
 209struct mmc_supply {
 210        struct regulator *vmmc;         /* Card power supply */
 211        struct regulator *vqmmc;        /* Optional Vccq supply */
 212};
 213
 214struct mmc_host {
 215        struct device           *parent;
 216        struct device           class_dev;
 217        int                     index;
 218        const struct mmc_host_ops *ops;
 219        struct mmc_pwrseq       *pwrseq;
 220        unsigned int            f_min;
 221        unsigned int            f_max;
 222        unsigned int            f_init;
 223        u32                     ocr_avail;
 224        u32                     ocr_avail_sdio; /* SDIO-specific OCR */
 225        u32                     ocr_avail_sd;   /* SD-specific OCR */
 226        u32                     ocr_avail_mmc;  /* MMC-specific OCR */
 227#ifdef CONFIG_PM_SLEEP
 228        struct notifier_block   pm_notify;
 229#endif
 230        u32                     max_current_330;
 231        u32                     max_current_300;
 232        u32                     max_current_180;
 233
 234#define MMC_VDD_165_195         0x00000080      /* VDD voltage 1.65 - 1.95 */
 235#define MMC_VDD_20_21           0x00000100      /* VDD voltage 2.0 ~ 2.1 */
 236#define MMC_VDD_21_22           0x00000200      /* VDD voltage 2.1 ~ 2.2 */
 237#define MMC_VDD_22_23           0x00000400      /* VDD voltage 2.2 ~ 2.3 */
 238#define MMC_VDD_23_24           0x00000800      /* VDD voltage 2.3 ~ 2.4 */
 239#define MMC_VDD_24_25           0x00001000      /* VDD voltage 2.4 ~ 2.5 */
 240#define MMC_VDD_25_26           0x00002000      /* VDD voltage 2.5 ~ 2.6 */
 241#define MMC_VDD_26_27           0x00004000      /* VDD voltage 2.6 ~ 2.7 */
 242#define MMC_VDD_27_28           0x00008000      /* VDD voltage 2.7 ~ 2.8 */
 243#define MMC_VDD_28_29           0x00010000      /* VDD voltage 2.8 ~ 2.9 */
 244#define MMC_VDD_29_30           0x00020000      /* VDD voltage 2.9 ~ 3.0 */
 245#define MMC_VDD_30_31           0x00040000      /* VDD voltage 3.0 ~ 3.1 */
 246#define MMC_VDD_31_32           0x00080000      /* VDD voltage 3.1 ~ 3.2 */
 247#define MMC_VDD_32_33           0x00100000      /* VDD voltage 3.2 ~ 3.3 */
 248#define MMC_VDD_33_34           0x00200000      /* VDD voltage 3.3 ~ 3.4 */
 249#define MMC_VDD_34_35           0x00400000      /* VDD voltage 3.4 ~ 3.5 */
 250#define MMC_VDD_35_36           0x00800000      /* VDD voltage 3.5 ~ 3.6 */
 251
 252        u32                     caps;           /* Host capabilities */
 253
 254#define MMC_CAP_4_BIT_DATA      (1 << 0)        /* Can the host do 4 bit transfers */
 255#define MMC_CAP_MMC_HIGHSPEED   (1 << 1)        /* Can do MMC high-speed timing */
 256#define MMC_CAP_SD_HIGHSPEED    (1 << 2)        /* Can do SD high-speed timing */
 257#define MMC_CAP_SDIO_IRQ        (1 << 3)        /* Can signal pending SDIO IRQs */
 258#define MMC_CAP_SPI             (1 << 4)        /* Talks only SPI protocols */
 259#define MMC_CAP_NEEDS_POLL      (1 << 5)        /* Needs polling for card-detection */
 260#define MMC_CAP_8_BIT_DATA      (1 << 6)        /* Can the host do 8 bit transfers */
 261#define MMC_CAP_AGGRESSIVE_PM   (1 << 7)        /* Suspend (e)MMC/SD at idle  */
 262#define MMC_CAP_NONREMOVABLE    (1 << 8)        /* Nonremovable e.g. eMMC */
 263#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)        /* Waits while card is busy */
 264#define MMC_CAP_ERASE           (1 << 10)       /* Allow erase/trim commands */
 265#define MMC_CAP_3_3V_DDR        (1 << 11)       /* Host supports eMMC DDR 3.3V */
 266#define MMC_CAP_1_8V_DDR        (1 << 12)       /* Host supports eMMC DDR 1.8V */
 267#define MMC_CAP_1_2V_DDR        (1 << 13)       /* Host supports eMMC DDR 1.2V */
 268#define MMC_CAP_POWER_OFF_CARD  (1 << 14)       /* Can power off after boot */
 269#define MMC_CAP_BUS_WIDTH_TEST  (1 << 15)       /* CMD14/CMD19 bus width ok */
 270#define MMC_CAP_UHS_SDR12       (1 << 16)       /* Host supports UHS SDR12 mode */
 271#define MMC_CAP_UHS_SDR25       (1 << 17)       /* Host supports UHS SDR25 mode */
 272#define MMC_CAP_UHS_SDR50       (1 << 18)       /* Host supports UHS SDR50 mode */
 273#define MMC_CAP_UHS_SDR104      (1 << 19)       /* Host supports UHS SDR104 mode */
 274#define MMC_CAP_UHS_DDR50       (1 << 20)       /* Host supports UHS DDR50 mode */
 275#define MMC_CAP_NO_BOUNCE_BUFF  (1 << 21)       /* Disable bounce buffers on host */
 276#define MMC_CAP_DRIVER_TYPE_A   (1 << 23)       /* Host supports Driver Type A */
 277#define MMC_CAP_DRIVER_TYPE_C   (1 << 24)       /* Host supports Driver Type C */
 278#define MMC_CAP_DRIVER_TYPE_D   (1 << 25)       /* Host supports Driver Type D */
 279#define MMC_CAP_CD_WAKE         (1 << 28)       /* Enable card detect wake */
 280#define MMC_CAP_CMD_DURING_TFR  (1 << 29)       /* Commands during data transfer */
 281#define MMC_CAP_CMD23           (1 << 30)       /* CMD23 supported. */
 282#define MMC_CAP_HW_RESET        (1 << 31)       /* Hardware reset */
 283
 284        u32                     caps2;          /* More host capabilities */
 285
 286#define MMC_CAP2_BOOTPART_NOACC (1 << 0)        /* Boot partition no access */
 287#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)        /* Can do full power cycle */
 288#define MMC_CAP2_HS200_1_8V_SDR (1 << 5)        /* can support */
 289#define MMC_CAP2_HS200_1_2V_SDR (1 << 6)        /* can support */
 290#define MMC_CAP2_HS200          (MMC_CAP2_HS200_1_8V_SDR | \
 291                                 MMC_CAP2_HS200_1_2V_SDR)
 292#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)       /* Card-detect signal active high */
 293#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)       /* Write-protect signal active high */
 294#define MMC_CAP2_PACKED_RD      (1 << 12)       /* Allow packed read */
 295#define MMC_CAP2_PACKED_WR      (1 << 13)       /* Allow packed write */
 296#define MMC_CAP2_PACKED_CMD     (MMC_CAP2_PACKED_RD | \
 297                                 MMC_CAP2_PACKED_WR)
 298#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)   /* Don't power up before scan */
 299#define MMC_CAP2_HS400_1_8V     (1 << 15)       /* Can support HS400 1.8V */
 300#define MMC_CAP2_HS400_1_2V     (1 << 16)       /* Can support HS400 1.2V */
 301#define MMC_CAP2_HS400          (MMC_CAP2_HS400_1_8V | \
 302                                 MMC_CAP2_HS400_1_2V)
 303#define MMC_CAP2_HSX00_1_2V     (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
 304#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
 305#define MMC_CAP2_NO_WRITE_PROTECT (1 << 18)     /* No physical write protect pin, assume that card is always read-write */
 306#define MMC_CAP2_NO_SDIO        (1 << 19)       /* Do not send SDIO commands during initialization */
 307#define MMC_CAP2_HS400_ES       (1 << 20)       /* Host supports enhanced strobe */
 308#define MMC_CAP2_NO_SD          (1 << 21)       /* Do not send SD commands during initialization */
 309#define MMC_CAP2_NO_MMC         (1 << 22)       /* Do not send (e)MMC commands during initialization */
 310
 311        mmc_pm_flag_t           pm_caps;        /* supported pm features */
 312
 313        /* host specific block data */
 314        unsigned int            max_seg_size;   /* see blk_queue_max_segment_size */
 315        unsigned short          max_segs;       /* see blk_queue_max_segments */
 316        unsigned short          unused;
 317        unsigned int            max_req_size;   /* maximum number of bytes in one req */
 318        unsigned int            max_blk_size;   /* maximum size of one mmc block */
 319        unsigned int            max_blk_count;  /* maximum number of blocks in one req */
 320        unsigned int            max_busy_timeout; /* max busy timeout in ms */
 321
 322        /* private data */
 323        spinlock_t              lock;           /* lock for claim and bus ops */
 324
 325        struct mmc_ios          ios;            /* current io bus settings */
 326
 327        /* group bitfields together to minimize padding */
 328        unsigned int            use_spi_crc:1;
 329        unsigned int            claimed:1;      /* host exclusively claimed */
 330        unsigned int            bus_dead:1;     /* bus has been released */
 331#ifdef CONFIG_MMC_DEBUG
 332        unsigned int            removed:1;      /* host is being removed */
 333#endif
 334        unsigned int            can_retune:1;   /* re-tuning can be used */
 335        unsigned int            doing_retune:1; /* re-tuning in progress */
 336        unsigned int            retune_now:1;   /* do re-tuning at next req */
 337        unsigned int            retune_paused:1; /* re-tuning is temporarily disabled */
 338
 339        int                     rescan_disable; /* disable card detection */
 340        int                     rescan_entered; /* used with nonremovable devices */
 341
 342        int                     need_retune;    /* re-tuning is needed */
 343        int                     hold_retune;    /* hold off re-tuning */
 344        unsigned int            retune_period;  /* re-tuning period in secs */
 345        struct timer_list       retune_timer;   /* for periodic re-tuning */
 346
 347        bool                    trigger_card_event; /* card_event necessary */
 348
 349        struct mmc_card         *card;          /* device attached to this host */
 350
 351        wait_queue_head_t       wq;
 352        struct task_struct      *claimer;       /* task that has host claimed */
 353        int                     claim_cnt;      /* "claim" nesting count */
 354
 355        struct delayed_work     detect;
 356        int                     detect_change;  /* card detect flag */
 357        struct mmc_slot         slot;
 358
 359        const struct mmc_bus_ops *bus_ops;      /* current bus driver */
 360        unsigned int            bus_refs;       /* reference counter */
 361
 362        unsigned int            sdio_irqs;
 363        struct task_struct      *sdio_irq_thread;
 364        struct delayed_work     sdio_irq_work;
 365        bool                    sdio_irq_pending;
 366        atomic_t                sdio_irq_thread_abort;
 367
 368        mmc_pm_flag_t           pm_flags;       /* requested pm features */
 369
 370        struct led_trigger      *led;           /* activity led */
 371
 372#ifdef CONFIG_REGULATOR
 373        bool                    regulator_enabled; /* regulator state */
 374#endif
 375        struct mmc_supply       supply;
 376
 377        struct dentry           *debugfs_root;
 378
 379        struct mmc_async_req    *areq;          /* active async req */
 380        struct mmc_context_info context_info;   /* async synchronization info */
 381
 382        /* Ongoing data transfer that allows commands during transfer */
 383        struct mmc_request      *ongoing_mrq;
 384
 385#ifdef CONFIG_FAIL_MMC_REQUEST
 386        struct fault_attr       fail_mmc_request;
 387#endif
 388
 389        unsigned int            actual_clock;   /* Actual HC clock rate */
 390
 391        unsigned int            slotno; /* used for sdio acpi binding */
 392
 393        int                     dsr_req;        /* DSR value is valid */
 394        u32                     dsr;    /* optional driver stage (DSR) value */
 395
 396        unsigned long           private[0] ____cacheline_aligned;
 397};
 398
 399struct device_node;
 400
 401struct mmc_host *mmc_alloc_host(int extra, struct device *);
 402int mmc_add_host(struct mmc_host *);
 403void mmc_remove_host(struct mmc_host *);
 404void mmc_free_host(struct mmc_host *);
 405int mmc_of_parse(struct mmc_host *host);
 406int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
 407
 408static inline void *mmc_priv(struct mmc_host *host)
 409{
 410        return (void *)host->private;
 411}
 412
 413#define mmc_host_is_spi(host)   ((host)->caps & MMC_CAP_SPI)
 414
 415#define mmc_dev(x)      ((x)->parent)
 416#define mmc_classdev(x) (&(x)->class_dev)
 417#define mmc_hostname(x) (dev_name(&(x)->class_dev))
 418
 419int mmc_power_save_host(struct mmc_host *host);
 420int mmc_power_restore_host(struct mmc_host *host);
 421
 422void mmc_detect_change(struct mmc_host *, unsigned long delay);
 423void mmc_request_done(struct mmc_host *, struct mmc_request *);
 424void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
 425
 426static inline void mmc_signal_sdio_irq(struct mmc_host *host)
 427{
 428        host->ops->enable_sdio_irq(host, 0);
 429        host->sdio_irq_pending = true;
 430        if (host->sdio_irq_thread)
 431                wake_up_process(host->sdio_irq_thread);
 432}
 433
 434void sdio_run_irqs(struct mmc_host *host);
 435void sdio_signal_irq(struct mmc_host *host);
 436
 437#ifdef CONFIG_REGULATOR
 438int mmc_regulator_get_ocrmask(struct regulator *supply);
 439int mmc_regulator_set_ocr(struct mmc_host *mmc,
 440                        struct regulator *supply,
 441                        unsigned short vdd_bit);
 442int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
 443#else
 444static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
 445{
 446        return 0;
 447}
 448
 449static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
 450                                 struct regulator *supply,
 451                                 unsigned short vdd_bit)
 452{
 453        return 0;
 454}
 455
 456static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
 457                                          struct mmc_ios *ios)
 458{
 459        return -EINVAL;
 460}
 461#endif
 462
 463u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max);
 464int mmc_regulator_get_supply(struct mmc_host *mmc);
 465
 466static inline int mmc_card_is_removable(struct mmc_host *host)
 467{
 468        return !(host->caps & MMC_CAP_NONREMOVABLE);
 469}
 470
 471static inline int mmc_card_keep_power(struct mmc_host *host)
 472{
 473        return host->pm_flags & MMC_PM_KEEP_POWER;
 474}
 475
 476static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
 477{
 478        return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
 479}
 480
 481/* TODO: Move to private header */
 482static inline int mmc_card_hs(struct mmc_card *card)
 483{
 484        return card->host->ios.timing == MMC_TIMING_SD_HS ||
 485                card->host->ios.timing == MMC_TIMING_MMC_HS;
 486}
 487
 488/* TODO: Move to private header */
 489static inline int mmc_card_uhs(struct mmc_card *card)
 490{
 491        return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
 492                card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
 493}
 494
 495void mmc_retune_timer_stop(struct mmc_host *host);
 496
 497static inline void mmc_retune_needed(struct mmc_host *host)
 498{
 499        if (host->can_retune)
 500                host->need_retune = 1;
 501}
 502
 503static inline bool mmc_can_retune(struct mmc_host *host)
 504{
 505        return host->can_retune == 1;
 506}
 507
 508static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
 509{
 510        return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 511}
 512
 513int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
 514int mmc_abort_tuning(struct mmc_host *host, u32 opcode);
 515
 516#endif /* LINUX_MMC_HOST_H */
 517