1#ifndef LINUX_MSI_H
2#define LINUX_MSI_H
3
4#include <linux/kobject.h>
5#include <linux/list.h>
6
7struct msi_msg {
8 u32 address_lo;
9 u32 address_hi;
10 u32 data;
11};
12
13extern int pci_msi_ignore_mask;
14
15struct irq_data;
16struct msi_desc;
17struct pci_dev;
18struct platform_msi_priv_data;
19void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
20#ifdef CONFIG_GENERIC_MSI_IRQ
21void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
22#else
23static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
24{
25}
26#endif
27
28typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
29 struct msi_msg *msg);
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36struct platform_msi_desc {
37 struct platform_msi_priv_data *msi_priv_data;
38 u16 msi_index;
39};
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45struct fsl_mc_msi_desc {
46 u16 msi_index;
47};
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70struct msi_desc {
71
72 struct list_head list;
73 unsigned int irq;
74 unsigned int nvec_used;
75 struct device *dev;
76 struct msi_msg msg;
77 struct cpumask *affinity;
78
79 union {
80
81 struct {
82 u32 masked;
83 struct {
84 __u8 is_msix : 1;
85 __u8 multiple : 3;
86 __u8 multi_cap : 3;
87 __u8 maskbit : 1;
88 __u8 is_64 : 1;
89 __u16 entry_nr;
90 unsigned default_irq;
91 } msi_attrib;
92 union {
93 u8 mask_pos;
94 void __iomem *mask_base;
95 };
96 };
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105 struct platform_msi_desc platform;
106 struct fsl_mc_msi_desc fsl_mc;
107 };
108};
109
110
111#define msi_desc_to_dev(desc) ((desc)->dev)
112#define dev_to_msi_list(dev) (&(dev)->msi_list)
113#define first_msi_entry(dev) \
114 list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
115#define for_each_msi_entry(desc, dev) \
116 list_for_each_entry((desc), dev_to_msi_list((dev)), list)
117
118#ifdef CONFIG_PCI_MSI
119#define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
120#define for_each_pci_msi_entry(desc, pdev) \
121 for_each_msi_entry((desc), &(pdev)->dev)
122
123struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
124void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
125void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
126#else
127static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
128{
129 return NULL;
130}
131static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
132{
133}
134#endif
135
136struct msi_desc *alloc_msi_entry(struct device *dev, int nvec,
137 const struct cpumask *affinity);
138void free_msi_entry(struct msi_desc *entry);
139void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
140void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
141
142u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
143u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
144void pci_msi_mask_irq(struct irq_data *data);
145void pci_msi_unmask_irq(struct irq_data *data);
146
147
148static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
149{
150 __pci_write_msi_msg(entry, msg);
151}
152static inline void write_msi_msg(int irq, struct msi_msg *msg)
153{
154 pci_write_msi_msg(irq, msg);
155}
156static inline void mask_msi_irq(struct irq_data *data)
157{
158 pci_msi_mask_irq(data);
159}
160static inline void unmask_msi_irq(struct irq_data *data)
161{
162 pci_msi_unmask_irq(data);
163}
164
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169
170int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
171void arch_teardown_msi_irq(unsigned int irq);
172int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
173void arch_teardown_msi_irqs(struct pci_dev *dev);
174void arch_restore_msi_irqs(struct pci_dev *dev);
175
176void default_teardown_msi_irqs(struct pci_dev *dev);
177void default_restore_msi_irqs(struct pci_dev *dev);
178
179struct msi_controller {
180 struct module *owner;
181 struct device *dev;
182 struct device_node *of_node;
183 struct list_head list;
184
185 int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
186 struct msi_desc *desc);
187 int (*setup_irqs)(struct msi_controller *chip, struct pci_dev *dev,
188 int nvec, int type);
189 void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
190};
191
192#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
193
194#include <linux/irqhandler.h>
195#include <asm/msi.h>
196
197struct irq_domain;
198struct irq_domain_ops;
199struct irq_chip;
200struct device_node;
201struct fwnode_handle;
202struct msi_domain_info;
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222struct msi_domain_ops {
223 irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
224 msi_alloc_info_t *arg);
225 int (*msi_init)(struct irq_domain *domain,
226 struct msi_domain_info *info,
227 unsigned int virq, irq_hw_number_t hwirq,
228 msi_alloc_info_t *arg);
229 void (*msi_free)(struct irq_domain *domain,
230 struct msi_domain_info *info,
231 unsigned int virq);
232 int (*msi_check)(struct irq_domain *domain,
233 struct msi_domain_info *info,
234 struct device *dev);
235 int (*msi_prepare)(struct irq_domain *domain,
236 struct device *dev, int nvec,
237 msi_alloc_info_t *arg);
238 void (*msi_finish)(msi_alloc_info_t *arg, int retval);
239 void (*set_desc)(msi_alloc_info_t *arg,
240 struct msi_desc *desc);
241 int (*handle_error)(struct irq_domain *domain,
242 struct msi_desc *desc, int error);
243};
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256struct msi_domain_info {
257 u32 flags;
258 struct msi_domain_ops *ops;
259 struct irq_chip *chip;
260 void *chip_data;
261 irq_flow_handler_t handler;
262 void *handler_data;
263 const char *handler_name;
264 void *data;
265};
266
267
268enum {
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273 MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
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278 MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
279
280 MSI_FLAG_MULTI_PCI_MSI = (1 << 2),
281
282 MSI_FLAG_PCI_MSIX = (1 << 3),
283
284 MSI_FLAG_ACTIVATE_EARLY = (1 << 4),
285};
286
287int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
288 bool force);
289
290struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
291 struct msi_domain_info *info,
292 struct irq_domain *parent);
293int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
294 int nvec);
295void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
296struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
297
298struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
299 struct msi_domain_info *info,
300 struct irq_domain *parent);
301int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
302 irq_write_msi_msg_t write_msi_msg);
303void platform_msi_domain_free_irqs(struct device *dev);
304
305
306int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
307 int nvec, msi_alloc_info_t *args);
308int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
309 int virq, int nvec, msi_alloc_info_t *args);
310struct irq_domain *
311platform_msi_create_device_domain(struct device *dev,
312 unsigned int nvec,
313 irq_write_msi_msg_t write_msi_msg,
314 const struct irq_domain_ops *ops,
315 void *host_data);
316int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
317 unsigned int nr_irqs);
318void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
319 unsigned int nvec);
320void *platform_msi_get_host_data(struct irq_domain *domain);
321#endif
322
323#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
324void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
325struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
326 struct msi_domain_info *info,
327 struct irq_domain *parent);
328irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
329 struct msi_desc *desc);
330int pci_msi_domain_check_cap(struct irq_domain *domain,
331 struct msi_domain_info *info, struct device *dev);
332u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
333struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
334#else
335static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
336{
337 return NULL;
338}
339#endif
340
341#endif
342