1
2
3
4#ifndef __LINUX_MTD_PFOW_H
5#define __LINUX_MTD_PFOW_H
6
7#include <linux/mtd/qinfo.h>
8
9
10
11#define PFOW_QUERY_STRING_P 0x0000
12
13#define PFOW_QUERY_STRING_F 0x0002
14
15#define PFOW_QUERY_STRING_O 0x0004
16
17#define PFOW_QUERY_STRING_W 0x0006
18
19#define PFOW_MANUFACTURER_ID 0x0020
20#define PFOW_DEVICE_ID 0x0022
21
22#define PFOW_PROGRAM_BUFFER_OFFSET 0x0040
23
24#define PFOW_PROGRAM_BUFFER_SIZE 0x0042
25
26#define PFOW_COMMAND_CODE 0x0080
27
28#define PFOW_COMMAND_DATA 0x0084
29
30#define PFOW_COMMAND_ADDRESS_L 0x0088
31
32#define PFOW_COMMAND_ADDRESS_H 0x008a
33
34#define PFOW_DATA_COUNT_L 0x0090
35
36#define PFOW_DATA_COUNT_H 0x0092
37
38#define PFOW_COMMAND_EXECUTE 0x00c0
39
40#define PFOW_CLEAR_PROGRAM_BUFFER 0x00c4
41
42#define PFOW_PROGRAM_ERASE_SUSPEND 0x00c8
43
44#define PFOW_DSR 0x00cc
45
46
47
48#define LPDDR_WORD_PROGRAM 0x0041
49#define LPDDR_BUFF_PROGRAM 0x00E9
50#define LPDDR_BLOCK_ERASE 0x0020
51#define LPDDR_LOCK_BLOCK 0x0061
52#define LPDDR_UNLOCK_BLOCK 0x0062
53#define LPDDR_READ_BLOCK_LOCK_STATUS 0x0065
54#define LPDDR_INFO_QUERY 0x0098
55#define LPDDR_READ_OTP 0x0097
56#define LPDDR_PROG_OTP 0x00C0
57#define LPDDR_RESUME 0x00D0
58
59
60#define LPDDR_START_EXECUTION 0x0001
61
62
63#define LPDDR_SUSPEND 0x0001
64
65
66
67#define DSR_DPS (1<<1)
68
69#define DSR_PSS (1<<2)
70
71
72#define DSR_VPPS (1<<3)
73#define DSR_PROGRAM_STATUS (1<<4)
74#define DSR_ERASE_STATUS (1<<5)
75
76
77#define DSR_ESS (1<<6)
78
79
80#define DSR_READY_STATUS (1<<7)
81
82
83#define DSR_RPS (0x3<<8)
84
85
86
87
88
89
90
91#define DSR_AOS (1<<12)
92#define DSR_AVAILABLE (1<<15)
93
94
95
96
97#define DSR_ERR 0x133A
98
99static inline void send_pfow_command(struct map_info *map,
100 unsigned long cmd_code, unsigned long adr,
101 unsigned long len, map_word *datum)
102{
103 int bits_per_chip = map_bankwidth(map) * 8;
104
105 map_write(map, CMD(cmd_code), map->pfow_base + PFOW_COMMAND_CODE);
106 map_write(map, CMD(adr & ((1<<bits_per_chip) - 1)),
107 map->pfow_base + PFOW_COMMAND_ADDRESS_L);
108 map_write(map, CMD(adr>>bits_per_chip),
109 map->pfow_base + PFOW_COMMAND_ADDRESS_H);
110 if (len) {
111 map_write(map, CMD(len & ((1<<bits_per_chip) - 1)),
112 map->pfow_base + PFOW_DATA_COUNT_L);
113 map_write(map, CMD(len>>bits_per_chip),
114 map->pfow_base + PFOW_DATA_COUNT_H);
115 }
116 if (datum)
117 map_write(map, *datum, map->pfow_base + PFOW_COMMAND_DATA);
118
119
120 map_write(map, CMD(LPDDR_START_EXECUTION),
121 map->pfow_base + PFOW_COMMAND_EXECUTE);
122}
123
124static inline void print_drs_error(unsigned dsr)
125{
126 int prog_status = (dsr & DSR_RPS) >> 8;
127
128 if (!(dsr & DSR_AVAILABLE))
129 printk(KERN_NOTICE"DSR.15: (0) Device not Available\n");
130 if (prog_status & 0x03)
131 printk(KERN_NOTICE"DSR.9,8: (11) Attempt to program invalid "
132 "half with 41h command\n");
133 else if (prog_status & 0x02)
134 printk(KERN_NOTICE"DSR.9,8: (10) Object Mode Program attempt "
135 "in region with Control Mode data\n");
136 else if (prog_status & 0x01)
137 printk(KERN_NOTICE"DSR.9,8: (01) Program attempt in region "
138 "with Object Mode data\n");
139 if (!(dsr & DSR_READY_STATUS))
140 printk(KERN_NOTICE"DSR.7: (0) Device is Busy\n");
141 if (dsr & DSR_ESS)
142 printk(KERN_NOTICE"DSR.6: (1) Erase Suspended\n");
143 if (dsr & DSR_ERASE_STATUS)
144 printk(KERN_NOTICE"DSR.5: (1) Erase/Blank check error\n");
145 if (dsr & DSR_PROGRAM_STATUS)
146 printk(KERN_NOTICE"DSR.4: (1) Program Error\n");
147 if (dsr & DSR_VPPS)
148 printk(KERN_NOTICE"DSR.3: (1) Vpp low detect, operation "
149 "aborted\n");
150 if (dsr & DSR_PSS)
151 printk(KERN_NOTICE"DSR.2: (1) Program suspended\n");
152 if (dsr & DSR_DPS)
153 printk(KERN_NOTICE"DSR.1: (1) Aborted Erase/Program attempt "
154 "on locked block\n");
155}
156#endif
157