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23#ifndef _UAPI__SOUND_ASOUND_H
24#define _UAPI__SOUND_ASOUND_H
25
26#if defined(__KERNEL__) || defined(__linux__)
27#include <linux/types.h>
28#else
29#include <sys/ioctl.h>
30#endif
31
32#ifndef __KERNEL__
33#include <stdlib.h>
34#endif
35
36
37
38
39
40#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
41#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
42#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
43#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
44#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
45 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
46 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
47 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
48
49
50
51
52
53
54
55struct snd_aes_iec958 {
56 unsigned char status[24];
57 unsigned char subcode[147];
58 unsigned char pad;
59 unsigned char dig_subframe[4];
60};
61
62
63
64
65
66
67
68struct snd_cea_861_aud_if {
69 unsigned char db1_ct_cc;
70 unsigned char db2_sf_ss;
71 unsigned char db3;
72 unsigned char db4_ca;
73 unsigned char db5_dminh_lsv;
74};
75
76
77
78
79
80
81
82#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
83
84enum {
85 SNDRV_HWDEP_IFACE_OPL2 = 0,
86 SNDRV_HWDEP_IFACE_OPL3,
87 SNDRV_HWDEP_IFACE_OPL4,
88 SNDRV_HWDEP_IFACE_SB16CSP,
89 SNDRV_HWDEP_IFACE_EMU10K1,
90 SNDRV_HWDEP_IFACE_YSS225,
91 SNDRV_HWDEP_IFACE_ICS2115,
92 SNDRV_HWDEP_IFACE_SSCAPE,
93 SNDRV_HWDEP_IFACE_VX,
94 SNDRV_HWDEP_IFACE_MIXART,
95 SNDRV_HWDEP_IFACE_USX2Y,
96 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE,
97 SNDRV_HWDEP_IFACE_BLUETOOTH,
98 SNDRV_HWDEP_IFACE_USX2Y_PCM,
99 SNDRV_HWDEP_IFACE_PCXHR,
100 SNDRV_HWDEP_IFACE_SB_RC,
101 SNDRV_HWDEP_IFACE_HDA,
102 SNDRV_HWDEP_IFACE_USB_STREAM,
103 SNDRV_HWDEP_IFACE_FW_DICE,
104 SNDRV_HWDEP_IFACE_FW_FIREWORKS,
105 SNDRV_HWDEP_IFACE_FW_BEBOB,
106 SNDRV_HWDEP_IFACE_FW_OXFW,
107 SNDRV_HWDEP_IFACE_FW_DIGI00X,
108 SNDRV_HWDEP_IFACE_FW_TASCAM,
109 SNDRV_HWDEP_IFACE_LINE6,
110 SNDRV_HWDEP_IFACE_FW_MOTU,
111 SNDRV_HWDEP_IFACE_FW_FIREFACE,
112
113
114 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE
115};
116
117struct snd_hwdep_info {
118 unsigned int device;
119 int card;
120 unsigned char id[64];
121 unsigned char name[80];
122 int iface;
123 unsigned char reserved[64];
124};
125
126
127struct snd_hwdep_dsp_status {
128 unsigned int version;
129 unsigned char id[32];
130 unsigned int num_dsps;
131 unsigned int dsp_loaded;
132 unsigned int chip_ready;
133 unsigned char reserved[16];
134};
135
136struct snd_hwdep_dsp_image {
137 unsigned int index;
138 unsigned char name[64];
139 unsigned char __user *image;
140 size_t length;
141 unsigned long driver_data;
142};
143
144#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
145#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
146#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
147#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
148
149
150
151
152
153
154
155#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 14)
156
157typedef unsigned long snd_pcm_uframes_t;
158typedef signed long snd_pcm_sframes_t;
159
160enum {
161 SNDRV_PCM_CLASS_GENERIC = 0,
162 SNDRV_PCM_CLASS_MULTI,
163 SNDRV_PCM_CLASS_MODEM,
164 SNDRV_PCM_CLASS_DIGITIZER,
165
166 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
167};
168
169enum {
170 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0,
171 SNDRV_PCM_SUBCLASS_MULTI_MIX,
172
173 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
174};
175
176enum {
177 SNDRV_PCM_STREAM_PLAYBACK = 0,
178 SNDRV_PCM_STREAM_CAPTURE,
179 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
180};
181
182typedef int __bitwise snd_pcm_access_t;
183#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0)
184#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1)
185#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2)
186#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3)
187#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4)
188#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
189
190typedef int __bitwise snd_pcm_format_t;
191#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
192#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
193#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
194#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
195#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
196#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
197#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6)
198#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7)
199#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8)
200#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9)
201#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
202#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
203#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
204#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
205#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14)
206#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15)
207#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16)
208#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17)
209#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18)
210#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19)
211#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
212#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
213#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
214#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
215#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
216#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
217#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32)
218#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33)
219#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34)
220#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35)
221#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36)
222#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37)
223#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38)
224#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39)
225#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40)
226#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41)
227#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42)
228#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43)
229#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44)
230#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45)
231#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46)
232#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47)
233#define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48)
234#define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49)
235#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50)
236#define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51)
237#define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52)
238#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE
239
240#ifdef SNDRV_LITTLE_ENDIAN
241#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
242#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
243#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
244#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
245#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
246#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
247#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
248#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
249#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
250#endif
251#ifdef SNDRV_BIG_ENDIAN
252#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
253#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
254#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
255#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
256#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
257#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
258#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
259#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
260#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
261#endif
262
263typedef int __bitwise snd_pcm_subformat_t;
264#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
265#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
266
267#define SNDRV_PCM_INFO_MMAP 0x00000001
268#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002
269#define SNDRV_PCM_INFO_DOUBLE 0x00000004
270#define SNDRV_PCM_INFO_BATCH 0x00000010
271#define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020
272#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100
273#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200
274#define SNDRV_PCM_INFO_COMPLEX 0x00000400
275#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000
276#define SNDRV_PCM_INFO_OVERRANGE 0x00020000
277#define SNDRV_PCM_INFO_RESUME 0x00040000
278#define SNDRV_PCM_INFO_PAUSE 0x00080000
279#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000
280#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000
281#define SNDRV_PCM_INFO_SYNC_START 0x00400000
282#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000
283#define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000
284#define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000
285#define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000
286#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000
287#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000
288
289#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000
290#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000
291
292
293
294typedef int __bitwise snd_pcm_state_t;
295#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0)
296#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1)
297#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2)
298#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3)
299#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4)
300#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5)
301#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6)
302#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7)
303#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8)
304#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
305
306enum {
307 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
308 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
309 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
310};
311
312union snd_pcm_sync_id {
313 unsigned char id[16];
314 unsigned short id16[8];
315 unsigned int id32[4];
316};
317
318struct snd_pcm_info {
319 unsigned int device;
320 unsigned int subdevice;
321 int stream;
322 int card;
323 unsigned char id[64];
324 unsigned char name[80];
325 unsigned char subname[32];
326 int dev_class;
327 int dev_subclass;
328 unsigned int subdevices_count;
329 unsigned int subdevices_avail;
330 union snd_pcm_sync_id sync;
331 unsigned char reserved[64];
332};
333
334typedef int snd_pcm_hw_param_t;
335#define SNDRV_PCM_HW_PARAM_ACCESS 0
336#define SNDRV_PCM_HW_PARAM_FORMAT 1
337#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2
338#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
339#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
340
341#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8
342#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9
343#define SNDRV_PCM_HW_PARAM_CHANNELS 10
344#define SNDRV_PCM_HW_PARAM_RATE 11
345#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12
346
347
348#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13
349
350
351#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14
352
353
354#define SNDRV_PCM_HW_PARAM_PERIODS 15
355
356
357#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16
358
359
360#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17
361#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18
362#define SNDRV_PCM_HW_PARAM_TICK_TIME 19
363#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
364#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
365
366#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0)
367#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1<<1)
368#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1<<2)
369
370struct snd_interval {
371 unsigned int min, max;
372 unsigned int openmin:1,
373 openmax:1,
374 integer:1,
375 empty:1;
376};
377
378#define SNDRV_MASK_MAX 256
379
380struct snd_mask {
381 __u32 bits[(SNDRV_MASK_MAX+31)/32];
382};
383
384struct snd_pcm_hw_params {
385 unsigned int flags;
386 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
387 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
388 struct snd_mask mres[5];
389 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
390 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
391 struct snd_interval ires[9];
392 unsigned int rmask;
393 unsigned int cmask;
394 unsigned int info;
395 unsigned int msbits;
396 unsigned int rate_num;
397 unsigned int rate_den;
398 snd_pcm_uframes_t fifo_size;
399 unsigned char reserved[64];
400};
401
402enum {
403 SNDRV_PCM_TSTAMP_NONE = 0,
404 SNDRV_PCM_TSTAMP_ENABLE,
405 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
406};
407
408struct snd_pcm_sw_params {
409 int tstamp_mode;
410 unsigned int period_step;
411 unsigned int sleep_min;
412 snd_pcm_uframes_t avail_min;
413 snd_pcm_uframes_t xfer_align;
414 snd_pcm_uframes_t start_threshold;
415 snd_pcm_uframes_t stop_threshold;
416 snd_pcm_uframes_t silence_threshold;
417 snd_pcm_uframes_t silence_size;
418 snd_pcm_uframes_t boundary;
419 unsigned int proto;
420 unsigned int tstamp_type;
421 unsigned char reserved[56];
422};
423
424struct snd_pcm_channel_info {
425 unsigned int channel;
426 __kernel_off_t offset;
427 unsigned int first;
428 unsigned int step;
429};
430
431enum {
432
433
434
435
436 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0,
437
438
439 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1,
440 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2,
441 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3,
442 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4,
443 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5,
444 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED
445};
446
447struct snd_pcm_status {
448 snd_pcm_state_t state;
449 struct timespec trigger_tstamp;
450 struct timespec tstamp;
451 snd_pcm_uframes_t appl_ptr;
452 snd_pcm_uframes_t hw_ptr;
453 snd_pcm_sframes_t delay;
454 snd_pcm_uframes_t avail;
455 snd_pcm_uframes_t avail_max;
456 snd_pcm_uframes_t overrange;
457 snd_pcm_state_t suspended_state;
458 __u32 audio_tstamp_data;
459 struct timespec audio_tstamp;
460 struct timespec driver_tstamp;
461 __u32 audio_tstamp_accuracy;
462 unsigned char reserved[52-2*sizeof(struct timespec)];
463};
464
465struct snd_pcm_mmap_status {
466 snd_pcm_state_t state;
467 int pad1;
468 snd_pcm_uframes_t hw_ptr;
469 struct timespec tstamp;
470 snd_pcm_state_t suspended_state;
471 struct timespec audio_tstamp;
472};
473
474struct snd_pcm_mmap_control {
475 snd_pcm_uframes_t appl_ptr;
476 snd_pcm_uframes_t avail_min;
477};
478
479#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0)
480#define SNDRV_PCM_SYNC_PTR_APPL (1<<1)
481#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2)
482
483struct snd_pcm_sync_ptr {
484 unsigned int flags;
485 union {
486 struct snd_pcm_mmap_status status;
487 unsigned char reserved[64];
488 } s;
489 union {
490 struct snd_pcm_mmap_control control;
491 unsigned char reserved[64];
492 } c;
493};
494
495struct snd_xferi {
496 snd_pcm_sframes_t result;
497 void __user *buf;
498 snd_pcm_uframes_t frames;
499};
500
501struct snd_xfern {
502 snd_pcm_sframes_t result;
503 void __user * __user *bufs;
504 snd_pcm_uframes_t frames;
505};
506
507enum {
508 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,
509 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
510 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
511 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
512};
513
514
515enum {
516 SNDRV_CHMAP_UNKNOWN = 0,
517 SNDRV_CHMAP_NA,
518 SNDRV_CHMAP_MONO,
519
520 SNDRV_CHMAP_FL,
521 SNDRV_CHMAP_FR,
522 SNDRV_CHMAP_RL,
523 SNDRV_CHMAP_RR,
524 SNDRV_CHMAP_FC,
525 SNDRV_CHMAP_LFE,
526 SNDRV_CHMAP_SL,
527 SNDRV_CHMAP_SR,
528 SNDRV_CHMAP_RC,
529
530 SNDRV_CHMAP_FLC,
531 SNDRV_CHMAP_FRC,
532 SNDRV_CHMAP_RLC,
533 SNDRV_CHMAP_RRC,
534 SNDRV_CHMAP_FLW,
535 SNDRV_CHMAP_FRW,
536 SNDRV_CHMAP_FLH,
537 SNDRV_CHMAP_FCH,
538 SNDRV_CHMAP_FRH,
539 SNDRV_CHMAP_TC,
540 SNDRV_CHMAP_TFL,
541 SNDRV_CHMAP_TFR,
542 SNDRV_CHMAP_TFC,
543 SNDRV_CHMAP_TRL,
544 SNDRV_CHMAP_TRR,
545 SNDRV_CHMAP_TRC,
546
547 SNDRV_CHMAP_TFLC,
548 SNDRV_CHMAP_TFRC,
549 SNDRV_CHMAP_TSL,
550 SNDRV_CHMAP_TSR,
551 SNDRV_CHMAP_LLFE,
552 SNDRV_CHMAP_RLFE,
553 SNDRV_CHMAP_BC,
554 SNDRV_CHMAP_BLC,
555 SNDRV_CHMAP_BRC,
556 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
557};
558
559#define SNDRV_CHMAP_POSITION_MASK 0xffff
560#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
561#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
562
563#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
564#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
565#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
566#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
567#define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int)
568#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
569#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
570#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
571#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
572#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
573#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
574#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
575#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
576#define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status)
577#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
578#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
579#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
580#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
581#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
582#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
583#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
584#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
585#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
586#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
587#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
588#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
589#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
590#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
591#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
592#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
593#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
594
595
596
597
598
599
600
601
602
603
604
605#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
606
607enum {
608 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
609 SNDRV_RAWMIDI_STREAM_INPUT,
610 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
611};
612
613#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
614#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
615#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
616
617struct snd_rawmidi_info {
618 unsigned int device;
619 unsigned int subdevice;
620 int stream;
621 int card;
622 unsigned int flags;
623 unsigned char id[64];
624 unsigned char name[80];
625 unsigned char subname[32];
626 unsigned int subdevices_count;
627 unsigned int subdevices_avail;
628 unsigned char reserved[64];
629};
630
631struct snd_rawmidi_params {
632 int stream;
633 size_t buffer_size;
634 size_t avail_min;
635 unsigned int no_active_sensing: 1;
636 unsigned char reserved[16];
637};
638
639struct snd_rawmidi_status {
640 int stream;
641 struct timespec tstamp;
642 size_t avail;
643 size_t xruns;
644 unsigned char reserved[16];
645};
646
647#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
648#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
649#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
650#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
651#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
652#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
653
654
655
656
657
658#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
659
660enum {
661 SNDRV_TIMER_CLASS_NONE = -1,
662 SNDRV_TIMER_CLASS_SLAVE = 0,
663 SNDRV_TIMER_CLASS_GLOBAL,
664 SNDRV_TIMER_CLASS_CARD,
665 SNDRV_TIMER_CLASS_PCM,
666 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
667};
668
669
670enum {
671 SNDRV_TIMER_SCLASS_NONE = 0,
672 SNDRV_TIMER_SCLASS_APPLICATION,
673 SNDRV_TIMER_SCLASS_SEQUENCER,
674 SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
675 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
676};
677
678
679#define SNDRV_TIMER_GLOBAL_SYSTEM 0
680#define SNDRV_TIMER_GLOBAL_RTC 1
681#define SNDRV_TIMER_GLOBAL_HPET 2
682#define SNDRV_TIMER_GLOBAL_HRTIMER 3
683
684
685#define SNDRV_TIMER_FLG_SLAVE (1<<0)
686
687struct snd_timer_id {
688 int dev_class;
689 int dev_sclass;
690 int card;
691 int device;
692 int subdevice;
693};
694
695struct snd_timer_ginfo {
696 struct snd_timer_id tid;
697 unsigned int flags;
698 int card;
699 unsigned char id[64];
700 unsigned char name[80];
701 unsigned long reserved0;
702 unsigned long resolution;
703 unsigned long resolution_min;
704 unsigned long resolution_max;
705 unsigned int clients;
706 unsigned char reserved[32];
707};
708
709struct snd_timer_gparams {
710 struct snd_timer_id tid;
711 unsigned long period_num;
712 unsigned long period_den;
713 unsigned char reserved[32];
714};
715
716struct snd_timer_gstatus {
717 struct snd_timer_id tid;
718 unsigned long resolution;
719 unsigned long resolution_num;
720 unsigned long resolution_den;
721 unsigned char reserved[32];
722};
723
724struct snd_timer_select {
725 struct snd_timer_id id;
726 unsigned char reserved[32];
727};
728
729struct snd_timer_info {
730 unsigned int flags;
731 int card;
732 unsigned char id[64];
733 unsigned char name[80];
734 unsigned long reserved0;
735 unsigned long resolution;
736 unsigned char reserved[64];
737};
738
739#define SNDRV_TIMER_PSFLG_AUTO (1<<0)
740#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1)
741#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2)
742
743struct snd_timer_params {
744 unsigned int flags;
745 unsigned int ticks;
746 unsigned int queue_size;
747 unsigned int reserved0;
748 unsigned int filter;
749 unsigned char reserved[60];
750};
751
752struct snd_timer_status {
753 struct timespec tstamp;
754 unsigned int resolution;
755 unsigned int lost;
756 unsigned int overrun;
757 unsigned int queue;
758 unsigned char reserved[64];
759};
760
761#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
762#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
763#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
764#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
765#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
766#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
767#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
768#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
769#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
770#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
771
772#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
773#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
774#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
775#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
776
777struct snd_timer_read {
778 unsigned int resolution;
779 unsigned int ticks;
780};
781
782enum {
783 SNDRV_TIMER_EVENT_RESOLUTION = 0,
784 SNDRV_TIMER_EVENT_TICK,
785 SNDRV_TIMER_EVENT_START,
786 SNDRV_TIMER_EVENT_STOP,
787 SNDRV_TIMER_EVENT_CONTINUE,
788 SNDRV_TIMER_EVENT_PAUSE,
789 SNDRV_TIMER_EVENT_EARLY,
790 SNDRV_TIMER_EVENT_SUSPEND,
791 SNDRV_TIMER_EVENT_RESUME,
792
793 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
794 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
795 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
796 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
797 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
798 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
799};
800
801struct snd_timer_tread {
802 int event;
803 struct timespec tstamp;
804 unsigned int val;
805};
806
807
808
809
810
811
812
813#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
814
815struct snd_ctl_card_info {
816 int card;
817 int pad;
818 unsigned char id[16];
819 unsigned char driver[16];
820 unsigned char name[32];
821 unsigned char longname[80];
822 unsigned char reserved_[16];
823 unsigned char mixername[80];
824 unsigned char components[128];
825};
826
827typedef int __bitwise snd_ctl_elem_type_t;
828#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0)
829#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1)
830#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2)
831#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3)
832#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4)
833#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5)
834#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6)
835#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
836
837typedef int __bitwise snd_ctl_elem_iface_t;
838#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0)
839#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1)
840#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2)
841#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3)
842#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4)
843#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5)
844#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6)
845#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
846
847#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
848#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
849#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
850#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2)
851#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<3)
852#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4)
853#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5)
854#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
855#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6)
856#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8)
857#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9)
858#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10)
859#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28)
860#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29)
861
862
863
864#define SNDRV_CTL_POWER_D0 0x0000
865#define SNDRV_CTL_POWER_D1 0x0100
866#define SNDRV_CTL_POWER_D2 0x0200
867#define SNDRV_CTL_POWER_D3 0x0300
868#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000)
869#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001)
870
871#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44
872
873struct snd_ctl_elem_id {
874 unsigned int numid;
875 snd_ctl_elem_iface_t iface;
876 unsigned int device;
877 unsigned int subdevice;
878 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
879 unsigned int index;
880};
881
882struct snd_ctl_elem_list {
883 unsigned int offset;
884 unsigned int space;
885 unsigned int used;
886 unsigned int count;
887 struct snd_ctl_elem_id __user *pids;
888 unsigned char reserved[50];
889};
890
891struct snd_ctl_elem_info {
892 struct snd_ctl_elem_id id;
893 snd_ctl_elem_type_t type;
894 unsigned int access;
895 unsigned int count;
896 __kernel_pid_t owner;
897 union {
898 struct {
899 long min;
900 long max;
901 long step;
902 } integer;
903 struct {
904 long long min;
905 long long max;
906 long long step;
907 } integer64;
908 struct {
909 unsigned int items;
910 unsigned int item;
911 char name[64];
912 __u64 names_ptr;
913 unsigned int names_length;
914 } enumerated;
915 unsigned char reserved[128];
916 } value;
917 union {
918 unsigned short d[4];
919 unsigned short *d_ptr;
920 } dimen;
921 unsigned char reserved[64-4*sizeof(unsigned short)];
922};
923
924struct snd_ctl_elem_value {
925 struct snd_ctl_elem_id id;
926 unsigned int indirect: 1;
927 union {
928 union {
929 long value[128];
930 long *value_ptr;
931 } integer;
932 union {
933 long long value[64];
934 long long *value_ptr;
935 } integer64;
936 union {
937 unsigned int item[128];
938 unsigned int *item_ptr;
939 } enumerated;
940 union {
941 unsigned char data[512];
942 unsigned char *data_ptr;
943 } bytes;
944 struct snd_aes_iec958 iec958;
945 } value;
946 struct timespec tstamp;
947 unsigned char reserved[128-sizeof(struct timespec)];
948};
949
950struct snd_ctl_tlv {
951 unsigned int numid;
952 unsigned int length;
953 unsigned int tlv[0];
954};
955
956#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
957#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
958#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
959#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
960#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
961#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
962#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
963#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
964#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
965#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
966#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
967#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
968#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
969#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
970#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
971#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
972#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
973#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
974#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
975#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
976#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
977#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
978#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
979#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
980#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
981
982
983
984
985
986enum sndrv_ctl_event_type {
987 SNDRV_CTL_EVENT_ELEM = 0,
988 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
989};
990
991#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0)
992#define SNDRV_CTL_EVENT_MASK_INFO (1<<1)
993#define SNDRV_CTL_EVENT_MASK_ADD (1<<2)
994#define SNDRV_CTL_EVENT_MASK_TLV (1<<3)
995#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U)
996
997struct snd_ctl_event {
998 int type;
999 union {
1000 struct {
1001 unsigned int mask;
1002 struct snd_ctl_elem_id id;
1003 } elem;
1004 unsigned char data8[60];
1005 } data;
1006};
1007
1008
1009
1010
1011
1012#define SNDRV_CTL_NAME_NONE ""
1013#define SNDRV_CTL_NAME_PLAYBACK "Playback "
1014#define SNDRV_CTL_NAME_CAPTURE "Capture "
1015
1016#define SNDRV_CTL_NAME_IEC958_NONE ""
1017#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
1018#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
1019#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
1020#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
1021#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
1022#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
1023#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
1024#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
1025
1026#endif
1027