linux/sound/pci/azt3328.c
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   1/*  azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
   2 *  Copyright (C) 2002, 2005 - 2011 by Andreas Mohr <andi AT lisas.de>
   3 *
   4 *  Framework borrowed from Bart Hartgers's als4000.c.
   5 *  Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
   6 *  found in a Fujitsu-Siemens PC ("Cordant", aluminum case).
   7 *  Other versions are:
   8 *  PCI168 A(W), sub ID 1800
   9 *  PCI168 A/AP, sub ID 8000
  10 *  Please give me feedback in case you try my driver with one of these!!
  11 *
  12 *  Keywords: Windows XP Vista 168nt4-125.zip 168win95-125.zip PCI 168 download
  13 *  (XP/Vista do not support this card at all but every Linux distribution
  14 *   has very good support out of the box;
  15 *   just to make sure that the right people hit this and get to know that,
  16 *   despite the high level of Internet ignorance - as usual :-P -
  17 *   about very good support for this card - on Linux!)
  18 *
  19 * GPL LICENSE
  20 *  This program is free software; you can redistribute it and/or modify
  21 *  it under the terms of the GNU General Public License as published by
  22 *  the Free Software Foundation; either version 2 of the License, or
  23 *  (at your option) any later version.
  24 *
  25 *  This program is distributed in the hope that it will be useful,
  26 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  27 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28 *  GNU General Public License for more details.
  29
  30 *  You should have received a copy of the GNU General Public License
  31 *  along with this program; if not, write to the Free Software
  32 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  33 *
  34 * NOTES
  35 *  Since Aztech does not provide any chipset documentation,
  36 *  even on repeated request to various addresses,
  37 *  and the answer that was finally given was negative
  38 *  (and I was stupid enough to manage to get hold of a PCI168 soundcard
  39 *  in the first place >:-P}),
  40 *  I was forced to base this driver on reverse engineering
  41 *  (3 weeks' worth of evenings filled with driver work).
  42 *  (and no, I did NOT go the easy way: to pick up a SB PCI128 for 9 Euros)
  43 *
  44 *  It is quite likely that the AZF3328 chip is the PCI cousin of the
  45 *  AZF3318 ("azt1020 pnp", "MM Pro 16") ISA chip, given very similar specs.
  46 *
  47 *  The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name
  48 *  for compatibility reasons) from Azfin (joint-venture of Aztech and Fincitec,
  49 *  Fincitec acquired by National Semiconductor in 2002, together with the
  50 *  Fincitec-related company ARSmikro) has the following features:
  51 *
  52 *  - compatibility & compliance:
  53 *    - Microsoft PC 97 ("PC 97 Hardware Design Guide",
  54 *                       http://www.microsoft.com/whdc/archive/pcguides.mspx)
  55 *    - Microsoft PC 98 Baseline Audio
  56 *    - MPU401 UART
  57 *    - Sound Blaster Emulation (DOS Box)
  58 *  - builtin AC97 conformant codec (SNR over 80dB)
  59 *    Note that "conformant" != "compliant"!! this chip's mixer register layout
  60 *    *differs* from the standard AC97 layout:
  61 *    they chose to not implement the headphone register (which is not a
  62 *    problem since it's merely optional), yet when doing this, they committed
  63 *    the grave sin of letting other registers follow immediately instead of
  64 *    keeping a headphone dummy register, thereby shifting the mixer register
  65 *    addresses illegally. So far unfortunately it looks like the very flexible
  66 *    ALSA AC97 support is still not enough to easily compensate for such a
  67 *    grave layout violation despite all tweaks and quirks mechanisms it offers.
  68 *    Well, not quite: now ac97 layer is much improved (bus-specific ops!),
  69 *    thus I was able to implement support - it's actually working quite well.
  70 *    An interesting item might be Aztech AMR 2800-W, since it's an AC97
  71 *    modem card which might reveal the Aztech-specific codec ID which
  72 *    we might want to pretend, too. Dito PCI168's brother, PCI368,
  73 *    where the advertising datasheet says it's AC97-based and has a
  74 *    Digital Enhanced Game Port.
  75 *  - builtin genuine OPL3 - verified to work fine, 20080506
  76 *  - full duplex 16bit playback/record at independent sampling rate
  77 *  - MPU401 (+ legacy address support, claimed by one official spec sheet)
  78 *    FIXME: how to enable legacy addr??
  79 *  - game port (legacy address support)
  80 *  - builtin DirectInput support, helps reduce CPU overhead (interrupt-driven
  81 *    features supported). - See common term "Digital Enhanced Game Port"...
  82 *    (probably DirectInput 3.0 spec - confirm)
  83 *  - builtin 3D enhancement (said to be YAMAHA Ymersion)
  84 *  - built-in General DirectX timer having a 20 bits counter
  85 *    with 1us resolution (see below!)
  86 *  - I2S serial output port for external DAC
  87 *    [FIXME: 3.3V or 5V level? maximum rate is 66.2kHz right?]
  88 *  - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
  89 *  - supports hardware volume control
  90 *  - single chip low cost solution (128 pin QFP)
  91 *  - supports programmable Sub-vendor and Sub-system ID [24C02 SEEPROM chip]
  92 *    required for Microsoft's logo compliance (FIXME: where?)
  93 *    At least the Trident 4D Wave DX has one bit somewhere
  94 *    to enable writes to PCI subsystem VID registers, that should be it.
  95 *    This might easily be in extended PCI reg space, since PCI168 also has
  96 *    some custom data starting at 0x80. What kind of config settings
  97 *    are located in our extended PCI space anyway??
  98 *  - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
  99 *    [TDA1517P chip]
 100 *
 101 *  Note that this driver now is actually *better* than the Windows driver,
 102 *  since it additionally supports the card's 1MHz DirectX timer - just try
 103 *  the following snd-seq module parameters etc.:
 104 *  - options snd-seq seq_default_timer_class=2 seq_default_timer_sclass=0
 105 *    seq_default_timer_card=0 seq_client_load=1 seq_default_timer_device=0
 106 *    seq_default_timer_subdevice=0 seq_default_timer_resolution=1000000
 107 *  - "timidity -iAv -B2,8 -Os -EFreverb=0"
 108 *  - "pmidi -p 128:0 jazz.mid"
 109 *
 110 *  OPL3 hardware playback testing, try something like:
 111 *  cat /proc/asound/hwdep
 112 *  and
 113 *  aconnect -o
 114 *  Then use
 115 *  sbiload -Dhw:x,y --opl3 /usr/share/sounds/opl3/std.o3 ......./drums.o3
 116 *  where x,y is the xx-yy number as given in hwdep.
 117 *  Then try
 118 *  pmidi -p a:b jazz.mid
 119 *  where a:b is the client number plus 0 usually, as given by aconnect above.
 120 *  Oh, and make sure to unmute the FM mixer control (doh!)
 121 *  NOTE: power use during OPL3 playback is _VERY_ high (70W --> 90W!)
 122 *  despite no CPU activity, possibly due to hindering ACPI idling somehow.
 123 *  Shouldn't be a problem of the AZF3328 chip itself, I'd hope.
 124 *  Higher PCM / FM mixer levels seem to conflict (causes crackling),
 125 *  at least sometimes.   Maybe even use with hardware sequencer timer above :)
 126 *  adplay/adplug-utils might soon offer hardware-based OPL3 playback, too.
 127 *
 128 *  Certain PCI versions of this card are susceptible to DMA traffic underruns
 129 *  in some systems (resulting in sound crackling/clicking/popping),
 130 *  probably because they don't have a DMA FIFO buffer or so.
 131 *  Overview (PCI ID/PCI subID/PCI rev.):
 132 *  - no DMA crackling on SiS735: 0x50DC/0x1801/16
 133 *  - unknown performance: 0x50DC/0x1801/10
 134 *    (well, it's not bad on an Athlon 1800 with now very optimized IRQ handler)
 135 *
 136 *  Crackling happens with VIA chipsets or, in my case, an SiS735, which is
 137 *  supposed to be very fast and supposed to get rid of crackling much
 138 *  better than a VIA, yet ironically I still get crackling, like many other
 139 *  people with the same chipset.
 140 *  Possible remedies:
 141 *  - use speaker (amplifier) output instead of headphone output
 142 *    (in case crackling is due to overloaded output clipping)
 143 *  - plug card into a different PCI slot, preferably one that isn't shared
 144 *    too much (this helps a lot, but not completely!)
 145 *  - get rid of PCI VGA card, use AGP instead
 146 *  - upgrade or downgrade BIOS
 147 *  - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX)
 148 *    Not too helpful.
 149 *  - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS
 150 *
 151 * BUGS
 152 *  - full-duplex might *still* be problematic, however a recent test was fine
 153 *  - (non-bug) "Bass/Treble or 3D settings don't work" - they do get evaluated
 154 *    if you set PCM output switch to "pre 3D" instead of "post 3D".
 155 *    If this can't be set, then get a mixer application that Isn't Stupid (tm)
 156 *    (e.g. kmix, gamix) - unfortunately several are!!
 157 *  - locking is not entirely clean, especially the audio stream activity
 158 *    ints --> may be racy
 159 *  - an _unconnected_ secondary joystick at the gameport will be reported
 160 *    to be "active" (floating values, not precisely -1) due to the way we need
 161 *    to read the Digital Enhanced Game Port. Not sure whether it is fixable.
 162 *
 163 * TODO
 164 *  - use PCI_VDEVICE
 165 *  - verify driver status on x86_64
 166 *  - test multi-card driver operation
 167 *  - (ab)use 1MHz DirectX timer as kernel clocksource
 168 *  - test MPU401 MIDI playback etc.
 169 *  - add more power micro-management (disable various units of the card
 170 *    as long as they're unused, to improve audio quality and save power).
 171 *    However this requires more I/O ports which I haven't figured out yet
 172 *    and which thus might not even exist...
 173 *    The standard suspend/resume functionality could probably make use of
 174 *    some improvement, too...
 175 *  - figure out what all unknown port bits are responsible for
 176 *  - figure out some cleverly evil scheme to possibly make ALSA AC97 code
 177 *    fully accept our quite incompatible ""AC97"" mixer and thus save some
 178 *    code (but I'm not too optimistic that doing this is possible at all)
 179 *  - use MMIO (memory-mapped I/O)? Slightly faster access, e.g. for gameport.
 180 */
 181
 182#include <linux/io.h>
 183#include <linux/init.h>
 184#include <linux/bug.h> /* WARN_ONCE */
 185#include <linux/pci.h>
 186#include <linux/delay.h>
 187#include <linux/slab.h>
 188#include <linux/gameport.h>
 189#include <linux/module.h>
 190#include <linux/dma-mapping.h>
 191#include <sound/core.h>
 192#include <sound/control.h>
 193#include <sound/pcm.h>
 194#include <sound/rawmidi.h>
 195#include <sound/mpu401.h>
 196#include <sound/opl3.h>
 197#include <sound/initval.h>
 198/*
 199 * Config switch, to use ALSA's AC97 layer instead of old custom mixer crap.
 200 * If the AC97 compatibility parts we needed to implement locally turn out
 201 * to work nicely, then remove the old implementation eventually.
 202 */
 203#define AZF_USE_AC97_LAYER 1
 204
 205#ifdef AZF_USE_AC97_LAYER
 206#include <sound/ac97_codec.h>
 207#endif
 208#include "azt3328.h"
 209
 210MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>");
 211MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)");
 212MODULE_LICENSE("GPL");
 213MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
 214
 215#if IS_REACHABLE(CONFIG_GAMEPORT)
 216#define SUPPORT_GAMEPORT 1
 217#endif
 218
 219/* === Debug settings ===
 220  Further diagnostic functionality than the settings below
 221  does not need to be provided, since one can easily write a POSIX shell script
 222  to dump the card's I/O ports (those listed in lspci -v -v):
 223  dump()
 224  {
 225    local descr=$1; local addr=$2; local count=$3
 226
 227    echo "${descr}: ${count} @ ${addr}:"
 228    dd if=/dev/port skip=`printf %d ${addr}` count=${count} bs=1 \
 229      2>/dev/null| hexdump -C
 230  }
 231  and then use something like
 232  "dump joy200 0x200 8", "dump mpu388 0x388 4", "dump joy 0xb400 8",
 233  "dump codec00 0xa800 32", "dump mixer 0xb800 64", "dump synth 0xbc00 8",
 234  possibly within a "while true; do ... sleep 1; done" loop.
 235  Tweaking ports could be done using
 236  VALSTRING="`printf "%02x" $value`"
 237  printf "\x""$VALSTRING"|dd of=/dev/port seek=`printf %d ${addr}` bs=1 \
 238    2>/dev/null
 239*/
 240
 241static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
 242module_param_array(index, int, NULL, 0444);
 243MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
 244
 245static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
 246module_param_array(id, charp, NULL, 0444);
 247MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard.");
 248
 249static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
 250module_param_array(enable, bool, NULL, 0444);
 251MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard.");
 252
 253static int seqtimer_scaling = 128;
 254module_param(seqtimer_scaling, int, 0444);
 255MODULE_PARM_DESC(seqtimer_scaling, "Set 1024000Hz sequencer timer scale factor (lockup danger!). Default 128.");
 256
 257enum snd_azf3328_codec_type {
 258  /* warning: fixed indices (also used for bitmask checks!) */
 259  AZF_CODEC_PLAYBACK = 0,
 260  AZF_CODEC_CAPTURE = 1,
 261  AZF_CODEC_I2S_OUT = 2,
 262};
 263
 264struct snd_azf3328_codec_data {
 265        unsigned long io_base; /* keep first! (avoid offset calc) */
 266        unsigned int dma_base; /* helper to avoid an indirection in hotpath */
 267        spinlock_t *lock; /* TODO: convert to our own per-codec lock member */
 268        struct snd_pcm_substream *substream;
 269        bool running;
 270        enum snd_azf3328_codec_type type;
 271        const char *name;
 272};
 273
 274struct snd_azf3328 {
 275        /* often-used fields towards beginning, then grouped */
 276
 277        unsigned long ctrl_io; /* usually 0xb000, size 128 */
 278        unsigned long game_io;  /* usually 0xb400, size 8 */
 279        unsigned long mpu_io;   /* usually 0xb800, size 4 */
 280        unsigned long opl3_io; /* usually 0xbc00, size 8 */
 281        unsigned long mixer_io; /* usually 0xc000, size 64 */
 282
 283        spinlock_t reg_lock;
 284
 285        struct snd_timer *timer;
 286
 287        struct snd_pcm *pcm[3];
 288
 289        /* playback, recording and I2S out codecs */
 290        struct snd_azf3328_codec_data codecs[3];
 291
 292#ifdef AZF_USE_AC97_LAYER
 293        struct snd_ac97 *ac97;
 294#endif
 295
 296        struct snd_card *card;
 297        struct snd_rawmidi *rmidi;
 298
 299#ifdef SUPPORT_GAMEPORT
 300        struct gameport *gameport;
 301        u16 axes[4];
 302#endif
 303
 304        struct pci_dev *pci;
 305        int irq;
 306
 307        /* register 0x6a is write-only, thus need to remember setting.
 308         * If we need to add more registers here, then we might try to fold this
 309         * into some transparent combined shadow register handling with
 310         * CONFIG_PM register storage below, but that's slightly difficult. */
 311        u16 shadow_reg_ctrl_6AH;
 312
 313#ifdef CONFIG_PM_SLEEP
 314        /* register value containers for power management
 315         * Note: not always full I/O range preserved (similar to Win driver!) */
 316        u32 saved_regs_ctrl[AZF_ALIGN(AZF_IO_SIZE_CTRL_PM) / 4];
 317        u32 saved_regs_game[AZF_ALIGN(AZF_IO_SIZE_GAME_PM) / 4];
 318        u32 saved_regs_mpu[AZF_ALIGN(AZF_IO_SIZE_MPU_PM) / 4];
 319        u32 saved_regs_opl3[AZF_ALIGN(AZF_IO_SIZE_OPL3_PM) / 4];
 320        u32 saved_regs_mixer[AZF_ALIGN(AZF_IO_SIZE_MIXER_PM) / 4];
 321#endif
 322};
 323
 324static const struct pci_device_id snd_azf3328_ids[] = {
 325        { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* PCI168/3328 */
 326        { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* 3328 */
 327        { 0, }
 328};
 329
 330MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
 331
 332
 333static int
 334snd_azf3328_io_reg_setb(unsigned reg, u8 mask, bool do_set)
 335{
 336        /* Well, strictly spoken, the inb/outb sequence isn't atomic
 337           and would need locking. However we currently don't care
 338           since it potentially complicates matters. */
 339        u8 prev = inb(reg), new;
 340
 341        new = (do_set) ? (prev|mask) : (prev & ~mask);
 342        /* we need to always write the new value no matter whether it differs
 343         * or not, since some register bits don't indicate their setting */
 344        outb(new, reg);
 345        if (new != prev)
 346                return 1;
 347
 348        return 0;
 349}
 350
 351static inline void
 352snd_azf3328_codec_outb(const struct snd_azf3328_codec_data *codec,
 353                       unsigned reg,
 354                       u8 value
 355)
 356{
 357        outb(value, codec->io_base + reg);
 358}
 359
 360static inline u8
 361snd_azf3328_codec_inb(const struct snd_azf3328_codec_data *codec, unsigned reg)
 362{
 363        return inb(codec->io_base + reg);
 364}
 365
 366static inline void
 367snd_azf3328_codec_outw(const struct snd_azf3328_codec_data *codec,
 368                       unsigned reg,
 369                       u16 value
 370)
 371{
 372        outw(value, codec->io_base + reg);
 373}
 374
 375static inline u16
 376snd_azf3328_codec_inw(const struct snd_azf3328_codec_data *codec, unsigned reg)
 377{
 378        return inw(codec->io_base + reg);
 379}
 380
 381static inline void
 382snd_azf3328_codec_outl(const struct snd_azf3328_codec_data *codec,
 383                       unsigned reg,
 384                       u32 value
 385)
 386{
 387        outl(value, codec->io_base + reg);
 388}
 389
 390static inline void
 391snd_azf3328_codec_outl_multi(const struct snd_azf3328_codec_data *codec,
 392                             unsigned reg, const void *buffer, int count
 393)
 394{
 395        unsigned long addr = codec->io_base + reg;
 396        if (count) {
 397                const u32 *buf = buffer;
 398                do {
 399                        outl(*buf++, addr);
 400                        addr += 4;
 401                } while (--count);
 402        }
 403}
 404
 405static inline u32
 406snd_azf3328_codec_inl(const struct snd_azf3328_codec_data *codec, unsigned reg)
 407{
 408        return inl(codec->io_base + reg);
 409}
 410
 411static inline void
 412snd_azf3328_ctrl_outb(const struct snd_azf3328 *chip, unsigned reg, u8 value)
 413{
 414        outb(value, chip->ctrl_io + reg);
 415}
 416
 417static inline u8
 418snd_azf3328_ctrl_inb(const struct snd_azf3328 *chip, unsigned reg)
 419{
 420        return inb(chip->ctrl_io + reg);
 421}
 422
 423static inline u16
 424snd_azf3328_ctrl_inw(const struct snd_azf3328 *chip, unsigned reg)
 425{
 426        return inw(chip->ctrl_io + reg);
 427}
 428
 429static inline void
 430snd_azf3328_ctrl_outw(const struct snd_azf3328 *chip, unsigned reg, u16 value)
 431{
 432        outw(value, chip->ctrl_io + reg);
 433}
 434
 435static inline void
 436snd_azf3328_ctrl_outl(const struct snd_azf3328 *chip, unsigned reg, u32 value)
 437{
 438        outl(value, chip->ctrl_io + reg);
 439}
 440
 441static inline void
 442snd_azf3328_game_outb(const struct snd_azf3328 *chip, unsigned reg, u8 value)
 443{
 444        outb(value, chip->game_io + reg);
 445}
 446
 447static inline void
 448snd_azf3328_game_outw(const struct snd_azf3328 *chip, unsigned reg, u16 value)
 449{
 450        outw(value, chip->game_io + reg);
 451}
 452
 453static inline u8
 454snd_azf3328_game_inb(const struct snd_azf3328 *chip, unsigned reg)
 455{
 456        return inb(chip->game_io + reg);
 457}
 458
 459static inline u16
 460snd_azf3328_game_inw(const struct snd_azf3328 *chip, unsigned reg)
 461{
 462        return inw(chip->game_io + reg);
 463}
 464
 465static inline void
 466snd_azf3328_mixer_outw(const struct snd_azf3328 *chip, unsigned reg, u16 value)
 467{
 468        outw(value, chip->mixer_io + reg);
 469}
 470
 471static inline u16
 472snd_azf3328_mixer_inw(const struct snd_azf3328 *chip, unsigned reg)
 473{
 474        return inw(chip->mixer_io + reg);
 475}
 476
 477#define AZF_MUTE_BIT 0x80
 478
 479static bool
 480snd_azf3328_mixer_mute_control(const struct snd_azf3328 *chip,
 481                           unsigned reg, bool do_mute
 482)
 483{
 484        unsigned long portbase = chip->mixer_io + reg + 1;
 485        bool updated;
 486
 487        /* the mute bit is on the *second* (i.e. right) register of a
 488         * left/right channel setting */
 489        updated = snd_azf3328_io_reg_setb(portbase, AZF_MUTE_BIT, do_mute);
 490
 491        /* indicate whether it was muted before */
 492        return (do_mute) ? !updated : updated;
 493}
 494
 495static inline bool
 496snd_azf3328_mixer_mute_control_master(const struct snd_azf3328 *chip,
 497                           bool do_mute
 498)
 499{
 500        return snd_azf3328_mixer_mute_control(
 501                chip,
 502                IDX_MIXER_PLAY_MASTER,
 503                do_mute
 504        );
 505}
 506
 507static inline bool
 508snd_azf3328_mixer_mute_control_pcm(const struct snd_azf3328 *chip,
 509                           bool do_mute
 510)
 511{
 512        return snd_azf3328_mixer_mute_control(
 513                chip,
 514                IDX_MIXER_WAVEOUT,
 515                do_mute
 516        );
 517}
 518
 519static inline void
 520snd_azf3328_mixer_reset(const struct snd_azf3328 *chip)
 521{
 522        /* reset (close) mixer:
 523         * first mute master volume, then reset
 524         */
 525        snd_azf3328_mixer_mute_control_master(chip, 1);
 526        snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
 527}
 528
 529#ifdef AZF_USE_AC97_LAYER
 530
 531static inline void
 532snd_azf3328_mixer_ac97_map_unsupported(const struct snd_azf3328 *chip,
 533                                       unsigned short reg, const char *mode)
 534{
 535        /* need to add some more or less clever emulation? */
 536        dev_warn(chip->card->dev,
 537                "missing %s emulation for AC97 register 0x%02x!\n",
 538                mode, reg);
 539}
 540
 541/*
 542 * Need to have _special_ AC97 mixer hardware register index mapper,
 543 * to compensate for the issue of a rather AC97-incompatible hardware layout.
 544 */
 545#define AZF_REG_MASK 0x3f
 546#define AZF_AC97_REG_UNSUPPORTED 0x8000
 547#define AZF_AC97_REG_REAL_IO_READ 0x4000
 548#define AZF_AC97_REG_REAL_IO_WRITE 0x2000
 549#define AZF_AC97_REG_REAL_IO_RW \
 550        (AZF_AC97_REG_REAL_IO_READ | AZF_AC97_REG_REAL_IO_WRITE)
 551#define AZF_AC97_REG_EMU_IO_READ 0x0400
 552#define AZF_AC97_REG_EMU_IO_WRITE 0x0200
 553#define AZF_AC97_REG_EMU_IO_RW \
 554        (AZF_AC97_REG_EMU_IO_READ | AZF_AC97_REG_EMU_IO_WRITE)
 555static unsigned short
 556snd_azf3328_mixer_ac97_map_reg_idx(unsigned short reg)
 557{
 558        static const struct {
 559                unsigned short azf_reg;
 560        } azf_reg_mapper[] = {
 561                /* Especially when taking into consideration
 562                 * mono/stereo-based sequence of azf vs. AC97 control series,
 563                 * it's quite obvious that azf simply got rid
 564                 * of the AC97_HEADPHONE control at its intended offset,
 565                 * thus shifted _all_ controls by one,
 566                 * and _then_ simply added it as an FMSYNTH control at the end,
 567                 * to make up for the offset.
 568                 * This means we'll have to translate indices here as
 569                 * needed and then do some tiny AC97 patch action
 570                 * (snd_ac97_rename_vol_ctl() etc.) - that's it.
 571                 */
 572                { /* AC97_RESET */ IDX_MIXER_RESET
 573                        | AZF_AC97_REG_REAL_IO_WRITE
 574                        | AZF_AC97_REG_EMU_IO_READ },
 575                { /* AC97_MASTER */ IDX_MIXER_PLAY_MASTER },
 576                 /* note large shift: AC97_HEADPHONE to IDX_MIXER_FMSYNTH! */
 577                { /* AC97_HEADPHONE */ IDX_MIXER_FMSYNTH },
 578                { /* AC97_MASTER_MONO */ IDX_MIXER_MODEMOUT },
 579                { /* AC97_MASTER_TONE */ IDX_MIXER_BASSTREBLE },
 580                { /* AC97_PC_BEEP */ IDX_MIXER_PCBEEP },
 581                { /* AC97_PHONE */ IDX_MIXER_MODEMIN },
 582                { /* AC97_MIC */ IDX_MIXER_MIC },
 583                { /* AC97_LINE */ IDX_MIXER_LINEIN },
 584                { /* AC97_CD */ IDX_MIXER_CDAUDIO },
 585                { /* AC97_VIDEO */ IDX_MIXER_VIDEO },
 586                { /* AC97_AUX */ IDX_MIXER_AUX },
 587                { /* AC97_PCM */ IDX_MIXER_WAVEOUT },
 588                { /* AC97_REC_SEL */ IDX_MIXER_REC_SELECT },
 589                { /* AC97_REC_GAIN */ IDX_MIXER_REC_VOLUME },
 590                { /* AC97_REC_GAIN_MIC */ AZF_AC97_REG_EMU_IO_RW },
 591                { /* AC97_GENERAL_PURPOSE */ IDX_MIXER_ADVCTL2 },
 592                { /* AC97_3D_CONTROL */ IDX_MIXER_ADVCTL1 },
 593        };
 594
 595        unsigned short reg_azf = AZF_AC97_REG_UNSUPPORTED;
 596
 597        /* azf3328 supports the low-numbered and low-spec:ed range
 598           of AC97 regs only */
 599        if (reg <= AC97_3D_CONTROL) {
 600                unsigned short reg_idx = reg / 2;
 601                reg_azf = azf_reg_mapper[reg_idx].azf_reg;
 602                /* a translation-only entry means it's real read/write: */
 603                if (!(reg_azf & ~AZF_REG_MASK))
 604                        reg_azf |= AZF_AC97_REG_REAL_IO_RW;
 605        } else {
 606                switch (reg) {
 607                case AC97_POWERDOWN:
 608                        reg_azf = AZF_AC97_REG_EMU_IO_RW;
 609                        break;
 610                case AC97_EXTENDED_ID:
 611                        reg_azf = AZF_AC97_REG_EMU_IO_READ;
 612                        break;
 613                case AC97_EXTENDED_STATUS:
 614                        /* I don't know what the h*ll AC97 layer
 615                         * would consult this _extended_ register for
 616                         * given a base-AC97-advertised card,
 617                         * but let's just emulate it anyway :-P
 618                         */
 619                        reg_azf = AZF_AC97_REG_EMU_IO_RW;
 620                        break;
 621                case AC97_VENDOR_ID1:
 622                case AC97_VENDOR_ID2:
 623                        reg_azf = AZF_AC97_REG_EMU_IO_READ;
 624                        break;
 625                }
 626        }
 627        return reg_azf;
 628}
 629
 630static const unsigned short
 631azf_emulated_ac97_caps =
 632        AC97_BC_DEDICATED_MIC |
 633        AC97_BC_BASS_TREBLE |
 634        /* Headphone is an FM Synth control here */
 635        AC97_BC_HEADPHONE |
 636        /* no AC97_BC_LOUDNESS! */
 637        /* mask 0x7c00 is
 638           vendor-specific 3D enhancement
 639           vendor indicator.
 640           Since there actually _is_ an
 641           entry for Aztech Labs
 642           (13), make damn sure
 643           to indicate it. */
 644        (13 << 10);
 645
 646static const unsigned short
 647azf_emulated_ac97_powerdown =
 648        /* pretend everything to be active */
 649                AC97_PD_ADC_STATUS |
 650                AC97_PD_DAC_STATUS |
 651                AC97_PD_MIXER_STATUS |
 652                AC97_PD_VREF_STATUS;
 653
 654/*
 655 * Emulated, _inofficial_ vendor ID
 656 * (there might be some devices such as the MR 2800-W
 657 * which could reveal the real Aztech AC97 ID).
 658 * We choose to use "AZT" prefix, and then use 1 to indicate PCI168
 659 * (better don't use 0x68 since there's a PCI368 as well).
 660 */
 661static const unsigned int
 662azf_emulated_ac97_vendor_id = 0x415a5401;
 663
 664static unsigned short
 665snd_azf3328_mixer_ac97_read(struct snd_ac97 *ac97, unsigned short reg_ac97)
 666{
 667        const struct snd_azf3328 *chip = ac97->private_data;
 668        unsigned short reg_azf = snd_azf3328_mixer_ac97_map_reg_idx(reg_ac97);
 669        unsigned short reg_val = 0;
 670        bool unsupported = false;
 671
 672        dev_dbg(chip->card->dev, "snd_azf3328_mixer_ac97_read reg_ac97 %u\n",
 673                reg_ac97);
 674        if (reg_azf & AZF_AC97_REG_UNSUPPORTED)
 675                unsupported = true;
 676        else {
 677                if (reg_azf & AZF_AC97_REG_REAL_IO_READ)
 678                        reg_val = snd_azf3328_mixer_inw(chip,
 679                                                reg_azf & AZF_REG_MASK);
 680                else {
 681                        /*
 682                         * Proceed with dummy I/O read,
 683                         * to ensure compatible timing where this may matter.
 684                         * (ALSA AC97 layer usually doesn't call I/O functions
 685                         * due to intelligent I/O caching anyway)
 686                         * Choose a mixer register that's thoroughly unrelated
 687                         * to common audio (try to minimize distortion).
 688                         */
 689                        snd_azf3328_mixer_inw(chip, IDX_MIXER_SOMETHING30H);
 690                }
 691
 692                if (reg_azf & AZF_AC97_REG_EMU_IO_READ) {
 693                        switch (reg_ac97) {
 694                        case AC97_RESET:
 695                                reg_val |= azf_emulated_ac97_caps;
 696                                break;
 697                        case AC97_POWERDOWN:
 698                                reg_val |= azf_emulated_ac97_powerdown;
 699                                break;
 700                        case AC97_EXTENDED_ID:
 701                        case AC97_EXTENDED_STATUS:
 702                                /* AFAICS we simply can't support anything: */
 703                                reg_val |= 0;
 704                                break;
 705                        case AC97_VENDOR_ID1:
 706                                reg_val = azf_emulated_ac97_vendor_id >> 16;
 707                                break;
 708                        case AC97_VENDOR_ID2:
 709                                reg_val = azf_emulated_ac97_vendor_id & 0xffff;
 710                                break;
 711                        default:
 712                                unsupported = true;
 713                                break;
 714                        }
 715                }
 716        }
 717        if (unsupported)
 718                snd_azf3328_mixer_ac97_map_unsupported(chip, reg_ac97, "read");
 719
 720        return reg_val;
 721}
 722
 723static void
 724snd_azf3328_mixer_ac97_write(struct snd_ac97 *ac97,
 725                     unsigned short reg_ac97, unsigned short val)
 726{
 727        const struct snd_azf3328 *chip = ac97->private_data;
 728        unsigned short reg_azf = snd_azf3328_mixer_ac97_map_reg_idx(reg_ac97);
 729        bool unsupported = false;
 730
 731        dev_dbg(chip->card->dev,
 732                "snd_azf3328_mixer_ac97_write reg_ac97 %u val %u\n",
 733                reg_ac97, val);
 734        if (reg_azf & AZF_AC97_REG_UNSUPPORTED)
 735                unsupported = true;
 736        else {
 737                if (reg_azf & AZF_AC97_REG_REAL_IO_WRITE)
 738                        snd_azf3328_mixer_outw(
 739                                chip,
 740                                reg_azf & AZF_REG_MASK,
 741                                val
 742                        );
 743                else
 744                if (reg_azf & AZF_AC97_REG_EMU_IO_WRITE) {
 745                        switch (reg_ac97) {
 746                        case AC97_REC_GAIN_MIC:
 747                        case AC97_POWERDOWN:
 748                        case AC97_EXTENDED_STATUS:
 749                                /*
 750                                 * Silently swallow these writes.
 751                                 * Since for most registers our card doesn't
 752                                 * actually support a comparable feature,
 753                                 * this is exactly what we should do here.
 754                                 * The AC97 layer's I/O caching probably
 755                                 * automatically takes care of all the rest...
 756                                 * (remembers written values etc.)
 757                                 */
 758                                break;
 759                        default:
 760                                unsupported = true;
 761                                break;
 762                        }
 763                }
 764        }
 765        if (unsupported)
 766                snd_azf3328_mixer_ac97_map_unsupported(chip, reg_ac97, "write");
 767}
 768
 769static int
 770snd_azf3328_mixer_new(struct snd_azf3328 *chip)
 771{
 772        struct snd_ac97_bus *bus;
 773        struct snd_ac97_template ac97;
 774        static struct snd_ac97_bus_ops ops = {
 775                .write = snd_azf3328_mixer_ac97_write,
 776                .read = snd_azf3328_mixer_ac97_read,
 777        };
 778        int rc;
 779
 780        memset(&ac97, 0, sizeof(ac97));
 781        ac97.scaps = AC97_SCAP_SKIP_MODEM
 782                        | AC97_SCAP_AUDIO /* we support audio! */
 783                        | AC97_SCAP_NO_SPDIF;
 784        ac97.private_data = chip;
 785        ac97.pci = chip->pci;
 786
 787        /*
 788         * ALSA's AC97 layer has terrible init crackling issues,
 789         * unfortunately, and since it makes use of AC97_RESET,
 790         * there's no use trying to mute Master Playback proactively.
 791         */
 792
 793        rc = snd_ac97_bus(chip->card, 0, &ops, NULL, &bus);
 794        if (!rc)
 795                rc = snd_ac97_mixer(bus, &ac97, &chip->ac97);
 796                /*
 797                 * Make sure to complain loudly in case of AC97 init failure,
 798                 * since failure may happen quite often,
 799                 * due to this card being a very quirky AC97 "lookalike".
 800                 */
 801        if (rc)
 802                dev_err(chip->card->dev, "AC97 init failed, err %d!\n", rc);
 803
 804        /* If we return an error here, then snd_card_free() should
 805         * free up any ac97 codecs that got created, as well as the bus.
 806         */
 807        return rc;
 808}
 809#else /* AZF_USE_AC97_LAYER */
 810static void
 811snd_azf3328_mixer_write_volume_gradually(const struct snd_azf3328 *chip,
 812                                         unsigned reg,
 813                                         unsigned char dst_vol_left,
 814                                         unsigned char dst_vol_right,
 815                                         int chan_sel, int delay
 816)
 817{
 818        unsigned long portbase = chip->mixer_io + reg;
 819        unsigned char curr_vol_left = 0, curr_vol_right = 0;
 820        int left_change = 0, right_change = 0;
 821
 822        if (chan_sel & SET_CHAN_LEFT) {
 823                curr_vol_left  = inb(portbase + 1);
 824
 825                /* take care of muting flag contained in left channel */
 826                if (curr_vol_left & AZF_MUTE_BIT)
 827                        dst_vol_left |= AZF_MUTE_BIT;
 828                else
 829                        dst_vol_left &= ~AZF_MUTE_BIT;
 830
 831                left_change = (curr_vol_left > dst_vol_left) ? -1 : 1;
 832        }
 833
 834        if (chan_sel & SET_CHAN_RIGHT) {
 835                curr_vol_right = inb(portbase + 0);
 836
 837                right_change = (curr_vol_right > dst_vol_right) ? -1 : 1;
 838        }
 839
 840        do {
 841                if (left_change) {
 842                        if (curr_vol_left != dst_vol_left) {
 843                                curr_vol_left += left_change;
 844                                outb(curr_vol_left, portbase + 1);
 845                        } else
 846                            left_change = 0;
 847                }
 848                if (right_change) {
 849                        if (curr_vol_right != dst_vol_right) {
 850                                curr_vol_right += right_change;
 851
 852                        /* during volume change, the right channel is crackling
 853                         * somewhat more than the left channel, unfortunately.
 854                         * This seems to be a hardware issue. */
 855                                outb(curr_vol_right, portbase + 0);
 856                        } else
 857                            right_change = 0;
 858                }
 859                if (delay)
 860                        mdelay(delay);
 861        } while ((left_change) || (right_change));
 862}
 863
 864/*
 865 * general mixer element
 866 */
 867struct azf3328_mixer_reg {
 868        unsigned reg;
 869        unsigned int lchan_shift, rchan_shift;
 870        unsigned int mask;
 871        unsigned int invert: 1;
 872        unsigned int stereo: 1;
 873        unsigned int enum_c: 4;
 874};
 875
 876#define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \
 877 ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | \
 878  (mask << 16) | \
 879  (invert << 24) | \
 880  (stereo << 25) | \
 881  (enum_c << 26))
 882
 883static void snd_azf3328_mixer_reg_decode(struct azf3328_mixer_reg *r, unsigned long val)
 884{
 885        r->reg = val & 0xff;
 886        r->lchan_shift = (val >> 8) & 0x0f;
 887        r->rchan_shift = (val >> 12) & 0x0f;
 888        r->mask = (val >> 16) & 0xff;
 889        r->invert = (val >> 24) & 1;
 890        r->stereo = (val >> 25) & 1;
 891        r->enum_c = (val >> 26) & 0x0f;
 892}
 893
 894/*
 895 * mixer switches/volumes
 896 */
 897
 898#define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \
 899{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 900  .info = snd_azf3328_info_mixer, \
 901  .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 902  .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
 903}
 904
 905#define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \
 906{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 907  .info = snd_azf3328_info_mixer, \
 908  .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 909  .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
 910}
 911
 912#define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \
 913{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 914  .info = snd_azf3328_info_mixer, \
 915  .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 916  .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
 917}
 918
 919#define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \
 920{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 921  .info = snd_azf3328_info_mixer, \
 922  .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 923  .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
 924}
 925
 926#define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \
 927{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 928  .info = snd_azf3328_info_mixer_enum, \
 929  .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \
 930  .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
 931}
 932
 933static int
 934snd_azf3328_info_mixer(struct snd_kcontrol *kcontrol,
 935                       struct snd_ctl_elem_info *uinfo)
 936{
 937        struct azf3328_mixer_reg reg;
 938
 939        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 940        uinfo->type = reg.mask == 1 ?
 941                SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
 942        uinfo->count = reg.stereo + 1;
 943        uinfo->value.integer.min = 0;
 944        uinfo->value.integer.max = reg.mask;
 945        return 0;
 946}
 947
 948static int
 949snd_azf3328_get_mixer(struct snd_kcontrol *kcontrol,
 950                      struct snd_ctl_elem_value *ucontrol)
 951{
 952        struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
 953        struct azf3328_mixer_reg reg;
 954        u16 oreg, val;
 955
 956        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 957
 958        oreg = snd_azf3328_mixer_inw(chip, reg.reg);
 959        val = (oreg >> reg.lchan_shift) & reg.mask;
 960        if (reg.invert)
 961                val = reg.mask - val;
 962        ucontrol->value.integer.value[0] = val;
 963        if (reg.stereo) {
 964                val = (oreg >> reg.rchan_shift) & reg.mask;
 965                if (reg.invert)
 966                        val = reg.mask - val;
 967                ucontrol->value.integer.value[1] = val;
 968        }
 969        dev_dbg(chip->card->dev,
 970                "get: %02x is %04x -> vol %02lx|%02lx (shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n",
 971                reg.reg, oreg,
 972                ucontrol->value.integer.value[0], ucontrol->value.integer.value[1],
 973                reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo);
 974        return 0;
 975}
 976
 977static int
 978snd_azf3328_put_mixer(struct snd_kcontrol *kcontrol,
 979                      struct snd_ctl_elem_value *ucontrol)
 980{
 981        struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
 982        struct azf3328_mixer_reg reg;
 983        u16 oreg, nreg, val;
 984
 985        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 986        oreg = snd_azf3328_mixer_inw(chip, reg.reg);
 987        val = ucontrol->value.integer.value[0] & reg.mask;
 988        if (reg.invert)
 989                val = reg.mask - val;
 990        nreg = oreg & ~(reg.mask << reg.lchan_shift);
 991        nreg |= (val << reg.lchan_shift);
 992        if (reg.stereo) {
 993                val = ucontrol->value.integer.value[1] & reg.mask;
 994                if (reg.invert)
 995                        val = reg.mask - val;
 996                nreg &= ~(reg.mask << reg.rchan_shift);
 997                nreg |= (val << reg.rchan_shift);
 998        }
 999        if (reg.mask >= 0x07) /* it's a volume control, so better take care */
1000                snd_azf3328_mixer_write_volume_gradually(
1001                        chip, reg.reg, nreg >> 8, nreg & 0xff,
1002                        /* just set both channels, doesn't matter */
1003                        SET_CHAN_LEFT|SET_CHAN_RIGHT,
1004                        0);
1005        else
1006                snd_azf3328_mixer_outw(chip, reg.reg, nreg);
1007
1008        dev_dbg(chip->card->dev,
1009                "put: %02x to %02lx|%02lx, oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n",
1010                reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1],
1011                oreg, reg.lchan_shift, reg.rchan_shift,
1012                nreg, snd_azf3328_mixer_inw(chip, reg.reg));
1013        return (nreg != oreg);
1014}
1015
1016static int
1017snd_azf3328_info_mixer_enum(struct snd_kcontrol *kcontrol,
1018                            struct snd_ctl_elem_info *uinfo)
1019{
1020        static const char * const texts1[] = {
1021                "Mic1", "Mic2"
1022        };
1023        static const char * const texts2[] = {
1024                "Mix", "Mic"
1025        };
1026        static const char * const texts3[] = {
1027                "Mic", "CD", "Video", "Aux",
1028                "Line", "Mix", "Mix Mono", "Phone"
1029        };
1030        static const char * const texts4[] = {
1031                "pre 3D", "post 3D"
1032        };
1033        struct azf3328_mixer_reg reg;
1034        const char * const *p = NULL;
1035
1036        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
1037        if (reg.reg == IDX_MIXER_ADVCTL2) {
1038                switch(reg.lchan_shift) {
1039                case 8: /* modem out sel */
1040                        p = texts1;
1041                        break;
1042                case 9: /* mono sel source */
1043                        p = texts2;
1044                        break;
1045                case 15: /* PCM Out Path */
1046                        p = texts4;
1047                        break;
1048                }
1049        } else if (reg.reg == IDX_MIXER_REC_SELECT)
1050                p = texts3;
1051
1052        return snd_ctl_enum_info(uinfo,
1053                                 (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1,
1054                                 reg.enum_c, p);
1055}
1056
1057static int
1058snd_azf3328_get_mixer_enum(struct snd_kcontrol *kcontrol,
1059                           struct snd_ctl_elem_value *ucontrol)
1060{
1061        struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
1062        struct azf3328_mixer_reg reg;
1063        unsigned short val;
1064
1065        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
1066        val = snd_azf3328_mixer_inw(chip, reg.reg);
1067        if (reg.reg == IDX_MIXER_REC_SELECT) {
1068                ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1);
1069                ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1);
1070        } else
1071                ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1);
1072
1073        dev_dbg(chip->card->dev,
1074                "get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n",
1075                reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1],
1076                reg.lchan_shift, reg.enum_c);
1077        return 0;
1078}
1079
1080static int
1081snd_azf3328_put_mixer_enum(struct snd_kcontrol *kcontrol,
1082                           struct snd_ctl_elem_value *ucontrol)
1083{
1084        struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol);
1085        struct azf3328_mixer_reg reg;
1086        u16 oreg, nreg, val;
1087
1088        snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
1089        oreg = snd_azf3328_mixer_inw(chip, reg.reg);
1090        val = oreg;
1091        if (reg.reg == IDX_MIXER_REC_SELECT) {
1092                if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U ||
1093                ucontrol->value.enumerated.item[1] > reg.enum_c - 1U)
1094                        return -EINVAL;
1095                val = (ucontrol->value.enumerated.item[0] << 8) |
1096                      (ucontrol->value.enumerated.item[1] << 0);
1097        } else {
1098                if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U)
1099                        return -EINVAL;
1100                val &= ~((reg.enum_c - 1) << reg.lchan_shift);
1101                val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift);
1102        }
1103        snd_azf3328_mixer_outw(chip, reg.reg, val);
1104        nreg = val;
1105
1106        dev_dbg(chip->card->dev,
1107                "put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg);
1108        return (nreg != oreg);
1109}
1110
1111static struct snd_kcontrol_new snd_azf3328_mixer_controls[] = {
1112        AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1),
1113        AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1),
1114        AZF3328_MIXER_SWITCH("PCM Playback Switch", IDX_MIXER_WAVEOUT, 15, 1),
1115        AZF3328_MIXER_VOL_STEREO("PCM Playback Volume",
1116                                        IDX_MIXER_WAVEOUT, 0x1f, 1),
1117        AZF3328_MIXER_SWITCH("PCM 3D Bypass Playback Switch",
1118                                        IDX_MIXER_ADVCTL2, 7, 1),
1119        AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1),
1120        AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1),
1121        AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1),
1122        AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1),
1123        AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1),
1124        AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0),
1125        AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0),
1126        AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1),
1127        AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1),
1128        AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0),
1129        AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1),
1130        AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1),
1131        AZF3328_MIXER_SWITCH("Beep Playback Switch", IDX_MIXER_PCBEEP, 15, 1),
1132        AZF3328_MIXER_VOL_SPECIAL("Beep Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1),
1133        AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1),
1134        AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1),
1135        AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1),
1136        AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1),
1137        AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1),
1138        AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1),
1139        AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1),
1140        AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1),
1141        AZF3328_MIXER_ENUM("Mic Select", IDX_MIXER_ADVCTL2, 2, 8),
1142        AZF3328_MIXER_ENUM("Mono Output Select", IDX_MIXER_ADVCTL2, 2, 9),
1143        AZF3328_MIXER_ENUM("PCM Output Route", IDX_MIXER_ADVCTL2, 2, 15), /* PCM Out Path, place in front since it controls *both* 3D and Bass/Treble! */
1144        AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0),
1145        AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0),
1146        AZF3328_MIXER_SWITCH("3D Control - Switch", IDX_MIXER_ADVCTL2, 13, 0),
1147        AZF3328_MIXER_VOL_SPECIAL("3D Control - Width", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */
1148        AZF3328_MIXER_VOL_SPECIAL("3D Control - Depth", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */
1149#if MIXER_TESTING
1150        AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0),
1151        AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0),
1152        AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0),
1153        AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0),
1154        AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0),
1155        AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0),
1156        AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0),
1157        AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0),
1158        AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0),
1159        AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0),
1160        AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0),
1161        AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0),
1162        AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0),
1163        AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0),
1164        AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0),
1165        AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0),
1166#endif
1167};
1168
1169static u16 snd_azf3328_init_values[][2] = {
1170        { IDX_MIXER_PLAY_MASTER,        MIXER_MUTE_MASK|0x1f1f },
1171        { IDX_MIXER_MODEMOUT,           MIXER_MUTE_MASK|0x1f1f },
1172        { IDX_MIXER_BASSTREBLE,         0x0000 },
1173        { IDX_MIXER_PCBEEP,             MIXER_MUTE_MASK|0x1f1f },
1174        { IDX_MIXER_MODEMIN,            MIXER_MUTE_MASK|0x1f1f },
1175        { IDX_MIXER_MIC,                MIXER_MUTE_MASK|0x001f },
1176        { IDX_MIXER_LINEIN,             MIXER_MUTE_MASK|0x1f1f },
1177        { IDX_MIXER_CDAUDIO,            MIXER_MUTE_MASK|0x1f1f },
1178        { IDX_MIXER_VIDEO,              MIXER_MUTE_MASK|0x1f1f },
1179        { IDX_MIXER_AUX,                MIXER_MUTE_MASK|0x1f1f },
1180        { IDX_MIXER_WAVEOUT,            MIXER_MUTE_MASK|0x1f1f },
1181        { IDX_MIXER_FMSYNTH,            MIXER_MUTE_MASK|0x1f1f },
1182        { IDX_MIXER_REC_VOLUME,         MIXER_MUTE_MASK|0x0707 },
1183};
1184
1185static int
1186snd_azf3328_mixer_new(struct snd_azf3328 *chip)
1187{
1188        struct snd_card *card;
1189        const struct snd_kcontrol_new *sw;
1190        unsigned int idx;
1191        int err;
1192
1193        if (snd_BUG_ON(!chip || !chip->card))
1194                return -EINVAL;
1195
1196        card = chip->card;
1197
1198        /* mixer reset */
1199        snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000);
1200
1201        /* mute and zero volume channels */
1202        for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_init_values); ++idx) {
1203                snd_azf3328_mixer_outw(chip,
1204                        snd_azf3328_init_values[idx][0],
1205                        snd_azf3328_init_values[idx][1]);
1206        }
1207
1208        /* add mixer controls */
1209        sw = snd_azf3328_mixer_controls;
1210        for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls);
1211                        ++idx, ++sw) {
1212                if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0)
1213                        return err;
1214        }
1215        snd_component_add(card, "AZF3328 mixer");
1216        strcpy(card->mixername, "AZF3328 mixer");
1217
1218        return 0;
1219}
1220#endif /* AZF_USE_AC97_LAYER */
1221
1222static int
1223snd_azf3328_hw_params(struct snd_pcm_substream *substream,
1224                                 struct snd_pcm_hw_params *hw_params)
1225{
1226        return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1227}
1228
1229static int
1230snd_azf3328_hw_free(struct snd_pcm_substream *substream)
1231{
1232        snd_pcm_lib_free_pages(substream);
1233        return 0;
1234}
1235
1236static void
1237snd_azf3328_codec_setfmt(struct snd_azf3328_codec_data *codec,
1238                               enum azf_freq_t bitrate,
1239                               unsigned int format_width,
1240                               unsigned int channels
1241)
1242{
1243        unsigned long flags;
1244        u16 val = 0xff00;
1245        u8 freq = 0;
1246
1247        switch (bitrate) {
1248        case AZF_FREQ_4000:  freq = SOUNDFORMAT_FREQ_SUSPECTED_4000; break;
1249        case AZF_FREQ_4800:  freq = SOUNDFORMAT_FREQ_SUSPECTED_4800; break;
1250        case AZF_FREQ_5512:
1251                /* the AZF3328 names it "5510" for some strange reason */
1252                             freq = SOUNDFORMAT_FREQ_5510; break;
1253        case AZF_FREQ_6620:  freq = SOUNDFORMAT_FREQ_6620; break;
1254        case AZF_FREQ_8000:  freq = SOUNDFORMAT_FREQ_8000; break;
1255        case AZF_FREQ_9600:  freq = SOUNDFORMAT_FREQ_9600; break;
1256        case AZF_FREQ_11025: freq = SOUNDFORMAT_FREQ_11025; break;
1257        case AZF_FREQ_13240: freq = SOUNDFORMAT_FREQ_SUSPECTED_13240; break;
1258        case AZF_FREQ_16000: freq = SOUNDFORMAT_FREQ_16000; break;
1259        case AZF_FREQ_22050: freq = SOUNDFORMAT_FREQ_22050; break;
1260        case AZF_FREQ_32000: freq = SOUNDFORMAT_FREQ_32000; break;
1261        default:
1262                snd_printk(KERN_WARNING "unknown bitrate %d, assuming 44.1kHz!\n", bitrate);
1263                /* fall-through */
1264        case AZF_FREQ_44100: freq = SOUNDFORMAT_FREQ_44100; break;
1265        case AZF_FREQ_48000: freq = SOUNDFORMAT_FREQ_48000; break;
1266        case AZF_FREQ_66200: freq = SOUNDFORMAT_FREQ_SUSPECTED_66200; break;
1267        }
1268        /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) hmm, 66120, 65967, 66123 */
1269        /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) hmm, 13237.2Hz? */
1270        /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) yup, 4803Hz */
1271        /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) yup, 4003Hz */
1272        /* val = 0xff05; 5m11.556s (... -> 44100Hz) */
1273        /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */
1274        /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */
1275        /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */
1276        /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */
1277
1278        val |= freq;
1279
1280        if (channels == 2)
1281                val |= SOUNDFORMAT_FLAG_2CHANNELS;
1282
1283        if (format_width == 16)
1284                val |= SOUNDFORMAT_FLAG_16BIT;
1285
1286        spin_lock_irqsave(codec->lock, flags);
1287
1288        /* set bitrate/format */
1289        snd_azf3328_codec_outw(codec, IDX_IO_CODEC_SOUNDFORMAT, val);
1290
1291        /* changing the bitrate/format settings switches off the
1292         * audio output with an annoying click in case of 8/16bit format change
1293         * (maybe shutting down DAC/ADC?), thus immediately
1294         * do some tweaking to reenable it and get rid of the clicking
1295         * (FIXME: yes, it works, but what exactly am I doing here?? :)
1296         * FIXME: does this have some side effects for full-duplex
1297         * or other dramatic side effects? */
1298        /* do it for non-capture codecs only */
1299        if (codec->type != AZF_CODEC_CAPTURE)
1300                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
1301                        snd_azf3328_codec_inw(codec, IDX_IO_CODEC_DMA_FLAGS) |
1302                        DMA_RUN_SOMETHING1 |
1303                        DMA_RUN_SOMETHING2 |
1304                        SOMETHING_ALMOST_ALWAYS_SET |
1305                        DMA_EPILOGUE_SOMETHING |
1306                        DMA_SOMETHING_ELSE
1307                );
1308
1309        spin_unlock_irqrestore(codec->lock, flags);
1310}
1311
1312static inline void
1313snd_azf3328_codec_setfmt_lowpower(struct snd_azf3328_codec_data *codec
1314)
1315{
1316        /* choose lowest frequency for low power consumption.
1317         * While this will cause louder noise due to rather coarse frequency,
1318         * it should never matter since output should always
1319         * get disabled properly when idle anyway. */
1320        snd_azf3328_codec_setfmt(codec, AZF_FREQ_4000, 8, 1);
1321}
1322
1323static void
1324snd_azf3328_ctrl_reg_6AH_update(struct snd_azf3328 *chip,
1325                                        unsigned bitmask,
1326                                        bool enable
1327)
1328{
1329        bool do_mask = !enable;
1330        if (do_mask)
1331                chip->shadow_reg_ctrl_6AH |= bitmask;
1332        else
1333                chip->shadow_reg_ctrl_6AH &= ~bitmask;
1334        dev_dbg(chip->card->dev,
1335                "6AH_update mask 0x%04x do_mask %d: val 0x%04x\n",
1336                bitmask, do_mask, chip->shadow_reg_ctrl_6AH);
1337        snd_azf3328_ctrl_outw(chip, IDX_IO_6AH, chip->shadow_reg_ctrl_6AH);
1338}
1339
1340static inline void
1341snd_azf3328_ctrl_enable_codecs(struct snd_azf3328 *chip, bool enable)
1342{
1343        dev_dbg(chip->card->dev, "codec_enable %d\n", enable);
1344        /* no idea what exactly is being done here, but I strongly assume it's
1345         * PM related */
1346        snd_azf3328_ctrl_reg_6AH_update(
1347                chip, IO_6A_PAUSE_PLAYBACK_BIT8, enable
1348        );
1349}
1350
1351static void
1352snd_azf3328_ctrl_codec_activity(struct snd_azf3328 *chip,
1353                                enum snd_azf3328_codec_type codec_type,
1354                                bool enable
1355)
1356{
1357        struct snd_azf3328_codec_data *codec = &chip->codecs[codec_type];
1358        bool need_change = (codec->running != enable);
1359
1360        dev_dbg(chip->card->dev,
1361                "codec_activity: %s codec, enable %d, need_change %d\n",
1362                                codec->name, enable, need_change
1363        );
1364        if (need_change) {
1365                static const struct {
1366                        enum snd_azf3328_codec_type other1;
1367                        enum snd_azf3328_codec_type other2;
1368                } peer_codecs[3] =
1369                        { { AZF_CODEC_CAPTURE, AZF_CODEC_I2S_OUT },
1370                          { AZF_CODEC_PLAYBACK, AZF_CODEC_I2S_OUT },
1371                          { AZF_CODEC_PLAYBACK, AZF_CODEC_CAPTURE } };
1372                bool call_function;
1373
1374                if (enable)
1375                        /* if enable codec, call enable_codecs func
1376                           to enable codec supply... */
1377                        call_function = 1;
1378                else {
1379                        /* ...otherwise call enable_codecs func
1380                           (which globally shuts down operation of codecs)
1381                           only in case the other codecs are currently
1382                           not active either! */
1383                        call_function =
1384                                ((!chip->codecs[peer_codecs[codec_type].other1]
1385                                        .running)
1386                             &&  (!chip->codecs[peer_codecs[codec_type].other2]
1387                                        .running));
1388                }
1389                if (call_function)
1390                        snd_azf3328_ctrl_enable_codecs(chip, enable);
1391
1392                /* ...and adjust clock, too
1393                 * (reduce noise and power consumption) */
1394                if (!enable)
1395                        snd_azf3328_codec_setfmt_lowpower(codec);
1396                codec->running = enable;
1397        }
1398}
1399
1400static void
1401snd_azf3328_codec_setdmaa(struct snd_azf3328 *chip,
1402                          struct snd_azf3328_codec_data *codec,
1403                          unsigned long addr,
1404                          unsigned int period_bytes,
1405                          unsigned int buffer_bytes
1406)
1407{
1408        WARN_ONCE(period_bytes & 1, "odd period length!?\n");
1409        WARN_ONCE(buffer_bytes != 2 * period_bytes,
1410                 "missed our input expectations! %u vs. %u\n",
1411                 buffer_bytes, period_bytes);
1412        if (!codec->running) {
1413                /* AZF3328 uses a two buffer pointer DMA transfer approach */
1414
1415                unsigned long flags;
1416
1417                /* width 32bit (prevent overflow): */
1418                u32 area_length;
1419                struct codec_setup_io {
1420                        u32 dma_start_1;
1421                        u32 dma_start_2;
1422                        u32 dma_lengths;
1423                } __attribute__((packed)) setup_io;
1424
1425                area_length = buffer_bytes/2;
1426
1427                setup_io.dma_start_1 = addr;
1428                setup_io.dma_start_2 = addr+area_length;
1429
1430                dev_dbg(chip->card->dev,
1431                        "setdma: buffers %08x[%u] / %08x[%u], %u, %u\n",
1432                                setup_io.dma_start_1, area_length,
1433                                setup_io.dma_start_2, area_length,
1434                                period_bytes, buffer_bytes);
1435
1436                /* Hmm, are we really supposed to decrement this by 1??
1437                   Most definitely certainly not: configuring full length does
1438                   work properly (i.e. likely better), and BTW we
1439                   violated possibly differing frame sizes with this...
1440
1441                area_length--; |* max. index *|
1442                */
1443
1444                /* build combined I/O buffer length word */
1445                setup_io.dma_lengths = (area_length << 16) | (area_length);
1446
1447                spin_lock_irqsave(codec->lock, flags);
1448                snd_azf3328_codec_outl_multi(
1449                        codec, IDX_IO_CODEC_DMA_START_1, &setup_io, 3
1450                );
1451                spin_unlock_irqrestore(codec->lock, flags);
1452        }
1453}
1454
1455static int
1456snd_azf3328_pcm_prepare(struct snd_pcm_substream *substream)
1457{
1458        struct snd_pcm_runtime *runtime = substream->runtime;
1459        struct snd_azf3328_codec_data *codec = runtime->private_data;
1460#if 0
1461        unsigned int size = snd_pcm_lib_buffer_bytes(substream);
1462        unsigned int count = snd_pcm_lib_period_bytes(substream);
1463#endif
1464
1465        codec->dma_base = runtime->dma_addr;
1466
1467#if 0
1468        snd_azf3328_codec_setfmt(codec,
1469                runtime->rate,
1470                snd_pcm_format_width(runtime->format),
1471                runtime->channels);
1472        snd_azf3328_codec_setdmaa(chip, codec,
1473                                        runtime->dma_addr, count, size);
1474#endif
1475        return 0;
1476}
1477
1478static int
1479snd_azf3328_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1480{
1481        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
1482        struct snd_pcm_runtime *runtime = substream->runtime;
1483        struct snd_azf3328_codec_data *codec = runtime->private_data;
1484        int result = 0;
1485        u16 flags1;
1486        bool previously_muted = false;
1487        bool is_main_mixer_playback_codec = (AZF_CODEC_PLAYBACK == codec->type);
1488
1489        switch (cmd) {
1490        case SNDRV_PCM_TRIGGER_START:
1491                dev_dbg(chip->card->dev, "START PCM %s\n", codec->name);
1492
1493                if (is_main_mixer_playback_codec) {
1494                        /* mute WaveOut (avoid clicking during setup) */
1495                        previously_muted =
1496                                snd_azf3328_mixer_mute_control_pcm(
1497                                                chip, 1
1498                                );
1499                }
1500
1501                snd_azf3328_codec_setfmt(codec,
1502                        runtime->rate,
1503                        snd_pcm_format_width(runtime->format),
1504                        runtime->channels);
1505
1506                spin_lock(codec->lock);
1507                /* first, remember current value: */
1508                flags1 = snd_azf3328_codec_inw(codec, IDX_IO_CODEC_DMA_FLAGS);
1509
1510                /* stop transfer */
1511                flags1 &= ~DMA_RESUME;
1512                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
1513
1514                /* FIXME: clear interrupts or what??? */
1515                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_IRQTYPE, 0xffff);
1516                spin_unlock(codec->lock);
1517
1518                snd_azf3328_codec_setdmaa(chip, codec, runtime->dma_addr,
1519                        snd_pcm_lib_period_bytes(substream),
1520                        snd_pcm_lib_buffer_bytes(substream)
1521                );
1522
1523                spin_lock(codec->lock);
1524#ifdef WIN9X
1525                /* FIXME: enable playback/recording??? */
1526                flags1 |= DMA_RUN_SOMETHING1 | DMA_RUN_SOMETHING2;
1527                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
1528
1529                /* start transfer again */
1530                /* FIXME: what is this value (0x0010)??? */
1531                flags1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
1532                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
1533#else /* NT4 */
1534                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
1535                        0x0000);
1536                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
1537                        DMA_RUN_SOMETHING1);
1538                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
1539                        DMA_RUN_SOMETHING1 |
1540                        DMA_RUN_SOMETHING2);
1541                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
1542                        DMA_RESUME |
1543                        SOMETHING_ALMOST_ALWAYS_SET |
1544                        DMA_EPILOGUE_SOMETHING |
1545                        DMA_SOMETHING_ELSE);
1546#endif
1547                spin_unlock(codec->lock);
1548                snd_azf3328_ctrl_codec_activity(chip, codec->type, 1);
1549
1550                if (is_main_mixer_playback_codec) {
1551                        /* now unmute WaveOut */
1552                        if (!previously_muted)
1553                                snd_azf3328_mixer_mute_control_pcm(
1554                                                chip, 0
1555                                );
1556                }
1557
1558                dev_dbg(chip->card->dev, "PCM STARTED %s\n", codec->name);
1559                break;
1560        case SNDRV_PCM_TRIGGER_RESUME:
1561                dev_dbg(chip->card->dev, "PCM RESUME %s\n", codec->name);
1562                /* resume codec if we were active */
1563                spin_lock(codec->lock);
1564                if (codec->running)
1565                        snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
1566                                snd_azf3328_codec_inw(
1567                                        codec, IDX_IO_CODEC_DMA_FLAGS
1568                                ) | DMA_RESUME
1569                        );
1570                spin_unlock(codec->lock);
1571                break;
1572        case SNDRV_PCM_TRIGGER_STOP:
1573                dev_dbg(chip->card->dev, "PCM STOP %s\n", codec->name);
1574
1575                if (is_main_mixer_playback_codec) {
1576                        /* mute WaveOut (avoid clicking during setup) */
1577                        previously_muted =
1578                                snd_azf3328_mixer_mute_control_pcm(
1579                                                chip, 1
1580                                );
1581                }
1582
1583                spin_lock(codec->lock);
1584                /* first, remember current value: */
1585                flags1 = snd_azf3328_codec_inw(codec, IDX_IO_CODEC_DMA_FLAGS);
1586
1587                /* stop transfer */
1588                flags1 &= ~DMA_RESUME;
1589                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
1590
1591                /* hmm, is this really required? we're resetting the same bit
1592                 * immediately thereafter... */
1593                flags1 |= DMA_RUN_SOMETHING1;
1594                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
1595
1596                flags1 &= ~DMA_RUN_SOMETHING1;
1597                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
1598                spin_unlock(codec->lock);
1599                snd_azf3328_ctrl_codec_activity(chip, codec->type, 0);
1600
1601                if (is_main_mixer_playback_codec) {
1602                        /* now unmute WaveOut */
1603                        if (!previously_muted)
1604                                snd_azf3328_mixer_mute_control_pcm(
1605                                                chip, 0
1606                                );
1607                }
1608
1609                dev_dbg(chip->card->dev, "PCM STOPPED %s\n", codec->name);
1610                break;
1611        case SNDRV_PCM_TRIGGER_SUSPEND:
1612                dev_dbg(chip->card->dev, "PCM SUSPEND %s\n", codec->name);
1613                /* make sure codec is stopped */
1614                snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
1615                        snd_azf3328_codec_inw(
1616                                codec, IDX_IO_CODEC_DMA_FLAGS
1617                        ) & ~DMA_RESUME
1618                );
1619                break;
1620        case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1621                WARN(1, "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
1622                break;
1623        case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1624                WARN(1, "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
1625                break;
1626        default:
1627                WARN(1, "FIXME: unknown trigger mode!\n");
1628                return -EINVAL;
1629        }
1630
1631        return result;
1632}
1633
1634static snd_pcm_uframes_t
1635snd_azf3328_pcm_pointer(struct snd_pcm_substream *substream
1636)
1637{
1638        const struct snd_azf3328_codec_data *codec =
1639                substream->runtime->private_data;
1640        unsigned long result;
1641        snd_pcm_uframes_t frmres;
1642
1643        result = snd_azf3328_codec_inl(codec, IDX_IO_CODEC_DMA_CURRPOS);
1644
1645        /* calculate offset */
1646#ifdef QUERY_HARDWARE
1647        result -= snd_azf3328_codec_inl(codec, IDX_IO_CODEC_DMA_START_1);
1648#else
1649        result -= codec->dma_base;
1650#endif
1651        frmres = bytes_to_frames( substream->runtime, result);
1652        dev_dbg(substream->pcm->card->dev, "%08li %s @ 0x%8lx, frames %8ld\n",
1653                jiffies, codec->name, result, frmres);
1654        return frmres;
1655}
1656
1657/******************************************************************/
1658
1659#ifdef SUPPORT_GAMEPORT
1660static inline void
1661snd_azf3328_gameport_irq_enable(struct snd_azf3328 *chip,
1662                                bool enable
1663)
1664{
1665        snd_azf3328_io_reg_setb(
1666                chip->game_io+IDX_GAME_HWCONFIG,
1667                GAME_HWCFG_IRQ_ENABLE,
1668                enable
1669        );
1670}
1671
1672static inline void
1673snd_azf3328_gameport_legacy_address_enable(struct snd_azf3328 *chip,
1674                                           bool enable
1675)
1676{
1677        snd_azf3328_io_reg_setb(
1678                chip->game_io+IDX_GAME_HWCONFIG,
1679                GAME_HWCFG_LEGACY_ADDRESS_ENABLE,
1680                enable
1681        );
1682}
1683
1684static void
1685snd_azf3328_gameport_set_counter_frequency(struct snd_azf3328 *chip,
1686                                           unsigned int freq_cfg
1687)
1688{
1689        snd_azf3328_io_reg_setb(
1690                chip->game_io+IDX_GAME_HWCONFIG,
1691                0x02,
1692                (freq_cfg & 1) != 0
1693        );
1694        snd_azf3328_io_reg_setb(
1695                chip->game_io+IDX_GAME_HWCONFIG,
1696                0x04,
1697                (freq_cfg & 2) != 0
1698        );
1699}
1700
1701static inline void
1702snd_azf3328_gameport_axis_circuit_enable(struct snd_azf3328 *chip, bool enable)
1703{
1704        snd_azf3328_ctrl_reg_6AH_update(
1705                chip, IO_6A_SOMETHING2_GAMEPORT, enable
1706        );
1707}
1708
1709static inline void
1710snd_azf3328_gameport_interrupt(struct snd_azf3328 *chip)
1711{
1712        /*
1713         * skeleton handler only
1714         * (we do not want axis reading in interrupt handler - too much load!)
1715         */
1716        dev_dbg(chip->card->dev, "gameport irq\n");
1717
1718         /* this should ACK the gameport IRQ properly, hopefully. */
1719        snd_azf3328_game_inw(chip, IDX_GAME_AXIS_VALUE);
1720}
1721
1722static int
1723snd_azf3328_gameport_open(struct gameport *gameport, int mode)
1724{
1725        struct snd_azf3328 *chip = gameport_get_port_data(gameport);
1726        int res;
1727
1728        dev_dbg(chip->card->dev, "gameport_open, mode %d\n", mode);
1729        switch (mode) {
1730        case GAMEPORT_MODE_COOKED:
1731        case GAMEPORT_MODE_RAW:
1732                res = 0;
1733                break;
1734        default:
1735                res = -1;
1736                break;
1737        }
1738
1739        snd_azf3328_gameport_set_counter_frequency(chip,
1740                                GAME_HWCFG_ADC_COUNTER_FREQ_STD);
1741        snd_azf3328_gameport_axis_circuit_enable(chip, (res == 0));
1742
1743        return res;
1744}
1745
1746static void
1747snd_azf3328_gameport_close(struct gameport *gameport)
1748{
1749        struct snd_azf3328 *chip = gameport_get_port_data(gameport);
1750
1751        dev_dbg(chip->card->dev, "gameport_close\n");
1752        snd_azf3328_gameport_set_counter_frequency(chip,
1753                                GAME_HWCFG_ADC_COUNTER_FREQ_1_200);
1754        snd_azf3328_gameport_axis_circuit_enable(chip, 0);
1755}
1756
1757static int
1758snd_azf3328_gameport_cooked_read(struct gameport *gameport,
1759                                 int *axes,
1760                                 int *buttons
1761)
1762{
1763        struct snd_azf3328 *chip = gameport_get_port_data(gameport);
1764        int i;
1765        u8 val;
1766        unsigned long flags;
1767
1768        if (snd_BUG_ON(!chip))
1769                return 0;
1770
1771        spin_lock_irqsave(&chip->reg_lock, flags);
1772        val = snd_azf3328_game_inb(chip, IDX_GAME_LEGACY_COMPATIBLE);
1773        *buttons = (~(val) >> 4) & 0xf;
1774
1775        /* ok, this one is a bit dirty: cooked_read is being polled by a timer,
1776         * thus we're atomic and cannot actively wait in here
1777         * (which would be useful for us since it probably would be better
1778         * to trigger a measurement in here, then wait a short amount of
1779         * time until it's finished, then read values of _this_ measurement).
1780         *
1781         * Thus we simply resort to reading values if they're available already
1782         * and trigger the next measurement.
1783         */
1784
1785        val = snd_azf3328_game_inb(chip, IDX_GAME_AXES_CONFIG);
1786        if (val & GAME_AXES_SAMPLING_READY) {
1787                for (i = 0; i < ARRAY_SIZE(chip->axes); ++i) {
1788                        /* configure the axis to read */
1789                        val = (i << 4) | 0x0f;
1790                        snd_azf3328_game_outb(chip, IDX_GAME_AXES_CONFIG, val);
1791
1792                        chip->axes[i] = snd_azf3328_game_inw(
1793                                                chip, IDX_GAME_AXIS_VALUE
1794                                        );
1795                }
1796        }
1797
1798        /* trigger next sampling of axes, to be evaluated the next time we
1799         * enter this function */
1800
1801        /* for some very, very strange reason we cannot enable
1802         * Measurement Ready monitoring for all axes here,
1803         * at least not when only one joystick connected */
1804        val = 0x03; /* we're able to monitor axes 1 and 2 only */
1805        snd_azf3328_game_outb(chip, IDX_GAME_AXES_CONFIG, val);
1806
1807        snd_azf3328_game_outw(chip, IDX_GAME_AXIS_VALUE, 0xffff);
1808        spin_unlock_irqrestore(&chip->reg_lock, flags);
1809
1810        for (i = 0; i < ARRAY_SIZE(chip->axes); i++) {
1811                axes[i] = chip->axes[i];
1812                if (axes[i] == 0xffff)
1813                        axes[i] = -1;
1814        }
1815
1816        dev_dbg(chip->card->dev, "cooked_read: axes %d %d %d %d buttons %d\n",
1817                axes[0], axes[1], axes[2], axes[3], *buttons);
1818
1819        return 0;
1820}
1821
1822static int
1823snd_azf3328_gameport(struct snd_azf3328 *chip, int dev)
1824{
1825        struct gameport *gp;
1826
1827        chip->gameport = gp = gameport_allocate_port();
1828        if (!gp) {
1829                dev_err(chip->card->dev, "cannot alloc memory for gameport\n");
1830                return -ENOMEM;
1831        }
1832
1833        gameport_set_name(gp, "AZF3328 Gameport");
1834        gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1835        gameport_set_dev_parent(gp, &chip->pci->dev);
1836        gp->io = chip->game_io;
1837        gameport_set_port_data(gp, chip);
1838
1839        gp->open = snd_azf3328_gameport_open;
1840        gp->close = snd_azf3328_gameport_close;
1841        gp->fuzz = 16; /* seems ok */
1842        gp->cooked_read = snd_azf3328_gameport_cooked_read;
1843
1844        /* DISABLE legacy address: we don't need it! */
1845        snd_azf3328_gameport_legacy_address_enable(chip, 0);
1846
1847        snd_azf3328_gameport_set_counter_frequency(chip,
1848                                GAME_HWCFG_ADC_COUNTER_FREQ_1_200);
1849        snd_azf3328_gameport_axis_circuit_enable(chip, 0);
1850
1851        gameport_register_port(chip->gameport);
1852
1853        return 0;
1854}
1855
1856static void
1857snd_azf3328_gameport_free(struct snd_azf3328 *chip)
1858{
1859        if (chip->gameport) {
1860                gameport_unregister_port(chip->gameport);
1861                chip->gameport = NULL;
1862        }
1863        snd_azf3328_gameport_irq_enable(chip, 0);
1864}
1865#else
1866static inline int
1867snd_azf3328_gameport(struct snd_azf3328 *chip, int dev) { return -ENOSYS; }
1868static inline void
1869snd_azf3328_gameport_free(struct snd_azf3328 *chip) { }
1870static inline void
1871snd_azf3328_gameport_interrupt(struct snd_azf3328 *chip)
1872{
1873        dev_warn(chip->card->dev, "huh, game port IRQ occurred!?\n");
1874}
1875#endif /* SUPPORT_GAMEPORT */
1876
1877/******************************************************************/
1878
1879static inline void
1880snd_azf3328_irq_log_unknown_type(struct snd_azf3328 *chip, u8 which)
1881{
1882        dev_dbg(chip->card->dev,
1883                "unknown IRQ type (%x) occurred, please report!\n",
1884                which);
1885}
1886
1887static inline void
1888snd_azf3328_pcm_interrupt(struct snd_azf3328 *chip,
1889                          const struct snd_azf3328_codec_data *first_codec,
1890                          u8 status
1891)
1892{
1893        u8 which;
1894        enum snd_azf3328_codec_type codec_type;
1895        const struct snd_azf3328_codec_data *codec = first_codec;
1896
1897        for (codec_type = AZF_CODEC_PLAYBACK;
1898                 codec_type <= AZF_CODEC_I2S_OUT;
1899                         ++codec_type, ++codec) {
1900
1901                /* skip codec if there's no interrupt for it */
1902                if (!(status & (1 << codec_type)))
1903                        continue;
1904
1905                spin_lock(codec->lock);
1906                which = snd_azf3328_codec_inb(codec, IDX_IO_CODEC_IRQTYPE);
1907                /* ack all IRQ types immediately */
1908                snd_azf3328_codec_outb(codec, IDX_IO_CODEC_IRQTYPE, which);
1909                spin_unlock(codec->lock);
1910
1911                if (codec->substream) {
1912                        snd_pcm_period_elapsed(codec->substream);
1913                        dev_dbg(chip->card->dev, "%s period done (#%x), @ %x\n",
1914                                codec->name,
1915                                which,
1916                                snd_azf3328_codec_inl(
1917                                        codec, IDX_IO_CODEC_DMA_CURRPOS));
1918                } else
1919                        dev_warn(chip->card->dev, "irq handler problem!\n");
1920                if (which & IRQ_SOMETHING)
1921                        snd_azf3328_irq_log_unknown_type(chip, which);
1922        }
1923}
1924
1925static irqreturn_t
1926snd_azf3328_interrupt(int irq, void *dev_id)
1927{
1928        struct snd_azf3328 *chip = dev_id;
1929        u8 status;
1930        static unsigned long irq_count;
1931
1932        status = snd_azf3328_ctrl_inb(chip, IDX_IO_IRQSTATUS);
1933
1934        /* fast path out, to ease interrupt sharing */
1935        if (!(status &
1936                (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_I2S_OUT
1937                |IRQ_GAMEPORT|IRQ_MPU401|IRQ_TIMER)
1938        ))
1939                return IRQ_NONE; /* must be interrupt for another device */
1940
1941        dev_dbg(chip->card->dev,
1942                "irq_count %ld! IDX_IO_IRQSTATUS %04x\n",
1943                        irq_count++ /* debug-only */,
1944                        status);
1945
1946        if (status & IRQ_TIMER) {
1947                /* dev_dbg(chip->card->dev, "timer %ld\n",
1948                        snd_azf3328_codec_inl(chip, IDX_IO_TIMER_VALUE)
1949                                & TIMER_VALUE_MASK
1950                ); */
1951                if (chip->timer)
1952                        snd_timer_interrupt(chip->timer, chip->timer->sticks);
1953                /* ACK timer */
1954                spin_lock(&chip->reg_lock);
1955                snd_azf3328_ctrl_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07);
1956                spin_unlock(&chip->reg_lock);
1957                dev_dbg(chip->card->dev, "timer IRQ\n");
1958        }
1959
1960        if (status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_I2S_OUT))
1961                snd_azf3328_pcm_interrupt(chip, chip->codecs, status);
1962
1963        if (status & IRQ_GAMEPORT)
1964                snd_azf3328_gameport_interrupt(chip);
1965
1966        /* MPU401 has less critical IRQ requirements
1967         * than timer and playback/recording, right? */
1968        if (status & IRQ_MPU401) {
1969                snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1970
1971                /* hmm, do we have to ack the IRQ here somehow?
1972                 * If so, then I don't know how yet... */
1973                dev_dbg(chip->card->dev, "MPU401 IRQ\n");
1974        }
1975        return IRQ_HANDLED;
1976}
1977
1978/*****************************************************************/
1979
1980/* as long as we think we have identical snd_pcm_hardware parameters
1981   for playback, capture and i2s out, we can use the same physical struct
1982   since the struct is simply being copied into a member.
1983*/
1984static const struct snd_pcm_hardware snd_azf3328_hardware =
1985{
1986        /* FIXME!! Correct? */
1987        .info =                 SNDRV_PCM_INFO_MMAP |
1988                                SNDRV_PCM_INFO_INTERLEAVED |
1989                                SNDRV_PCM_INFO_MMAP_VALID,
1990        .formats =              SNDRV_PCM_FMTBIT_S8 |
1991                                SNDRV_PCM_FMTBIT_U8 |
1992                                SNDRV_PCM_FMTBIT_S16_LE |
1993                                SNDRV_PCM_FMTBIT_U16_LE,
1994        .rates =                SNDRV_PCM_RATE_5512 |
1995                                SNDRV_PCM_RATE_8000_48000 |
1996                                SNDRV_PCM_RATE_KNOT,
1997        .rate_min =             AZF_FREQ_4000,
1998        .rate_max =             AZF_FREQ_66200,
1999        .channels_min =         1,
2000        .channels_max =         2,
2001        .buffer_bytes_max =     (64*1024),
2002        .period_bytes_min =     1024,
2003        .period_bytes_max =     (32*1024),
2004        /* We simply have two DMA areas (instead of a list of descriptors
2005           such as other cards); I believe that this is a fixed hardware
2006           attribute and there isn't much driver magic to be done to expand it.
2007           Thus indicate that we have at least and at most 2 periods. */
2008        .periods_min =          2,
2009        .periods_max =          2,
2010        /* FIXME: maybe that card actually has a FIFO?
2011         * Hmm, it seems newer revisions do have one, but we still don't know
2012         * its size... */
2013        .fifo_size =            0,
2014};
2015
2016
2017static const unsigned int snd_azf3328_fixed_rates[] = {
2018        AZF_FREQ_4000,
2019        AZF_FREQ_4800,
2020        AZF_FREQ_5512,
2021        AZF_FREQ_6620,
2022        AZF_FREQ_8000,
2023        AZF_FREQ_9600,
2024        AZF_FREQ_11025,
2025        AZF_FREQ_13240,
2026        AZF_FREQ_16000,
2027        AZF_FREQ_22050,
2028        AZF_FREQ_32000,
2029        AZF_FREQ_44100,
2030        AZF_FREQ_48000,
2031        AZF_FREQ_66200
2032};
2033
2034static const struct snd_pcm_hw_constraint_list snd_azf3328_hw_constraints_rates = {
2035        .count = ARRAY_SIZE(snd_azf3328_fixed_rates),
2036        .list = snd_azf3328_fixed_rates,
2037        .mask = 0,
2038};
2039
2040/*****************************************************************/
2041
2042static int
2043snd_azf3328_pcm_open(struct snd_pcm_substream *substream,
2044                     enum snd_azf3328_codec_type codec_type
2045)
2046{
2047        struct snd_azf3328 *chip = snd_pcm_substream_chip(substream);
2048        struct snd_pcm_runtime *runtime = substream->runtime;
2049        struct snd_azf3328_codec_data *codec = &chip->codecs[codec_type];
2050
2051        codec->substream = substream;
2052
2053        /* same parameters for all our codecs - at least we think so... */
2054        runtime->hw = snd_azf3328_hardware;
2055
2056        snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2057                                   &snd_azf3328_hw_constraints_rates);
2058        runtime->private_data = codec;
2059        return 0;
2060}
2061
2062static int
2063snd_azf3328_pcm_playback_open(struct snd_pcm_substream *substream)
2064{
2065        return snd_azf3328_pcm_open(substream, AZF_CODEC_PLAYBACK);
2066}
2067
2068static int
2069snd_azf3328_pcm_capture_open(struct snd_pcm_substream *substream)
2070{
2071        return snd_azf3328_pcm_open(substream, AZF_CODEC_CAPTURE);
2072}
2073
2074static int
2075snd_azf3328_pcm_i2s_out_open(struct snd_pcm_substream *substream)
2076{
2077        return snd_azf3328_pcm_open(substream, AZF_CODEC_I2S_OUT);
2078}
2079
2080static int
2081snd_azf3328_pcm_close(struct snd_pcm_substream *substream
2082)
2083{
2084        struct snd_azf3328_codec_data *codec =
2085                substream->runtime->private_data;
2086
2087        codec->substream = NULL;
2088        return 0;
2089}
2090
2091/******************************************************************/
2092
2093static const struct snd_pcm_ops snd_azf3328_playback_ops = {
2094        .open =         snd_azf3328_pcm_playback_open,
2095        .close =        snd_azf3328_pcm_close,
2096        .ioctl =        snd_pcm_lib_ioctl,
2097        .hw_params =    snd_azf3328_hw_params,
2098        .hw_free =      snd_azf3328_hw_free,
2099        .prepare =      snd_azf3328_pcm_prepare,
2100        .trigger =      snd_azf3328_pcm_trigger,
2101        .pointer =      snd_azf3328_pcm_pointer
2102};
2103
2104static const struct snd_pcm_ops snd_azf3328_capture_ops = {
2105        .open =         snd_azf3328_pcm_capture_open,
2106        .close =        snd_azf3328_pcm_close,
2107        .ioctl =        snd_pcm_lib_ioctl,
2108        .hw_params =    snd_azf3328_hw_params,
2109        .hw_free =      snd_azf3328_hw_free,
2110        .prepare =      snd_azf3328_pcm_prepare,
2111        .trigger =      snd_azf3328_pcm_trigger,
2112        .pointer =      snd_azf3328_pcm_pointer
2113};
2114
2115static const struct snd_pcm_ops snd_azf3328_i2s_out_ops = {
2116        .open =         snd_azf3328_pcm_i2s_out_open,
2117        .close =        snd_azf3328_pcm_close,
2118        .ioctl =        snd_pcm_lib_ioctl,
2119        .hw_params =    snd_azf3328_hw_params,
2120        .hw_free =      snd_azf3328_hw_free,
2121        .prepare =      snd_azf3328_pcm_prepare,
2122        .trigger =      snd_azf3328_pcm_trigger,
2123        .pointer =      snd_azf3328_pcm_pointer
2124};
2125
2126static int
2127snd_azf3328_pcm(struct snd_azf3328 *chip)
2128{
2129        /* pcm devices */
2130        enum { AZF_PCMDEV_STD, AZF_PCMDEV_I2S_OUT, NUM_AZF_PCMDEVS };
2131
2132        struct snd_pcm *pcm;
2133        int err;
2134
2135        err = snd_pcm_new(chip->card, "AZF3328 DSP", AZF_PCMDEV_STD,
2136                                                                1, 1, &pcm);
2137        if (err < 0)
2138                return err;
2139        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
2140                                                &snd_azf3328_playback_ops);
2141        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
2142                                                &snd_azf3328_capture_ops);
2143
2144        pcm->private_data = chip;
2145        pcm->info_flags = 0;
2146        strcpy(pcm->name, chip->card->shortname);
2147        /* same pcm object for playback/capture (see snd_pcm_new() above) */
2148        chip->pcm[AZF_CODEC_PLAYBACK] = pcm;
2149        chip->pcm[AZF_CODEC_CAPTURE] = pcm;
2150
2151        snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
2152                                                snd_dma_pci_data(chip->pci),
2153                                                        64*1024, 64*1024);
2154
2155        err = snd_pcm_new(chip->card, "AZF3328 I2S OUT", AZF_PCMDEV_I2S_OUT,
2156                                                                1, 0, &pcm);
2157        if (err < 0)
2158                return err;
2159        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
2160                                                &snd_azf3328_i2s_out_ops);
2161
2162        pcm->private_data = chip;
2163        pcm->info_flags = 0;
2164        strcpy(pcm->name, chip->card->shortname);
2165        chip->pcm[AZF_CODEC_I2S_OUT] = pcm;
2166
2167        snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
2168                                                snd_dma_pci_data(chip->pci),
2169                                                        64*1024, 64*1024);
2170
2171        return 0;
2172}
2173
2174/******************************************************************/
2175
2176/*** NOTE: the physical timer resolution actually is 1024000 ticks per second
2177 *** (probably derived from main crystal via a divider of 24),
2178 *** but announcing those attributes to user-space would make programs
2179 *** configure the timer to a 1 tick value, resulting in an absolutely fatal
2180 *** timer IRQ storm.
2181 *** Thus I chose to announce a down-scaled virtual timer to the outside and
2182 *** calculate real timer countdown values internally.
2183 *** (the scale factor can be set via module parameter "seqtimer_scaling").
2184 ***/
2185
2186static int
2187snd_azf3328_timer_start(struct snd_timer *timer)
2188{
2189        struct snd_azf3328 *chip;
2190        unsigned long flags;
2191        unsigned int delay;
2192
2193        chip = snd_timer_chip(timer);
2194        delay = ((timer->sticks * seqtimer_scaling) - 1) & TIMER_VALUE_MASK;
2195        if (delay < 49) {
2196                /* uhoh, that's not good, since user-space won't know about
2197                 * this timing tweak
2198                 * (we need to do it to avoid a lockup, though) */
2199
2200                dev_dbg(chip->card->dev, "delay was too low (%d)!\n", delay);
2201                delay = 49; /* minimum time is 49 ticks */
2202        }
2203        dev_dbg(chip->card->dev, "setting timer countdown value %d\n", delay);
2204        delay |= TIMER_COUNTDOWN_ENABLE | TIMER_IRQ_ENABLE;
2205        spin_lock_irqsave(&chip->reg_lock, flags);
2206        snd_azf3328_ctrl_outl(chip, IDX_IO_TIMER_VALUE, delay);
2207        spin_unlock_irqrestore(&chip->reg_lock, flags);
2208        return 0;
2209}
2210
2211static int
2212snd_azf3328_timer_stop(struct snd_timer *timer)
2213{
2214        struct snd_azf3328 *chip;
2215        unsigned long flags;
2216
2217        chip = snd_timer_chip(timer);
2218        spin_lock_irqsave(&chip->reg_lock, flags);
2219        /* disable timer countdown and interrupt */
2220        /* Hmm, should we write TIMER_IRQ_ACK here?
2221           YES indeed, otherwise a rogue timer operation - which prompts
2222           ALSA(?) to call repeated stop() in vain, but NOT start() -
2223           will never end (value 0x03 is kept shown in control byte).
2224           Simply manually poking 0x04 _once_ immediately successfully stops
2225           the hardware/ALSA interrupt activity. */
2226        snd_azf3328_ctrl_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x04);
2227        spin_unlock_irqrestore(&chip->reg_lock, flags);
2228        return 0;
2229}
2230
2231
2232static int
2233snd_azf3328_timer_precise_resolution(struct snd_timer *timer,
2234                                               unsigned long *num, unsigned long *den)
2235{
2236        *num = 1;
2237        *den = 1024000 / seqtimer_scaling;
2238        return 0;
2239}
2240
2241static struct snd_timer_hardware snd_azf3328_timer_hw = {
2242        .flags = SNDRV_TIMER_HW_AUTO,
2243        .resolution = 977, /* 1000000/1024000 = 0.9765625us */
2244        .ticks = 1024000, /* max tick count, defined by the value register; actually it's not 1024000, but 1048576, but we don't care */
2245        .start = snd_azf3328_timer_start,
2246        .stop = snd_azf3328_timer_stop,
2247        .precise_resolution = snd_azf3328_timer_precise_resolution,
2248};
2249
2250static int
2251snd_azf3328_timer(struct snd_azf3328 *chip, int device)
2252{
2253        struct snd_timer *timer = NULL;
2254        struct snd_timer_id tid;
2255        int err;
2256
2257        tid.dev_class = SNDRV_TIMER_CLASS_CARD;
2258        tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
2259        tid.card = chip->card->number;
2260        tid.device = device;
2261        tid.subdevice = 0;
2262
2263        snd_azf3328_timer_hw.resolution *= seqtimer_scaling;
2264        snd_azf3328_timer_hw.ticks /= seqtimer_scaling;
2265
2266        err = snd_timer_new(chip->card, "AZF3328", &tid, &timer);
2267        if (err < 0)
2268                goto out;
2269
2270        strcpy(timer->name, "AZF3328 timer");
2271        timer->private_data = chip;
2272        timer->hw = snd_azf3328_timer_hw;
2273
2274        chip->timer = timer;
2275
2276        snd_azf3328_timer_stop(timer);
2277
2278        err = 0;
2279
2280out:
2281        return err;
2282}
2283
2284/******************************************************************/
2285
2286static int
2287snd_azf3328_free(struct snd_azf3328 *chip)
2288{
2289        if (chip->irq < 0)
2290                goto __end_hw;
2291
2292        snd_azf3328_mixer_reset(chip);
2293
2294        snd_azf3328_timer_stop(chip->timer);
2295        snd_azf3328_gameport_free(chip);
2296
2297__end_hw:
2298        if (chip->irq >= 0)
2299                free_irq(chip->irq, chip);
2300        pci_release_regions(chip->pci);
2301        pci_disable_device(chip->pci);
2302
2303        kfree(chip);
2304        return 0;
2305}
2306
2307static int
2308snd_azf3328_dev_free(struct snd_device *device)
2309{
2310        struct snd_azf3328 *chip = device->device_data;
2311        return snd_azf3328_free(chip);
2312}
2313
2314#if 0
2315/* check whether a bit can be modified */
2316static void
2317snd_azf3328_test_bit(unsigned unsigned reg, int bit)
2318{
2319        unsigned char val, valoff, valon;
2320
2321        val = inb(reg);
2322
2323        outb(val & ~(1 << bit), reg);
2324        valoff = inb(reg);
2325
2326        outb(val|(1 << bit), reg);
2327        valon = inb(reg);
2328
2329        outb(val, reg);
2330
2331        printk(KERN_DEBUG "reg %04x bit %d: %02x %02x %02x\n",
2332                                reg, bit, val, valoff, valon
2333        );
2334}
2335#endif
2336
2337static inline void
2338snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip)
2339{
2340        u16 tmp;
2341
2342        dev_dbg(chip->card->dev,
2343                "ctrl_io 0x%lx, game_io 0x%lx, mpu_io 0x%lx, "
2344                "opl3_io 0x%lx, mixer_io 0x%lx, irq %d\n",
2345                chip->ctrl_io, chip->game_io, chip->mpu_io,
2346                chip->opl3_io, chip->mixer_io, chip->irq);
2347
2348        dev_dbg(chip->card->dev,
2349                "game %02x %02x %02x %02x %02x %02x\n",
2350                snd_azf3328_game_inb(chip, 0),
2351                snd_azf3328_game_inb(chip, 1),
2352                snd_azf3328_game_inb(chip, 2),
2353                snd_azf3328_game_inb(chip, 3),
2354                snd_azf3328_game_inb(chip, 4),
2355                snd_azf3328_game_inb(chip, 5));
2356
2357        for (tmp = 0; tmp < 0x07; tmp += 1)
2358                dev_dbg(chip->card->dev,
2359                        "mpu_io 0x%04x\n", inb(chip->mpu_io + tmp));
2360
2361        for (tmp = 0; tmp <= 0x07; tmp += 1)
2362                dev_dbg(chip->card->dev,
2363                        "0x%02x: game200 0x%04x, game208 0x%04x\n",
2364                        tmp, inb(0x200 + tmp), inb(0x208 + tmp));
2365
2366        for (tmp = 0; tmp <= 0x01; tmp += 1)
2367                dev_dbg(chip->card->dev,
2368                        "0x%02x: mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, "
2369                        "mpu330 0x%04x opl388 0x%04x opl38c 0x%04x\n",
2370                                tmp,
2371                                inb(0x300 + tmp),
2372                                inb(0x310 + tmp),
2373                                inb(0x320 + tmp),
2374                                inb(0x330 + tmp),
2375                                inb(0x388 + tmp),
2376                                inb(0x38c + tmp));
2377
2378        for (tmp = 0; tmp < AZF_IO_SIZE_CTRL; tmp += 2)
2379                dev_dbg(chip->card->dev,
2380                        "ctrl 0x%02x: 0x%04x\n",
2381                        tmp, snd_azf3328_ctrl_inw(chip, tmp));
2382
2383        for (tmp = 0; tmp < AZF_IO_SIZE_MIXER; tmp += 2)
2384                dev_dbg(chip->card->dev,
2385                        "mixer 0x%02x: 0x%04x\n",
2386                        tmp, snd_azf3328_mixer_inw(chip, tmp));
2387}
2388
2389static int
2390snd_azf3328_create(struct snd_card *card,
2391                   struct pci_dev *pci,
2392                   unsigned long device_type,
2393                   struct snd_azf3328 **rchip)
2394{
2395        struct snd_azf3328 *chip;
2396        int err;
2397        static struct snd_device_ops ops = {
2398                .dev_free =     snd_azf3328_dev_free,
2399        };
2400        u8 dma_init;
2401        enum snd_azf3328_codec_type codec_type;
2402        struct snd_azf3328_codec_data *codec_setup;
2403
2404        *rchip = NULL;
2405
2406        err = pci_enable_device(pci);
2407        if (err < 0)
2408                return err;
2409
2410        chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2411        if (chip == NULL) {
2412                err = -ENOMEM;
2413                goto out_err;
2414        }
2415        spin_lock_init(&chip->reg_lock);
2416        chip->card = card;
2417        chip->pci = pci;
2418        chip->irq = -1;
2419
2420        /* check if we can restrict PCI DMA transfers to 24 bits */
2421        if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 ||
2422            dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) {
2423                dev_err(card->dev,
2424                        "architecture does not support 24bit PCI busmaster DMA\n"
2425                );
2426                err = -ENXIO;
2427                goto out_err;
2428        }
2429
2430        err = pci_request_regions(pci, "Aztech AZF3328");
2431        if (err < 0)
2432                goto out_err;
2433
2434        chip->ctrl_io  = pci_resource_start(pci, 0);
2435        chip->game_io  = pci_resource_start(pci, 1);
2436        chip->mpu_io   = pci_resource_start(pci, 2);
2437        chip->opl3_io  = pci_resource_start(pci, 3);
2438        chip->mixer_io = pci_resource_start(pci, 4);
2439
2440        codec_setup = &chip->codecs[AZF_CODEC_PLAYBACK];
2441        codec_setup->io_base = chip->ctrl_io + AZF_IO_OFFS_CODEC_PLAYBACK;
2442        codec_setup->lock = &chip->reg_lock;
2443        codec_setup->type = AZF_CODEC_PLAYBACK;
2444        codec_setup->name = "PLAYBACK";
2445
2446        codec_setup = &chip->codecs[AZF_CODEC_CAPTURE];
2447        codec_setup->io_base = chip->ctrl_io + AZF_IO_OFFS_CODEC_CAPTURE;
2448        codec_setup->lock = &chip->reg_lock;
2449        codec_setup->type = AZF_CODEC_CAPTURE;
2450        codec_setup->name = "CAPTURE";
2451
2452        codec_setup = &chip->codecs[AZF_CODEC_I2S_OUT];
2453        codec_setup->io_base = chip->ctrl_io + AZF_IO_OFFS_CODEC_I2S_OUT;
2454        codec_setup->lock = &chip->reg_lock;
2455        codec_setup->type = AZF_CODEC_I2S_OUT;
2456        codec_setup->name = "I2S_OUT";
2457
2458        if (request_irq(pci->irq, snd_azf3328_interrupt,
2459                        IRQF_SHARED, KBUILD_MODNAME, chip)) {
2460                dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
2461                err = -EBUSY;
2462                goto out_err;
2463        }
2464        chip->irq = pci->irq;
2465        pci_set_master(pci);
2466        synchronize_irq(chip->irq);
2467
2468        snd_azf3328_debug_show_ports(chip);
2469
2470        err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
2471        if (err < 0)
2472                goto out_err;
2473
2474        /* create mixer interface & switches */
2475        err = snd_azf3328_mixer_new(chip);
2476        if (err < 0)
2477                goto out_err;
2478
2479        /* standard codec init stuff */
2480                /* default DMA init value */
2481        dma_init = DMA_RUN_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE;
2482
2483        for (codec_type = AZF_CODEC_PLAYBACK;
2484                codec_type <= AZF_CODEC_I2S_OUT; ++codec_type) {
2485                struct snd_azf3328_codec_data *codec =
2486                         &chip->codecs[codec_type];
2487
2488                /* shutdown codecs to reduce power / noise */
2489                        /* have ...ctrl_codec_activity() act properly */
2490                codec->running = 1;
2491                snd_azf3328_ctrl_codec_activity(chip, codec_type, 0);
2492
2493                spin_lock_irq(codec->lock);
2494                snd_azf3328_codec_outb(codec, IDX_IO_CODEC_DMA_FLAGS,
2495                                                 dma_init);
2496                spin_unlock_irq(codec->lock);
2497        }
2498
2499        *rchip = chip;
2500
2501        err = 0;
2502        goto out;
2503
2504out_err:
2505        if (chip)
2506                snd_azf3328_free(chip);
2507        pci_disable_device(pci);
2508
2509out:
2510        return err;
2511}
2512
2513static int
2514snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
2515{
2516        static int dev;
2517        struct snd_card *card;
2518        struct snd_azf3328 *chip;
2519        struct snd_opl3 *opl3;
2520        int err;
2521
2522        if (dev >= SNDRV_CARDS) {
2523                err = -ENODEV;
2524                goto out;
2525        }
2526        if (!enable[dev]) {
2527                dev++;
2528                err = -ENOENT;
2529                goto out;
2530        }
2531
2532        err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2533                           0, &card);
2534        if (err < 0)
2535                goto out;
2536
2537        strcpy(card->driver, "AZF3328");
2538        strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
2539
2540        err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip);
2541        if (err < 0)
2542                goto out_err;
2543
2544        card->private_data = chip;
2545
2546        /* chose to use MPU401_HW_AZT2320 ID instead of MPU401_HW_MPU401,
2547           since our hardware ought to be similar, thus use same ID. */
2548        err = snd_mpu401_uart_new(
2549                card, 0,
2550                MPU401_HW_AZT2320, chip->mpu_io,
2551                MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2552                -1, &chip->rmidi
2553        );
2554        if (err < 0) {
2555                dev_err(card->dev, "no MPU-401 device at 0x%lx?\n",
2556                                chip->mpu_io
2557                );
2558                goto out_err;
2559        }
2560
2561        err = snd_azf3328_timer(chip, 0);
2562        if (err < 0)
2563                goto out_err;
2564
2565        err = snd_azf3328_pcm(chip);
2566        if (err < 0)
2567                goto out_err;
2568
2569        if (snd_opl3_create(card, chip->opl3_io, chip->opl3_io+2,
2570                            OPL3_HW_AUTO, 1, &opl3) < 0) {
2571                dev_err(card->dev, "no OPL3 device at 0x%lx-0x%lx?\n",
2572                           chip->opl3_io, chip->opl3_io+2
2573                );
2574        } else {
2575                /* need to use IDs 1, 2 since ID 0 is snd_azf3328_timer above */
2576                err = snd_opl3_timer_new(opl3, 1, 2);
2577                if (err < 0)
2578                        goto out_err;
2579                err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
2580                if (err < 0)
2581                        goto out_err;
2582                opl3->private_data = chip;
2583        }
2584
2585        sprintf(card->longname, "%s at 0x%lx, irq %i",
2586                card->shortname, chip->ctrl_io, chip->irq);
2587
2588        err = snd_card_register(card);
2589        if (err < 0)
2590                goto out_err;
2591
2592#ifdef MODULE
2593        dev_info(card->dev,
2594                 "Sound driver for Aztech AZF3328-based soundcards such as PCI168.\n");
2595        dev_info(card->dev,
2596                 "Hardware was completely undocumented, unfortunately.\n");
2597        dev_info(card->dev,
2598                 "Feel free to contact andi AT lisas.de for bug reports etc.!\n");
2599        dev_info(card->dev,
2600                 "User-scalable sequencer timer set to %dHz (1024000Hz / %d).\n",
2601                 1024000 / seqtimer_scaling, seqtimer_scaling);
2602#endif
2603
2604        snd_azf3328_gameport(chip, dev);
2605
2606        pci_set_drvdata(pci, card);
2607        dev++;
2608
2609        err = 0;
2610        goto out;
2611
2612out_err:
2613        dev_err(card->dev, "something failed, exiting\n");
2614        snd_card_free(card);
2615
2616out:
2617        return err;
2618}
2619
2620static void
2621snd_azf3328_remove(struct pci_dev *pci)
2622{
2623        snd_card_free(pci_get_drvdata(pci));
2624}
2625
2626#ifdef CONFIG_PM_SLEEP
2627static inline void
2628snd_azf3328_suspend_regs(const struct snd_azf3328 *chip,
2629                         unsigned long io_addr, unsigned count, u32 *saved_regs)
2630{
2631        unsigned reg;
2632
2633        for (reg = 0; reg < count; ++reg) {
2634                *saved_regs = inl(io_addr);
2635                dev_dbg(chip->card->dev, "suspend: io 0x%04lx: 0x%08x\n",
2636                        io_addr, *saved_regs);
2637                ++saved_regs;
2638                io_addr += sizeof(*saved_regs);
2639        }
2640}
2641
2642static inline void
2643snd_azf3328_resume_regs(const struct snd_azf3328 *chip,
2644                        const u32 *saved_regs,
2645                        unsigned long io_addr,
2646                        unsigned count
2647)
2648{
2649        unsigned reg;
2650
2651        for (reg = 0; reg < count; ++reg) {
2652                outl(*saved_regs, io_addr);
2653                dev_dbg(chip->card->dev,
2654                        "resume: io 0x%04lx: 0x%08x --> 0x%08x\n",
2655                        io_addr, *saved_regs, inl(io_addr));
2656                ++saved_regs;
2657                io_addr += sizeof(*saved_regs);
2658        }
2659}
2660
2661static inline void
2662snd_azf3328_suspend_ac97(struct snd_azf3328 *chip)
2663{
2664#ifdef AZF_USE_AC97_LAYER
2665        snd_ac97_suspend(chip->ac97);
2666#else
2667        snd_azf3328_suspend_regs(chip, chip->mixer_io,
2668                ARRAY_SIZE(chip->saved_regs_mixer), chip->saved_regs_mixer);
2669
2670        /* make sure to disable master volume etc. to prevent looping sound */
2671        snd_azf3328_mixer_mute_control_master(chip, 1);
2672        snd_azf3328_mixer_mute_control_pcm(chip, 1);
2673#endif /* AZF_USE_AC97_LAYER */
2674}
2675
2676static inline void
2677snd_azf3328_resume_ac97(const struct snd_azf3328 *chip)
2678{
2679#ifdef AZF_USE_AC97_LAYER
2680        snd_ac97_resume(chip->ac97);
2681#else
2682        snd_azf3328_resume_regs(chip, chip->saved_regs_mixer, chip->mixer_io,
2683                                        ARRAY_SIZE(chip->saved_regs_mixer));
2684
2685        /* unfortunately with 32bit transfers, IDX_MIXER_PLAY_MASTER (0x02)
2686           and IDX_MIXER_RESET (offset 0x00) get touched at the same time,
2687           resulting in a mixer reset condition persisting until _after_
2688           master vol was restored. Thus master vol needs an extra restore. */
2689        outw(((u16 *)chip->saved_regs_mixer)[1], chip->mixer_io + 2);
2690#endif /* AZF_USE_AC97_LAYER */
2691}
2692
2693static int
2694snd_azf3328_suspend(struct device *dev)
2695{
2696        struct snd_card *card = dev_get_drvdata(dev);
2697        struct snd_azf3328 *chip = card->private_data;
2698        u16 *saved_regs_ctrl_u16;
2699
2700        snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2701
2702        /* same pcm object for playback/capture */
2703        snd_pcm_suspend_all(chip->pcm[AZF_CODEC_PLAYBACK]);
2704        snd_pcm_suspend_all(chip->pcm[AZF_CODEC_I2S_OUT]);
2705
2706        snd_azf3328_suspend_ac97(chip);
2707
2708        snd_azf3328_suspend_regs(chip, chip->ctrl_io,
2709                ARRAY_SIZE(chip->saved_regs_ctrl), chip->saved_regs_ctrl);
2710
2711        /* manually store the one currently relevant write-only reg, too */
2712        saved_regs_ctrl_u16 = (u16 *)chip->saved_regs_ctrl;
2713        saved_regs_ctrl_u16[IDX_IO_6AH / 2] = chip->shadow_reg_ctrl_6AH;
2714
2715        snd_azf3328_suspend_regs(chip, chip->game_io,
2716                ARRAY_SIZE(chip->saved_regs_game), chip->saved_regs_game);
2717        snd_azf3328_suspend_regs(chip, chip->mpu_io,
2718                ARRAY_SIZE(chip->saved_regs_mpu), chip->saved_regs_mpu);
2719        snd_azf3328_suspend_regs(chip, chip->opl3_io,
2720                ARRAY_SIZE(chip->saved_regs_opl3), chip->saved_regs_opl3);
2721        return 0;
2722}
2723
2724static int
2725snd_azf3328_resume(struct device *dev)
2726{
2727        struct snd_card *card = dev_get_drvdata(dev);
2728        const struct snd_azf3328 *chip = card->private_data;
2729
2730        snd_azf3328_resume_regs(chip, chip->saved_regs_game, chip->game_io,
2731                                        ARRAY_SIZE(chip->saved_regs_game));
2732        snd_azf3328_resume_regs(chip, chip->saved_regs_mpu, chip->mpu_io,
2733                                        ARRAY_SIZE(chip->saved_regs_mpu));
2734        snd_azf3328_resume_regs(chip, chip->saved_regs_opl3, chip->opl3_io,
2735                                        ARRAY_SIZE(chip->saved_regs_opl3));
2736
2737        snd_azf3328_resume_ac97(chip);
2738
2739        snd_azf3328_resume_regs(chip, chip->saved_regs_ctrl, chip->ctrl_io,
2740                                        ARRAY_SIZE(chip->saved_regs_ctrl));
2741
2742        snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2743        return 0;
2744}
2745
2746static SIMPLE_DEV_PM_OPS(snd_azf3328_pm, snd_azf3328_suspend, snd_azf3328_resume);
2747#define SND_AZF3328_PM_OPS      &snd_azf3328_pm
2748#else
2749#define SND_AZF3328_PM_OPS      NULL
2750#endif /* CONFIG_PM_SLEEP */
2751
2752static struct pci_driver azf3328_driver = {
2753        .name = KBUILD_MODNAME,
2754        .id_table = snd_azf3328_ids,
2755        .probe = snd_azf3328_probe,
2756        .remove = snd_azf3328_remove,
2757        .driver = {
2758                .pm = SND_AZF3328_PM_OPS,
2759        },
2760};
2761
2762module_pci_driver(azf3328_driver);
2763