1/* 2 * SiRF inner codec controllers define 3 * 4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. 5 * 6 * Licensed under GPLv2 or later. 7 */ 8 9#ifndef _SIRF_AUDIO_CODEC_H 10#define _SIRF_AUDIO_CODEC_H 11 12 13#define AUDIO_IC_CODEC_PWR (0x00E0) 14#define AUDIO_IC_CODEC_CTRL0 (0x00E4) 15#define AUDIO_IC_CODEC_CTRL1 (0x00E8) 16#define AUDIO_IC_CODEC_CTRL2 (0x00EC) 17#define AUDIO_IC_CODEC_CTRL3 (0x00F0) 18 19#define MICBIASEN (1 << 3) 20 21#define IC_RDACEN (1 << 0) 22#define IC_LDACEN (1 << 1) 23#define IC_HSREN (1 << 2) 24#define IC_HSLEN (1 << 3) 25#define IC_SPEN (1 << 4) 26#define IC_CPEN (1 << 5) 27 28#define IC_HPRSELR (1 << 6) 29#define IC_HPLSELR (1 << 7) 30#define IC_HPRSELL (1 << 8) 31#define IC_HPLSELL (1 << 9) 32#define IC_SPSELR (1 << 10) 33#define IC_SPSELL (1 << 11) 34 35#define IC_MONOR (1 << 12) 36#define IC_MONOL (1 << 13) 37 38#define IC_RXOSRSEL (1 << 28) 39#define IC_CPFREQ (1 << 29) 40#define IC_HSINVEN (1 << 30) 41 42#define IC_MICINREN (1 << 0) 43#define IC_MICINLEN (1 << 1) 44#define IC_MICIN1SEL (1 << 2) 45#define IC_MICIN2SEL (1 << 3) 46#define IC_MICDIFSEL (1 << 4) 47#define IC_LINEIN1SEL (1 << 5) 48#define IC_LINEIN2SEL (1 << 6) 49#define IC_RADCEN (1 << 7) 50#define IC_LADCEN (1 << 8) 51#define IC_ALM (1 << 9) 52 53#define IC_DIGMICEN (1 << 22) 54#define IC_DIGMICFREQ (1 << 23) 55#define IC_ADC14B_12 (1 << 24) 56#define IC_FIRDAC_HSL_EN (1 << 25) 57#define IC_FIRDAC_HSR_EN (1 << 26) 58#define IC_FIRDAC_LOUT_EN (1 << 27) 59#define IC_POR (1 << 28) 60#define IC_CODEC_CLK_EN (1 << 29) 61#define IC_HP_3DB_BOOST (1 << 30) 62 63#define IC_ADC_LEFT_GAIN_SHIFT 16 64#define IC_ADC_RIGHT_GAIN_SHIFT 10 65#define IC_ADC_GAIN_MASK 0x3F 66#define IC_MIC_MAX_GAIN 0x39 67 68#define IC_RXPGAR_MASK 0x3F 69#define IC_RXPGAR_SHIFT 14 70#define IC_RXPGAL_MASK 0x3F 71#define IC_RXPGAL_SHIFT 21 72#define IC_RXPGAR 0x7B 73#define IC_RXPGAL 0x7B 74 75#define AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK 0x3F 76#define AUDIO_PORT_TX_FIFO_SC_OFFSET 0 77#define AUDIO_PORT_TX_FIFO_LC_OFFSET 10 78#define AUDIO_PORT_TX_FIFO_HC_OFFSET 20 79 80#define TX_FIFO_SC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ 81 << AUDIO_PORT_TX_FIFO_SC_OFFSET) 82#define TX_FIFO_LC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ 83 << AUDIO_PORT_TX_FIFO_LC_OFFSET) 84#define TX_FIFO_HC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ 85 << AUDIO_PORT_TX_FIFO_HC_OFFSET) 86 87#define AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK 0x0F 88#define AUDIO_PORT_RX_FIFO_SC_OFFSET 0 89#define AUDIO_PORT_RX_FIFO_LC_OFFSET 10 90#define AUDIO_PORT_RX_FIFO_HC_OFFSET 20 91 92#define RX_FIFO_SC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ 93 << AUDIO_PORT_RX_FIFO_SC_OFFSET) 94#define RX_FIFO_LC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ 95 << AUDIO_PORT_RX_FIFO_LC_OFFSET) 96#define RX_FIFO_HC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ 97 << AUDIO_PORT_RX_FIFO_HC_OFFSET) 98#define AUDIO_PORT_IC_CODEC_TX_CTRL (0x00F4) 99#define AUDIO_PORT_IC_CODEC_RX_CTRL (0x00F8) 100 101#define AUDIO_PORT_IC_TXFIFO_OP (0x00FC) 102#define AUDIO_PORT_IC_TXFIFO_LEV_CHK (0x0100) 103#define AUDIO_PORT_IC_TXFIFO_STS (0x0104) 104#define AUDIO_PORT_IC_TXFIFO_INT (0x0108) 105#define AUDIO_PORT_IC_TXFIFO_INT_MSK (0x010C) 106 107#define AUDIO_PORT_IC_RXFIFO_OP (0x0110) 108#define AUDIO_PORT_IC_RXFIFO_LEV_CHK (0x0114) 109#define AUDIO_PORT_IC_RXFIFO_STS (0x0118) 110#define AUDIO_PORT_IC_RXFIFO_INT (0x011C) 111#define AUDIO_PORT_IC_RXFIFO_INT_MSK (0x0120) 112 113#define AUDIO_FIFO_START (1 << 0) 114#define AUDIO_FIFO_RESET (1 << 1) 115 116#define AUDIO_FIFO_FULL (1 << 0) 117#define AUDIO_FIFO_EMPTY (1 << 1) 118#define AUDIO_FIFO_OFLOW (1 << 2) 119#define AUDIO_FIFO_UFLOW (1 << 3) 120 121#define IC_TX_ENABLE (0x03) 122#define IC_RX_ENABLE_MONO (0x01) 123#define IC_RX_ENABLE_STEREO (0x03) 124 125#endif /*__SIRF_AUDIO_CODEC_H*/ 126