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22#include <linux/pci.h>
23#include <linux/pm_runtime.h>
24#include <linux/delay.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include "skl.h"
28#include "skl-topology.h"
29#include "skl-sst-dsp.h"
30#include "skl-sst-ipc.h"
31
32#define HDA_MONO 1
33#define HDA_STEREO 2
34#define HDA_QUAD 4
35
36static struct snd_pcm_hardware azx_pcm_hw = {
37 .info = (SNDRV_PCM_INFO_MMAP |
38 SNDRV_PCM_INFO_INTERLEAVED |
39 SNDRV_PCM_INFO_BLOCK_TRANSFER |
40 SNDRV_PCM_INFO_MMAP_VALID |
41 SNDRV_PCM_INFO_PAUSE |
42 SNDRV_PCM_INFO_RESUME |
43 SNDRV_PCM_INFO_SYNC_START |
44 SNDRV_PCM_INFO_HAS_WALL_CLOCK |
45 SNDRV_PCM_INFO_HAS_LINK_ATIME |
46 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
47 .formats = SNDRV_PCM_FMTBIT_S16_LE |
48 SNDRV_PCM_FMTBIT_S32_LE |
49 SNDRV_PCM_FMTBIT_S24_LE,
50 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
51 SNDRV_PCM_RATE_8000,
52 .rate_min = 8000,
53 .rate_max = 48000,
54 .channels_min = 1,
55 .channels_max = 8,
56 .buffer_bytes_max = AZX_MAX_BUF_SIZE,
57 .period_bytes_min = 128,
58 .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
59 .periods_min = 2,
60 .periods_max = AZX_MAX_FRAG,
61 .fifo_size = 0,
62};
63
64static inline
65struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
66{
67 return substream->runtime->private_data;
68}
69
70static struct hdac_ext_bus *get_bus_ctx(struct snd_pcm_substream *substream)
71{
72 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
73 struct hdac_stream *hstream = hdac_stream(stream);
74 struct hdac_bus *bus = hstream->bus;
75
76 return hbus_to_ebus(bus);
77}
78
79static int skl_substream_alloc_pages(struct hdac_ext_bus *ebus,
80 struct snd_pcm_substream *substream,
81 size_t size)
82{
83 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
84
85 hdac_stream(stream)->bufsize = 0;
86 hdac_stream(stream)->period_bytes = 0;
87 hdac_stream(stream)->format_val = 0;
88
89 return snd_pcm_lib_malloc_pages(substream, size);
90}
91
92static int skl_substream_free_pages(struct hdac_bus *bus,
93 struct snd_pcm_substream *substream)
94{
95 return snd_pcm_lib_free_pages(substream);
96}
97
98static void skl_set_pcm_constrains(struct hdac_ext_bus *ebus,
99 struct snd_pcm_runtime *runtime)
100{
101 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
102
103
104 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
105 20, 178000000);
106}
107
108static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_ext_bus *ebus)
109{
110 if ((ebus_to_hbus(ebus))->ppcap)
111 return HDAC_EXT_STREAM_TYPE_HOST;
112 else
113 return HDAC_EXT_STREAM_TYPE_COUPLED;
114}
115
116
117
118
119
120
121
122
123static void skl_set_suspend_active(struct snd_pcm_substream *substream,
124 struct snd_soc_dai *dai, bool enable)
125{
126 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
127 struct snd_soc_dapm_widget *w;
128 struct skl *skl = ebus_to_skl(ebus);
129
130 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
131 w = dai->playback_widget;
132 else
133 w = dai->capture_widget;
134
135 if (w->ignore_suspend && enable)
136 skl->supend_active++;
137 else if (w->ignore_suspend && !enable)
138 skl->supend_active--;
139}
140
141int skl_pcm_host_dma_prepare(struct device *dev, struct skl_pipe_params *params)
142{
143 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
144 struct hdac_bus *bus = ebus_to_hbus(ebus);
145 unsigned int format_val;
146 struct hdac_stream *hstream;
147 struct hdac_ext_stream *stream;
148 int err;
149
150 hstream = snd_hdac_get_stream(bus, params->stream,
151 params->host_dma_id + 1);
152 if (!hstream)
153 return -EINVAL;
154
155 stream = stream_to_hdac_ext_stream(hstream);
156 snd_hdac_ext_stream_decouple(ebus, stream, true);
157
158 format_val = snd_hdac_calc_stream_format(params->s_freq,
159 params->ch, params->format, params->host_bps, 0);
160
161 dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
162 format_val, params->s_freq, params->ch, params->format);
163
164 snd_hdac_stream_reset(hdac_stream(stream));
165 err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
166 if (err < 0)
167 return err;
168
169 err = snd_hdac_stream_setup(hdac_stream(stream));
170 if (err < 0)
171 return err;
172
173 hdac_stream(stream)->prepared = 1;
174
175 return 0;
176}
177
178int skl_pcm_link_dma_prepare(struct device *dev, struct skl_pipe_params *params)
179{
180 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
181 struct hdac_bus *bus = ebus_to_hbus(ebus);
182 unsigned int format_val;
183 struct hdac_stream *hstream;
184 struct hdac_ext_stream *stream;
185 struct hdac_ext_link *link;
186
187 hstream = snd_hdac_get_stream(bus, params->stream,
188 params->link_dma_id + 1);
189 if (!hstream)
190 return -EINVAL;
191
192 stream = stream_to_hdac_ext_stream(hstream);
193 snd_hdac_ext_stream_decouple(ebus, stream, true);
194 format_val = snd_hdac_calc_stream_format(params->s_freq, params->ch,
195 params->format, params->link_bps, 0);
196
197 dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
198 format_val, params->s_freq, params->ch, params->format);
199
200 snd_hdac_ext_link_stream_reset(stream);
201
202 snd_hdac_ext_link_stream_setup(stream, format_val);
203
204 list_for_each_entry(link, &ebus->hlink_list, list) {
205 if (link->index == params->link_index)
206 snd_hdac_ext_link_set_stream_id(link,
207 hstream->stream_tag);
208 }
209
210 stream->link_prepared = 1;
211
212 return 0;
213}
214
215static int skl_pcm_open(struct snd_pcm_substream *substream,
216 struct snd_soc_dai *dai)
217{
218 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
219 struct hdac_ext_stream *stream;
220 struct snd_pcm_runtime *runtime = substream->runtime;
221 struct skl_dma_params *dma_params;
222 struct skl *skl = get_skl_ctx(dai->dev);
223 struct skl_module_cfg *mconfig;
224
225 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
226
227 stream = snd_hdac_ext_stream_assign(ebus, substream,
228 skl_get_host_stream_type(ebus));
229 if (stream == NULL)
230 return -EBUSY;
231
232 skl_set_pcm_constrains(ebus, runtime);
233
234
235
236
237
238 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
239 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK;
240 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
241 }
242
243 runtime->private_data = stream;
244
245 dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
246 if (!dma_params)
247 return -ENOMEM;
248
249 dma_params->stream_tag = hdac_stream(stream)->stream_tag;
250 snd_soc_dai_set_dma_data(dai, substream, dma_params);
251
252 dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
253 dma_params->stream_tag);
254 skl_set_suspend_active(substream, dai, true);
255 snd_pcm_set_sync(substream);
256
257 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
258 if (!mconfig)
259 return -EINVAL;
260
261 skl_tplg_d0i3_get(skl, mconfig->d0i3_caps);
262
263 return 0;
264}
265
266static int skl_pcm_prepare(struct snd_pcm_substream *substream,
267 struct snd_soc_dai *dai)
268{
269 struct skl *skl = get_skl_ctx(dai->dev);
270 struct skl_module_cfg *mconfig;
271
272 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
273
274 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
275
276
277 if (mconfig && (substream->runtime->status->state ==
278 SNDRV_PCM_STATE_XRUN))
279 skl_reset_pipe(skl->skl_sst, mconfig->pipe);
280
281 return 0;
282}
283
284static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
285 struct snd_pcm_hw_params *params,
286 struct snd_soc_dai *dai)
287{
288 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
289 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
290 struct snd_pcm_runtime *runtime = substream->runtime;
291 struct skl_pipe_params p_params = {0};
292 struct skl_module_cfg *m_cfg;
293 int ret, dma_id;
294
295 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
296 ret = skl_substream_alloc_pages(ebus, substream,
297 params_buffer_bytes(params));
298 if (ret < 0)
299 return ret;
300
301 dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
302 runtime->rate, runtime->channels, runtime->format);
303
304 dma_id = hdac_stream(stream)->stream_tag - 1;
305 dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
306
307 p_params.s_fmt = snd_pcm_format_width(params_format(params));
308 p_params.ch = params_channels(params);
309 p_params.s_freq = params_rate(params);
310 p_params.host_dma_id = dma_id;
311 p_params.stream = substream->stream;
312 p_params.format = params_format(params);
313 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
314 p_params.host_bps = dai->driver->playback.sig_bits;
315 else
316 p_params.host_bps = dai->driver->capture.sig_bits;
317
318
319 m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
320 if (m_cfg)
321 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
322
323 return 0;
324}
325
326static void skl_pcm_close(struct snd_pcm_substream *substream,
327 struct snd_soc_dai *dai)
328{
329 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
330 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
331 struct skl_dma_params *dma_params = NULL;
332 struct skl *skl = ebus_to_skl(ebus);
333 struct skl_module_cfg *mconfig;
334
335 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
336
337 snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(ebus));
338
339 dma_params = snd_soc_dai_get_dma_data(dai, substream);
340
341
342
343
344 snd_soc_dai_set_dma_data(dai, substream, NULL);
345 skl_set_suspend_active(substream, dai, false);
346
347
348
349
350
351 if (!strncmp(dai->name, "Reference Pin", 13) &&
352 skl->skl_sst->miscbdcg_disabled) {
353 skl->skl_sst->enable_miscbdcge(dai->dev, true);
354 skl->skl_sst->miscbdcg_disabled = false;
355 }
356
357 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
358 skl_tplg_d0i3_put(skl, mconfig->d0i3_caps);
359
360 kfree(dma_params);
361}
362
363static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
364 struct snd_soc_dai *dai)
365{
366 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
367 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
368
369 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
370
371 snd_hdac_stream_cleanup(hdac_stream(stream));
372 hdac_stream(stream)->prepared = 0;
373
374 return skl_substream_free_pages(ebus_to_hbus(ebus), substream);
375}
376
377static int skl_be_hw_params(struct snd_pcm_substream *substream,
378 struct snd_pcm_hw_params *params,
379 struct snd_soc_dai *dai)
380{
381 struct skl_pipe_params p_params = {0};
382
383 p_params.s_fmt = snd_pcm_format_width(params_format(params));
384 p_params.ch = params_channels(params);
385 p_params.s_freq = params_rate(params);
386 p_params.stream = substream->stream;
387
388 return skl_tplg_be_update_params(dai, &p_params);
389}
390
391static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
392 int cmd)
393{
394 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
395 struct hdac_bus *bus = ebus_to_hbus(ebus);
396 struct hdac_ext_stream *stream;
397 int start;
398 unsigned long cookie;
399 struct hdac_stream *hstr;
400
401 stream = get_hdac_ext_stream(substream);
402 hstr = hdac_stream(stream);
403
404 if (!hstr->prepared)
405 return -EPIPE;
406
407 switch (cmd) {
408 case SNDRV_PCM_TRIGGER_START:
409 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
410 case SNDRV_PCM_TRIGGER_RESUME:
411 start = 1;
412 break;
413
414 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
415 case SNDRV_PCM_TRIGGER_SUSPEND:
416 case SNDRV_PCM_TRIGGER_STOP:
417 start = 0;
418 break;
419
420 default:
421 return -EINVAL;
422 }
423
424 spin_lock_irqsave(&bus->reg_lock, cookie);
425
426 if (start) {
427 snd_hdac_stream_start(hdac_stream(stream), true);
428 snd_hdac_stream_timecounter_init(hstr, 0);
429 } else {
430 snd_hdac_stream_stop(hdac_stream(stream));
431 }
432
433 spin_unlock_irqrestore(&bus->reg_lock, cookie);
434
435 return 0;
436}
437
438static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
439 struct snd_soc_dai *dai)
440{
441 struct skl *skl = get_skl_ctx(dai->dev);
442 struct skl_sst *ctx = skl->skl_sst;
443 struct skl_module_cfg *mconfig;
444 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
445 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
446 struct snd_soc_dapm_widget *w;
447 int ret;
448
449 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
450 if (!mconfig)
451 return -EIO;
452
453 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
454 w = dai->playback_widget;
455 else
456 w = dai->capture_widget;
457
458 switch (cmd) {
459 case SNDRV_PCM_TRIGGER_RESUME:
460 if (!w->ignore_suspend) {
461
462
463
464
465
466 snd_hdac_ext_stream_drsm_enable(ebus, true,
467 hdac_stream(stream)->index);
468 snd_hdac_ext_stream_set_dpibr(ebus, stream,
469 stream->lpib);
470 snd_hdac_ext_stream_set_lpib(stream, stream->lpib);
471 }
472
473 case SNDRV_PCM_TRIGGER_START:
474 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
475
476
477
478
479
480
481 ret = skl_decoupled_trigger(substream, cmd);
482 if (ret < 0)
483 return ret;
484 return skl_run_pipe(ctx, mconfig->pipe);
485 break;
486
487 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
488 case SNDRV_PCM_TRIGGER_SUSPEND:
489 case SNDRV_PCM_TRIGGER_STOP:
490
491
492
493
494
495 ret = skl_stop_pipe(ctx, mconfig->pipe);
496 if (ret < 0)
497 return ret;
498
499 ret = skl_decoupled_trigger(substream, cmd);
500 if ((cmd == SNDRV_PCM_TRIGGER_SUSPEND) && !w->ignore_suspend) {
501
502 stream->dpib = readl(ebus->bus.remap_addr +
503 AZX_REG_VS_SDXDPIB_XBASE +
504 (AZX_REG_VS_SDXDPIB_XINTERVAL *
505 hdac_stream(stream)->index));
506
507 stream->lpib = snd_hdac_stream_get_pos_lpib(
508 hdac_stream(stream));
509 snd_hdac_ext_stream_decouple(ebus, stream, false);
510 }
511 break;
512
513 default:
514 return -EINVAL;
515 }
516
517 return 0;
518}
519
520static int skl_link_hw_params(struct snd_pcm_substream *substream,
521 struct snd_pcm_hw_params *params,
522 struct snd_soc_dai *dai)
523{
524 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
525 struct hdac_ext_stream *link_dev;
526 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
527 struct snd_soc_dai *codec_dai = rtd->codec_dai;
528 struct skl_pipe_params p_params = {0};
529 struct hdac_ext_link *link;
530 int stream_tag;
531
532 link_dev = snd_hdac_ext_stream_assign(ebus, substream,
533 HDAC_EXT_STREAM_TYPE_LINK);
534 if (!link_dev)
535 return -EBUSY;
536
537 snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
538
539 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
540 if (!link)
541 return -EINVAL;
542
543 stream_tag = hdac_stream(link_dev)->stream_tag;
544
545
546 snd_soc_dai_set_tdm_slot(codec_dai, stream_tag, 0, 0, 0);
547
548 p_params.s_fmt = snd_pcm_format_width(params_format(params));
549 p_params.ch = params_channels(params);
550 p_params.s_freq = params_rate(params);
551 p_params.stream = substream->stream;
552 p_params.link_dma_id = stream_tag - 1;
553 p_params.link_index = link->index;
554 p_params.format = params_format(params);
555
556 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
557 p_params.link_bps = codec_dai->driver->playback.sig_bits;
558 else
559 p_params.link_bps = codec_dai->driver->capture.sig_bits;
560
561 return skl_tplg_be_update_params(dai, &p_params);
562}
563
564static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
565 struct snd_soc_dai *dai)
566{
567 struct skl *skl = get_skl_ctx(dai->dev);
568 struct skl_module_cfg *mconfig = NULL;
569
570
571 mconfig = skl_tplg_be_get_cpr_module(dai, substream->stream);
572 if (mconfig && !mconfig->pipe->passthru &&
573 (substream->runtime->status->state == SNDRV_PCM_STATE_XRUN))
574 skl_reset_pipe(skl->skl_sst, mconfig->pipe);
575
576 return 0;
577}
578
579static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
580 int cmd, struct snd_soc_dai *dai)
581{
582 struct hdac_ext_stream *link_dev =
583 snd_soc_dai_get_dma_data(dai, substream);
584 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
585 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
586
587 dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
588 switch (cmd) {
589 case SNDRV_PCM_TRIGGER_RESUME:
590 case SNDRV_PCM_TRIGGER_START:
591 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
592 snd_hdac_ext_link_stream_start(link_dev);
593 break;
594
595 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
596 case SNDRV_PCM_TRIGGER_SUSPEND:
597 case SNDRV_PCM_TRIGGER_STOP:
598 snd_hdac_ext_link_stream_clear(link_dev);
599 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND)
600 snd_hdac_ext_stream_decouple(ebus, stream, false);
601 break;
602
603 default:
604 return -EINVAL;
605 }
606 return 0;
607}
608
609static int skl_link_hw_free(struct snd_pcm_substream *substream,
610 struct snd_soc_dai *dai)
611{
612 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
613 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
614 struct hdac_ext_stream *link_dev =
615 snd_soc_dai_get_dma_data(dai, substream);
616 struct hdac_ext_link *link;
617
618 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
619
620 link_dev->link_prepared = 0;
621
622 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
623 if (!link)
624 return -EINVAL;
625
626 snd_hdac_ext_link_clear_stream_id(link, hdac_stream(link_dev)->stream_tag);
627 snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
628 return 0;
629}
630
631static struct snd_soc_dai_ops skl_pcm_dai_ops = {
632 .startup = skl_pcm_open,
633 .shutdown = skl_pcm_close,
634 .prepare = skl_pcm_prepare,
635 .hw_params = skl_pcm_hw_params,
636 .hw_free = skl_pcm_hw_free,
637 .trigger = skl_pcm_trigger,
638};
639
640static struct snd_soc_dai_ops skl_dmic_dai_ops = {
641 .hw_params = skl_be_hw_params,
642};
643
644static struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
645 .hw_params = skl_be_hw_params,
646};
647
648static struct snd_soc_dai_ops skl_link_dai_ops = {
649 .prepare = skl_link_pcm_prepare,
650 .hw_params = skl_link_hw_params,
651 .hw_free = skl_link_hw_free,
652 .trigger = skl_link_pcm_trigger,
653};
654
655static struct snd_soc_dai_driver skl_platform_dai[] = {
656{
657 .name = "System Pin",
658 .ops = &skl_pcm_dai_ops,
659 .playback = {
660 .stream_name = "System Playback",
661 .channels_min = HDA_MONO,
662 .channels_max = HDA_STEREO,
663 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
664 .formats = SNDRV_PCM_FMTBIT_S16_LE |
665 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
666 .sig_bits = 32,
667 },
668 .capture = {
669 .stream_name = "System Capture",
670 .channels_min = HDA_MONO,
671 .channels_max = HDA_STEREO,
672 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
673 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
674 .sig_bits = 32,
675 },
676},
677{
678 .name = "Reference Pin",
679 .ops = &skl_pcm_dai_ops,
680 .capture = {
681 .stream_name = "Reference Capture",
682 .channels_min = HDA_MONO,
683 .channels_max = HDA_QUAD,
684 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
685 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
686 .sig_bits = 32,
687 },
688},
689{
690 .name = "Deepbuffer Pin",
691 .ops = &skl_pcm_dai_ops,
692 .playback = {
693 .stream_name = "Deepbuffer Playback",
694 .channels_min = HDA_STEREO,
695 .channels_max = HDA_STEREO,
696 .rates = SNDRV_PCM_RATE_48000,
697 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
698 .sig_bits = 32,
699 },
700},
701{
702 .name = "LowLatency Pin",
703 .ops = &skl_pcm_dai_ops,
704 .playback = {
705 .stream_name = "Low Latency Playback",
706 .channels_min = HDA_STEREO,
707 .channels_max = HDA_STEREO,
708 .rates = SNDRV_PCM_RATE_48000,
709 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
710 .sig_bits = 32,
711 },
712},
713{
714 .name = "DMIC Pin",
715 .ops = &skl_pcm_dai_ops,
716 .capture = {
717 .stream_name = "DMIC Capture",
718 .channels_min = HDA_MONO,
719 .channels_max = HDA_QUAD,
720 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
721 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
722 .sig_bits = 32,
723 },
724},
725{
726 .name = "HDMI1 Pin",
727 .ops = &skl_pcm_dai_ops,
728 .playback = {
729 .stream_name = "HDMI1 Playback",
730 .channels_min = HDA_STEREO,
731 .channels_max = 8,
732 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
733 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
734 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
735 SNDRV_PCM_RATE_192000,
736 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
737 SNDRV_PCM_FMTBIT_S32_LE,
738 .sig_bits = 32,
739 },
740},
741{
742 .name = "HDMI2 Pin",
743 .ops = &skl_pcm_dai_ops,
744 .playback = {
745 .stream_name = "HDMI2 Playback",
746 .channels_min = HDA_STEREO,
747 .channels_max = 8,
748 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
749 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
750 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
751 SNDRV_PCM_RATE_192000,
752 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
753 SNDRV_PCM_FMTBIT_S32_LE,
754 .sig_bits = 32,
755 },
756},
757{
758 .name = "HDMI3 Pin",
759 .ops = &skl_pcm_dai_ops,
760 .playback = {
761 .stream_name = "HDMI3 Playback",
762 .channels_min = HDA_STEREO,
763 .channels_max = 8,
764 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
765 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
766 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
767 SNDRV_PCM_RATE_192000,
768 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
769 SNDRV_PCM_FMTBIT_S32_LE,
770 .sig_bits = 32,
771 },
772},
773
774
775{
776 .name = "SSP0 Pin",
777 .ops = &skl_be_ssp_dai_ops,
778 .playback = {
779 .stream_name = "ssp0 Tx",
780 .channels_min = HDA_STEREO,
781 .channels_max = HDA_STEREO,
782 .rates = SNDRV_PCM_RATE_48000,
783 .formats = SNDRV_PCM_FMTBIT_S16_LE,
784 },
785 .capture = {
786 .stream_name = "ssp0 Rx",
787 .channels_min = HDA_STEREO,
788 .channels_max = HDA_STEREO,
789 .rates = SNDRV_PCM_RATE_48000,
790 .formats = SNDRV_PCM_FMTBIT_S16_LE,
791 },
792},
793{
794 .name = "SSP1 Pin",
795 .ops = &skl_be_ssp_dai_ops,
796 .playback = {
797 .stream_name = "ssp1 Tx",
798 .channels_min = HDA_STEREO,
799 .channels_max = HDA_STEREO,
800 .rates = SNDRV_PCM_RATE_48000,
801 .formats = SNDRV_PCM_FMTBIT_S16_LE,
802 },
803 .capture = {
804 .stream_name = "ssp1 Rx",
805 .channels_min = HDA_STEREO,
806 .channels_max = HDA_STEREO,
807 .rates = SNDRV_PCM_RATE_48000,
808 .formats = SNDRV_PCM_FMTBIT_S16_LE,
809 },
810},
811{
812 .name = "SSP2 Pin",
813 .ops = &skl_be_ssp_dai_ops,
814 .playback = {
815 .stream_name = "ssp2 Tx",
816 .channels_min = HDA_STEREO,
817 .channels_max = HDA_STEREO,
818 .rates = SNDRV_PCM_RATE_48000,
819 .formats = SNDRV_PCM_FMTBIT_S16_LE,
820 },
821 .capture = {
822 .stream_name = "ssp2 Rx",
823 .channels_min = HDA_STEREO,
824 .channels_max = HDA_STEREO,
825 .rates = SNDRV_PCM_RATE_48000,
826 .formats = SNDRV_PCM_FMTBIT_S16_LE,
827 },
828},
829{
830 .name = "SSP3 Pin",
831 .ops = &skl_be_ssp_dai_ops,
832 .playback = {
833 .stream_name = "ssp3 Tx",
834 .channels_min = HDA_STEREO,
835 .channels_max = HDA_STEREO,
836 .rates = SNDRV_PCM_RATE_48000,
837 .formats = SNDRV_PCM_FMTBIT_S16_LE,
838 },
839 .capture = {
840 .stream_name = "ssp3 Rx",
841 .channels_min = HDA_STEREO,
842 .channels_max = HDA_STEREO,
843 .rates = SNDRV_PCM_RATE_48000,
844 .formats = SNDRV_PCM_FMTBIT_S16_LE,
845 },
846},
847{
848 .name = "SSP4 Pin",
849 .ops = &skl_be_ssp_dai_ops,
850 .playback = {
851 .stream_name = "ssp4 Tx",
852 .channels_min = HDA_STEREO,
853 .channels_max = HDA_STEREO,
854 .rates = SNDRV_PCM_RATE_48000,
855 .formats = SNDRV_PCM_FMTBIT_S16_LE,
856 },
857 .capture = {
858 .stream_name = "ssp4 Rx",
859 .channels_min = HDA_STEREO,
860 .channels_max = HDA_STEREO,
861 .rates = SNDRV_PCM_RATE_48000,
862 .formats = SNDRV_PCM_FMTBIT_S16_LE,
863 },
864},
865{
866 .name = "SSP5 Pin",
867 .ops = &skl_be_ssp_dai_ops,
868 .playback = {
869 .stream_name = "ssp5 Tx",
870 .channels_min = HDA_STEREO,
871 .channels_max = HDA_STEREO,
872 .rates = SNDRV_PCM_RATE_48000,
873 .formats = SNDRV_PCM_FMTBIT_S16_LE,
874 },
875 .capture = {
876 .stream_name = "ssp5 Rx",
877 .channels_min = HDA_STEREO,
878 .channels_max = HDA_STEREO,
879 .rates = SNDRV_PCM_RATE_48000,
880 .formats = SNDRV_PCM_FMTBIT_S16_LE,
881 },
882},
883{
884 .name = "iDisp1 Pin",
885 .ops = &skl_link_dai_ops,
886 .playback = {
887 .stream_name = "iDisp1 Tx",
888 .channels_min = HDA_STEREO,
889 .channels_max = 8,
890 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
891 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
892 SNDRV_PCM_FMTBIT_S24_LE,
893 },
894},
895{
896 .name = "iDisp2 Pin",
897 .ops = &skl_link_dai_ops,
898 .playback = {
899 .stream_name = "iDisp2 Tx",
900 .channels_min = HDA_STEREO,
901 .channels_max = 8,
902 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
903 SNDRV_PCM_RATE_48000,
904 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
905 SNDRV_PCM_FMTBIT_S24_LE,
906 },
907},
908{
909 .name = "iDisp3 Pin",
910 .ops = &skl_link_dai_ops,
911 .playback = {
912 .stream_name = "iDisp3 Tx",
913 .channels_min = HDA_STEREO,
914 .channels_max = 8,
915 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
916 SNDRV_PCM_RATE_48000,
917 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
918 SNDRV_PCM_FMTBIT_S24_LE,
919 },
920},
921{
922 .name = "DMIC01 Pin",
923 .ops = &skl_dmic_dai_ops,
924 .capture = {
925 .stream_name = "DMIC01 Rx",
926 .channels_min = HDA_MONO,
927 .channels_max = HDA_QUAD,
928 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
929 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
930 },
931},
932{
933 .name = "HD-Codec Pin",
934 .ops = &skl_link_dai_ops,
935 .playback = {
936 .stream_name = "HD-Codec Tx",
937 .channels_min = HDA_STEREO,
938 .channels_max = HDA_STEREO,
939 .rates = SNDRV_PCM_RATE_48000,
940 .formats = SNDRV_PCM_FMTBIT_S16_LE,
941 },
942 .capture = {
943 .stream_name = "HD-Codec Rx",
944 .channels_min = HDA_STEREO,
945 .channels_max = HDA_STEREO,
946 .rates = SNDRV_PCM_RATE_48000,
947 .formats = SNDRV_PCM_FMTBIT_S16_LE,
948 },
949},
950};
951
952static int skl_platform_open(struct snd_pcm_substream *substream)
953{
954 struct snd_soc_pcm_runtime *rtd = substream->private_data;
955 struct snd_soc_dai_link *dai_link = rtd->dai_link;
956
957 dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
958 dai_link->cpu_dai_name);
959
960 snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
961
962 return 0;
963}
964
965static int skl_coupled_trigger(struct snd_pcm_substream *substream,
966 int cmd)
967{
968 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
969 struct hdac_bus *bus = ebus_to_hbus(ebus);
970 struct hdac_ext_stream *stream;
971 struct snd_pcm_substream *s;
972 bool start;
973 int sbits = 0;
974 unsigned long cookie;
975 struct hdac_stream *hstr;
976
977 stream = get_hdac_ext_stream(substream);
978 hstr = hdac_stream(stream);
979
980 dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
981
982 if (!hstr->prepared)
983 return -EPIPE;
984
985 switch (cmd) {
986 case SNDRV_PCM_TRIGGER_START:
987 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
988 case SNDRV_PCM_TRIGGER_RESUME:
989 start = true;
990 break;
991
992 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
993 case SNDRV_PCM_TRIGGER_SUSPEND:
994 case SNDRV_PCM_TRIGGER_STOP:
995 start = false;
996 break;
997
998 default:
999 return -EINVAL;
1000 }
1001
1002 snd_pcm_group_for_each_entry(s, substream) {
1003 if (s->pcm->card != substream->pcm->card)
1004 continue;
1005 stream = get_hdac_ext_stream(s);
1006 sbits |= 1 << hdac_stream(stream)->index;
1007 snd_pcm_trigger_done(s, substream);
1008 }
1009
1010 spin_lock_irqsave(&bus->reg_lock, cookie);
1011
1012
1013 snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
1014
1015 snd_pcm_group_for_each_entry(s, substream) {
1016 if (s->pcm->card != substream->pcm->card)
1017 continue;
1018 stream = get_hdac_ext_stream(s);
1019 if (start)
1020 snd_hdac_stream_start(hdac_stream(stream), true);
1021 else
1022 snd_hdac_stream_stop(hdac_stream(stream));
1023 }
1024 spin_unlock_irqrestore(&bus->reg_lock, cookie);
1025
1026 snd_hdac_stream_sync(hstr, start, sbits);
1027
1028 spin_lock_irqsave(&bus->reg_lock, cookie);
1029
1030
1031 snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
1032 if (start)
1033 snd_hdac_stream_timecounter_init(hstr, sbits);
1034 spin_unlock_irqrestore(&bus->reg_lock, cookie);
1035
1036 return 0;
1037}
1038
1039static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
1040 int cmd)
1041{
1042 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
1043
1044 if (!(ebus_to_hbus(ebus))->ppcap)
1045 return skl_coupled_trigger(substream, cmd);
1046
1047 return 0;
1048}
1049
1050static snd_pcm_uframes_t skl_platform_pcm_pointer
1051 (struct snd_pcm_substream *substream)
1052{
1053 struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
1054 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
1055 unsigned int pos;
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1079 pos = readl(ebus->bus.remap_addr + AZX_REG_VS_SDXDPIB_XBASE +
1080 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1081 hdac_stream(hstream)->index));
1082 } else {
1083 udelay(20);
1084 readl(ebus->bus.remap_addr +
1085 AZX_REG_VS_SDXDPIB_XBASE +
1086 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1087 hdac_stream(hstream)->index));
1088 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
1089 }
1090
1091 if (pos >= hdac_stream(hstream)->bufsize)
1092 pos = 0;
1093
1094 return bytes_to_frames(substream->runtime, pos);
1095}
1096
1097static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
1098 u64 nsec)
1099{
1100 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
1101 struct snd_soc_dai *codec_dai = rtd->codec_dai;
1102 u64 codec_frames, codec_nsecs;
1103
1104 if (!codec_dai->driver->ops->delay)
1105 return nsec;
1106
1107 codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
1108 codec_nsecs = div_u64(codec_frames * 1000000000LL,
1109 substream->runtime->rate);
1110
1111 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1112 return nsec + codec_nsecs;
1113
1114 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
1115}
1116
1117static int skl_get_time_info(struct snd_pcm_substream *substream,
1118 struct timespec *system_ts, struct timespec *audio_ts,
1119 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
1120 struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
1121{
1122 struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
1123 struct hdac_stream *hstr = hdac_stream(sstream);
1124 u64 nsec;
1125
1126 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
1127 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
1128
1129 snd_pcm_gettime(substream->runtime, system_ts);
1130
1131 nsec = timecounter_read(&hstr->tc);
1132 nsec = div_u64(nsec, 3);
1133 if (audio_tstamp_config->report_delay)
1134 nsec = skl_adjust_codec_delay(substream, nsec);
1135
1136 *audio_ts = ns_to_timespec(nsec);
1137
1138 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
1139 audio_tstamp_report->accuracy_report = 1;
1140 audio_tstamp_report->accuracy = 42;
1141
1142 } else {
1143 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
1144 }
1145
1146 return 0;
1147}
1148
1149static const struct snd_pcm_ops skl_platform_ops = {
1150 .open = skl_platform_open,
1151 .ioctl = snd_pcm_lib_ioctl,
1152 .trigger = skl_platform_pcm_trigger,
1153 .pointer = skl_platform_pcm_pointer,
1154 .get_time_info = skl_get_time_info,
1155 .mmap = snd_pcm_lib_default_mmap,
1156 .page = snd_pcm_sgbuf_ops_page,
1157};
1158
1159static void skl_pcm_free(struct snd_pcm *pcm)
1160{
1161 snd_pcm_lib_preallocate_free_for_all(pcm);
1162}
1163
1164#define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
1165
1166static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
1167{
1168 struct snd_soc_dai *dai = rtd->cpu_dai;
1169 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
1170 struct snd_pcm *pcm = rtd->pcm;
1171 unsigned int size;
1172 int retval = 0;
1173 struct skl *skl = ebus_to_skl(ebus);
1174
1175 if (dai->driver->playback.channels_min ||
1176 dai->driver->capture.channels_min) {
1177
1178 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
1179 if (size > MAX_PREALLOC_SIZE)
1180 size = MAX_PREALLOC_SIZE;
1181 retval = snd_pcm_lib_preallocate_pages_for_all(pcm,
1182 SNDRV_DMA_TYPE_DEV_SG,
1183 snd_dma_pci_data(skl->pci),
1184 size, MAX_PREALLOC_SIZE);
1185 if (retval) {
1186 dev_err(dai->dev, "dma buffer allocation fail\n");
1187 return retval;
1188 }
1189 }
1190
1191 return retval;
1192}
1193
1194static int skl_get_module_info(struct skl *skl, struct skl_module_cfg *mconfig)
1195{
1196 struct skl_sst *ctx = skl->skl_sst;
1197 struct uuid_module *module;
1198 uuid_le *uuid_mod;
1199
1200 uuid_mod = (uuid_le *)mconfig->guid;
1201
1202 if (list_empty(&ctx->uuid_list)) {
1203 dev_err(ctx->dev, "Module list is empty\n");
1204 return -EIO;
1205 }
1206
1207 list_for_each_entry(module, &ctx->uuid_list, list) {
1208 if (uuid_le_cmp(*uuid_mod, module->uuid) == 0) {
1209 mconfig->id.module_id = module->id;
1210 mconfig->is_loadable = module->is_loadable;
1211 return 0;
1212 }
1213 }
1214
1215 return -EIO;
1216}
1217
1218static int skl_populate_modules(struct skl *skl)
1219{
1220 struct skl_pipeline *p;
1221 struct skl_pipe_module *m;
1222 struct snd_soc_dapm_widget *w;
1223 struct skl_module_cfg *mconfig;
1224 int ret = 0;
1225
1226 list_for_each_entry(p, &skl->ppl_list, node) {
1227 list_for_each_entry(m, &p->pipe->w_list, node) {
1228 w = m->w;
1229 mconfig = w->priv;
1230
1231 ret = skl_get_module_info(skl, mconfig);
1232 if (ret < 0) {
1233 dev_err(skl->skl_sst->dev,
1234 "query module info failed\n");
1235 return ret;
1236 }
1237 }
1238 }
1239
1240 return ret;
1241}
1242
1243static int skl_platform_soc_probe(struct snd_soc_platform *platform)
1244{
1245 struct hdac_ext_bus *ebus = dev_get_drvdata(platform->dev);
1246 struct skl *skl = ebus_to_skl(ebus);
1247 const struct skl_dsp_ops *ops;
1248 int ret;
1249
1250 pm_runtime_get_sync(platform->dev);
1251 if ((ebus_to_hbus(ebus))->ppcap) {
1252 skl->platform = platform;
1253
1254
1255 skl->debugfs = skl_debugfs_init(skl);
1256
1257 ret = skl_tplg_init(platform, ebus);
1258 if (ret < 0) {
1259 dev_err(platform->dev, "Failed to init topology!\n");
1260 return ret;
1261 }
1262
1263
1264 ops = skl_get_dsp_ops(skl->pci->device);
1265 if (!ops)
1266 return -EIO;
1267
1268 if (skl->skl_sst->is_first_boot == false) {
1269 dev_err(platform->dev, "DSP reports first boot done!!!\n");
1270 return -EIO;
1271 }
1272
1273 ret = ops->init_fw(platform->dev, skl->skl_sst);
1274 if (ret < 0) {
1275 dev_err(platform->dev, "Failed to boot first fw: %d\n", ret);
1276 return ret;
1277 }
1278 skl_populate_modules(skl);
1279 skl->skl_sst->update_d0i3c = skl_update_d0i3c;
1280 skl_dsp_enable_notification(skl->skl_sst, false);
1281 }
1282 pm_runtime_mark_last_busy(platform->dev);
1283 pm_runtime_put_autosuspend(platform->dev);
1284
1285 return 0;
1286}
1287static struct snd_soc_platform_driver skl_platform_drv = {
1288 .probe = skl_platform_soc_probe,
1289 .ops = &skl_platform_ops,
1290 .pcm_new = skl_pcm_new,
1291 .pcm_free = skl_pcm_free,
1292};
1293
1294static const struct snd_soc_component_driver skl_component = {
1295 .name = "pcm",
1296};
1297
1298int skl_platform_register(struct device *dev)
1299{
1300 int ret;
1301 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
1302 struct skl *skl = ebus_to_skl(ebus);
1303
1304 INIT_LIST_HEAD(&skl->ppl_list);
1305 INIT_LIST_HEAD(&skl->bind_list);
1306
1307 ret = snd_soc_register_platform(dev, &skl_platform_drv);
1308 if (ret) {
1309 dev_err(dev, "soc platform registration failed %d\n", ret);
1310 return ret;
1311 }
1312 ret = snd_soc_register_component(dev, &skl_component,
1313 skl_platform_dai,
1314 ARRAY_SIZE(skl_platform_dai));
1315 if (ret) {
1316 dev_err(dev, "soc component registration failed %d\n", ret);
1317 snd_soc_unregister_platform(dev);
1318 }
1319
1320 return ret;
1321
1322}
1323
1324int skl_platform_unregister(struct device *dev)
1325{
1326 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
1327 struct skl *skl = ebus_to_skl(ebus);
1328 struct skl_module_deferred_bind *modules, *tmp;
1329
1330 if (!list_empty(&skl->bind_list)) {
1331 list_for_each_entry_safe(modules, tmp, &skl->bind_list, node) {
1332 list_del(&modules->node);
1333 kfree(modules);
1334 }
1335 }
1336
1337 snd_soc_unregister_component(dev);
1338 snd_soc_unregister_platform(dev);
1339 return 0;
1340}
1341
