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20#define pr_fmt(fmt) "alternatives: " fmt
21
22#include <linux/init.h>
23#include <linux/cpu.h>
24#include <asm/cacheflush.h>
25#include <asm/alternative.h>
26#include <asm/cpufeature.h>
27#include <asm/insn.h>
28#include <asm/sections.h>
29#include <linux/stop_machine.h>
30
31#define __ALT_PTR(a,f) ((void *)&(a)->f + (a)->f)
32#define ALT_ORIG_PTR(a) __ALT_PTR(a, orig_offset)
33#define ALT_REPL_PTR(a) __ALT_PTR(a, alt_offset)
34
35struct alt_region {
36 struct alt_instr *begin;
37 struct alt_instr *end;
38};
39
40
41
42
43static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc)
44{
45 unsigned long replptr;
46
47 if (kernel_text_address(pc))
48 return 1;
49
50 replptr = (unsigned long)ALT_REPL_PTR(alt);
51 if (pc >= replptr && pc <= (replptr + alt->alt_len))
52 return 0;
53
54
55
56
57
58 BUG();
59}
60
61#define align_down(x, a) ((unsigned long)(x) & ~(((unsigned long)(a)) - 1))
62
63static u32 get_alt_insn(struct alt_instr *alt, __le32 *insnptr, __le32 *altinsnptr)
64{
65 u32 insn;
66
67 insn = le32_to_cpu(*altinsnptr);
68
69 if (aarch64_insn_is_branch_imm(insn)) {
70 s32 offset = aarch64_get_branch_offset(insn);
71 unsigned long target;
72
73 target = (unsigned long)altinsnptr + offset;
74
75
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78
79
80 if (branch_insn_requires_update(alt, target)) {
81 offset = target - (unsigned long)insnptr;
82 insn = aarch64_set_branch_offset(insn, offset);
83 }
84 } else if (aarch64_insn_is_adrp(insn)) {
85 s32 orig_offset, new_offset;
86 unsigned long target;
87
88
89
90
91
92
93 orig_offset = aarch64_insn_adrp_get_offset(insn);
94 target = align_down(altinsnptr, SZ_4K) + orig_offset;
95 new_offset = target - align_down(insnptr, SZ_4K);
96 insn = aarch64_insn_adrp_set_offset(insn, new_offset);
97 } else if (aarch64_insn_uses_literal(insn)) {
98
99
100
101
102 BUG();
103 }
104
105 return insn;
106}
107
108static void __apply_alternatives(void *alt_region, bool use_linear_alias)
109{
110 struct alt_instr *alt;
111 struct alt_region *region = alt_region;
112 __le32 *origptr, *replptr, *updptr;
113
114 for (alt = region->begin; alt < region->end; alt++) {
115 u32 insn;
116 int i, nr_inst;
117
118 if (!cpus_have_cap(alt->cpufeature))
119 continue;
120
121 BUG_ON(alt->alt_len != alt->orig_len);
122
123 pr_info_once("patching kernel code\n");
124
125 origptr = ALT_ORIG_PTR(alt);
126 replptr = ALT_REPL_PTR(alt);
127 updptr = use_linear_alias ? lm_alias(origptr) : origptr;
128 nr_inst = alt->alt_len / sizeof(insn);
129
130 for (i = 0; i < nr_inst; i++) {
131 insn = get_alt_insn(alt, origptr + i, replptr + i);
132 updptr[i] = cpu_to_le32(insn);
133 }
134
135 flush_icache_range((uintptr_t)origptr,
136 (uintptr_t)(origptr + nr_inst));
137 }
138}
139
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142
143
144static int __apply_alternatives_multi_stop(void *unused)
145{
146 static int patched = 0;
147 struct alt_region region = {
148 .begin = (struct alt_instr *)__alt_instructions,
149 .end = (struct alt_instr *)__alt_instructions_end,
150 };
151
152
153 if (smp_processor_id()) {
154 while (!READ_ONCE(patched))
155 cpu_relax();
156 isb();
157 } else {
158 BUG_ON(patched);
159 __apply_alternatives(®ion, true);
160
161 WRITE_ONCE(patched, 1);
162 }
163
164 return 0;
165}
166
167void __init apply_alternatives_all(void)
168{
169
170 stop_machine(__apply_alternatives_multi_stop, NULL, cpu_online_mask);
171}
172
173void apply_alternatives(void *start, size_t length)
174{
175 struct alt_region region = {
176 .begin = start,
177 .end = start + length,
178 };
179
180 __apply_alternatives(®ion, false);
181}
182