linux/arch/sh/include/mach-se/mach/se7721.h
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   1/*
   2 * Copyright (C) 2008 Renesas Solutions Corp.
   3 *
   4 * Hitachi UL SolutionEngine 7721 Support.
   5 *
   6 * This file is subject to the terms and conditions of the GNU General Public
   7 * License.  See the file "COPYING" in the main directory of this archive
   8 * for more details.
   9 *
  10 */
  11
  12#ifndef __ASM_SH_SE7721_H
  13#define __ASM_SH_SE7721_H
  14
  15#include <linux/sh_intc.h>
  16#include <asm/addrspace.h>
  17
  18/* Box specific addresses. */
  19#define SE_AREA0_WIDTH  2               /* Area0: 32bit */
  20#define PA_ROM          0xa0000000      /* EPROM */
  21#define PA_ROM_SIZE     0x00200000      /* EPROM size 2M byte */
  22#define PA_FROM         0xa1000000      /* Flash-ROM */
  23#define PA_FROM_SIZE    0x01000000      /* Flash-ROM size 16M byte */
  24#define PA_EXT1         0xa4000000
  25#define PA_EXT1_SIZE    0x04000000
  26#define PA_SDRAM        0xaC000000      /* SDRAM(Area3) 64MB */
  27#define PA_SDRAM_SIZE   0x04000000
  28
  29#define PA_EXT4         0xb0000000
  30#define PA_EXT4_SIZE    0x04000000
  31
  32#define PA_PERIPHERAL   0xB8000000
  33
  34#define PA_PCIC         PA_PERIPHERAL
  35#define PA_MRSHPC       (PA_PERIPHERAL + 0x003fffe0)
  36#define PA_MRSHPC_MW1   (PA_PERIPHERAL + 0x00400000)
  37#define PA_MRSHPC_MW2   (PA_PERIPHERAL + 0x00500000)
  38#define PA_MRSHPC_IO    (PA_PERIPHERAL + 0x00600000)
  39#define MRSHPC_OPTION   (PA_MRSHPC + 6)
  40#define MRSHPC_CSR      (PA_MRSHPC + 8)
  41#define MRSHPC_ISR      (PA_MRSHPC + 10)
  42#define MRSHPC_ICR      (PA_MRSHPC + 12)
  43#define MRSHPC_CPWCR    (PA_MRSHPC + 14)
  44#define MRSHPC_MW0CR1   (PA_MRSHPC + 16)
  45#define MRSHPC_MW1CR1   (PA_MRSHPC + 18)
  46#define MRSHPC_IOWCR1   (PA_MRSHPC + 20)
  47#define MRSHPC_MW0CR2   (PA_MRSHPC + 22)
  48#define MRSHPC_MW1CR2   (PA_MRSHPC + 24)
  49#define MRSHPC_IOWCR2   (PA_MRSHPC + 26)
  50#define MRSHPC_CDCR     (PA_MRSHPC + 28)
  51#define MRSHPC_PCIC_INFO        (PA_MRSHPC + 30)
  52
  53#define PA_LED          0xB6800000      /* 8bit LED */
  54#define PA_FPGA         0xB7000000      /* FPGA base address */
  55
  56#define MRSHPC_IRQ0     evt2irq(0x340)
  57
  58#define FPGA_ILSR1      (PA_FPGA + 0x02)
  59#define FPGA_ILSR2      (PA_FPGA + 0x03)
  60#define FPGA_ILSR3      (PA_FPGA + 0x04)
  61#define FPGA_ILSR4      (PA_FPGA + 0x05)
  62#define FPGA_ILSR5      (PA_FPGA + 0x06)
  63#define FPGA_ILSR6      (PA_FPGA + 0x07)
  64#define FPGA_ILSR7      (PA_FPGA + 0x08)
  65#define FPGA_ILSR8      (PA_FPGA + 0x09)
  66
  67void init_se7721_IRQ(void);
  68
  69#define __IO_PREFIX             se7721
  70#include <asm/io_generic.h>
  71
  72#endif  /* __ASM_SH_SE7721_H */
  73