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7#include <linux/kernel.h>
8#include <linux/percpu.h>
9#include <linux/mm.h>
10#include <linux/swap.h>
11#include <linux/preempt.h>
12
13#include <asm/pgtable.h>
14#include <asm/pgalloc.h>
15#include <asm/tlbflush.h>
16#include <asm/cacheflush.h>
17#include <asm/mmu_context.h>
18#include <asm/tlb.h>
19
20
21
22static DEFINE_PER_CPU(struct tlb_batch, tlb_batch);
23
24void flush_tlb_pending(void)
25{
26 struct tlb_batch *tb = &get_cpu_var(tlb_batch);
27 struct mm_struct *mm = tb->mm;
28
29 if (!tb->tlb_nr)
30 goto out;
31
32 flush_tsb_user(tb);
33
34 if (CTX_VALID(mm->context)) {
35 if (tb->tlb_nr == 1) {
36 global_flush_tlb_page(mm, tb->vaddrs[0]);
37 } else {
38#ifdef CONFIG_SMP
39 smp_flush_tlb_pending(tb->mm, tb->tlb_nr,
40 &tb->vaddrs[0]);
41#else
42 __flush_tlb_pending(CTX_HWBITS(tb->mm->context),
43 tb->tlb_nr, &tb->vaddrs[0]);
44#endif
45 }
46 }
47
48 tb->tlb_nr = 0;
49
50out:
51 put_cpu_var(tlb_batch);
52}
53
54void arch_enter_lazy_mmu_mode(void)
55{
56 struct tlb_batch *tb = this_cpu_ptr(&tlb_batch);
57
58 tb->active = 1;
59}
60
61void arch_leave_lazy_mmu_mode(void)
62{
63 struct tlb_batch *tb = this_cpu_ptr(&tlb_batch);
64
65 if (tb->tlb_nr)
66 flush_tlb_pending();
67 tb->active = 0;
68}
69
70static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,
71 bool exec, unsigned int hugepage_shift)
72{
73 struct tlb_batch *tb = &get_cpu_var(tlb_batch);
74 unsigned long nr;
75
76 vaddr &= PAGE_MASK;
77 if (exec)
78 vaddr |= 0x1UL;
79
80 nr = tb->tlb_nr;
81
82 if (unlikely(nr != 0 && mm != tb->mm)) {
83 flush_tlb_pending();
84 nr = 0;
85 }
86
87 if (!tb->active) {
88 flush_tsb_user_page(mm, vaddr, hugepage_shift);
89 global_flush_tlb_page(mm, vaddr);
90 goto out;
91 }
92
93 if (nr == 0) {
94 tb->mm = mm;
95 tb->hugepage_shift = hugepage_shift;
96 }
97
98 if (tb->hugepage_shift != hugepage_shift) {
99 flush_tlb_pending();
100 tb->hugepage_shift = hugepage_shift;
101 nr = 0;
102 }
103
104 tb->vaddrs[nr] = vaddr;
105 tb->tlb_nr = ++nr;
106 if (nr >= TLB_BATCH_NR)
107 flush_tlb_pending();
108
109out:
110 put_cpu_var(tlb_batch);
111}
112
113void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
114 pte_t *ptep, pte_t orig, int fullmm,
115 unsigned int hugepage_shift)
116{
117 if (tlb_type != hypervisor &&
118 pte_dirty(orig)) {
119 unsigned long paddr, pfn = pte_pfn(orig);
120 struct address_space *mapping;
121 struct page *page;
122
123 if (!pfn_valid(pfn))
124 goto no_cache_flush;
125
126 page = pfn_to_page(pfn);
127 if (PageReserved(page))
128 goto no_cache_flush;
129
130
131 mapping = page_mapping(page);
132 if (!mapping)
133 goto no_cache_flush;
134
135 paddr = (unsigned long) page_address(page);
136 if ((paddr ^ vaddr) & (1 << 13))
137 flush_dcache_page_all(mm, page);
138 }
139
140no_cache_flush:
141 if (!fullmm)
142 tlb_batch_add_one(mm, vaddr, pte_exec(orig), hugepage_shift);
143}
144
145#ifdef CONFIG_TRANSPARENT_HUGEPAGE
146static void tlb_batch_pmd_scan(struct mm_struct *mm, unsigned long vaddr,
147 pmd_t pmd)
148{
149 unsigned long end;
150 pte_t *pte;
151
152 pte = pte_offset_map(&pmd, vaddr);
153 end = vaddr + HPAGE_SIZE;
154 while (vaddr < end) {
155 if (pte_val(*pte) & _PAGE_VALID) {
156 bool exec = pte_exec(*pte);
157
158 tlb_batch_add_one(mm, vaddr, exec, PAGE_SHIFT);
159 }
160 pte++;
161 vaddr += PAGE_SIZE;
162 }
163 pte_unmap(pte);
164}
165
166void set_pmd_at(struct mm_struct *mm, unsigned long addr,
167 pmd_t *pmdp, pmd_t pmd)
168{
169 pmd_t orig = *pmdp;
170
171 *pmdp = pmd;
172
173 if (mm == &init_mm)
174 return;
175
176 if ((pmd_val(pmd) ^ pmd_val(orig)) & _PAGE_PMD_HUGE) {
177
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180
181
182
183
184
185 if (pmd_val(pmd) & _PAGE_PMD_HUGE) {
186 if (is_huge_zero_page(pmd_page(pmd)))
187 mm->context.hugetlb_pte_count++;
188 else
189 mm->context.thp_pte_count++;
190 } else {
191 if (is_huge_zero_page(pmd_page(orig)))
192 mm->context.hugetlb_pte_count--;
193 else
194 mm->context.thp_pte_count--;
195 }
196
197
198
199
200
201
202
203
204
205 }
206
207 if (!pmd_none(orig)) {
208 addr &= HPAGE_MASK;
209 if (pmd_trans_huge(orig)) {
210 pte_t orig_pte = __pte(pmd_val(orig));
211 bool exec = pte_exec(orig_pte);
212
213 tlb_batch_add_one(mm, addr, exec, REAL_HPAGE_SHIFT);
214 tlb_batch_add_one(mm, addr + REAL_HPAGE_SIZE, exec,
215 REAL_HPAGE_SHIFT);
216 } else {
217 tlb_batch_pmd_scan(mm, addr, orig);
218 }
219 }
220}
221
222
223
224
225void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
226 pmd_t *pmdp)
227{
228 pmd_t entry = *pmdp;
229
230 pmd_val(entry) &= ~_PAGE_VALID;
231
232 set_pmd_at(vma->vm_mm, address, pmdp, entry);
233 flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
234
235
236
237
238
239
240 if ((pmd_val(entry) & _PAGE_PMD_HUGE) &&
241 !is_huge_zero_page(pmd_page(entry)))
242 (vma->vm_mm)->context.thp_pte_count--;
243}
244
245void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
246 pgtable_t pgtable)
247{
248 struct list_head *lh = (struct list_head *) pgtable;
249
250 assert_spin_locked(&mm->page_table_lock);
251
252
253 if (!pmd_huge_pte(mm, pmdp))
254 INIT_LIST_HEAD(lh);
255 else
256 list_add(lh, (struct list_head *) pmd_huge_pte(mm, pmdp));
257 pmd_huge_pte(mm, pmdp) = pgtable;
258}
259
260pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp)
261{
262 struct list_head *lh;
263 pgtable_t pgtable;
264
265 assert_spin_locked(&mm->page_table_lock);
266
267
268 pgtable = pmd_huge_pte(mm, pmdp);
269 lh = (struct list_head *) pgtable;
270 if (list_empty(lh))
271 pmd_huge_pte(mm, pmdp) = NULL;
272 else {
273 pmd_huge_pte(mm, pmdp) = (pgtable_t) lh->next;
274 list_del(lh);
275 }
276 pte_val(pgtable[0]) = 0;
277 pte_val(pgtable[1]) = 0;
278
279 return pgtable;
280}
281#endif
282