1
2
3
4
5
6#include <linux/compat.h>
7#include <linux/cpu.h>
8#include <linux/mman.h>
9#include <linux/pkeys.h>
10
11#include <asm/fpu/api.h>
12#include <asm/fpu/internal.h>
13#include <asm/fpu/signal.h>
14#include <asm/fpu/regset.h>
15#include <asm/fpu/xstate.h>
16
17#include <asm/tlbflush.h>
18
19
20
21
22
23
24static const char *xfeature_names[] =
25{
26 "x87 floating point registers" ,
27 "SSE registers" ,
28 "AVX registers" ,
29 "MPX bounds registers" ,
30 "MPX CSR" ,
31 "AVX-512 opmask" ,
32 "AVX-512 Hi256" ,
33 "AVX-512 ZMM_Hi256" ,
34 "Processor Trace (unused)" ,
35 "Protection Keys User registers",
36 "unknown xstate feature" ,
37};
38
39
40
41
42u64 xfeatures_mask __read_mostly;
43
44static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
45static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
46static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
47
48
49
50
51
52
53unsigned int fpu_user_xstate_size;
54
55
56
57
58
59void fpu__xstate_clear_all_cpu_caps(void)
60{
61 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
62 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
63 setup_clear_cpu_cap(X86_FEATURE_XSAVEC);
64 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
65 setup_clear_cpu_cap(X86_FEATURE_AVX);
66 setup_clear_cpu_cap(X86_FEATURE_AVX2);
67 setup_clear_cpu_cap(X86_FEATURE_AVX512F);
68 setup_clear_cpu_cap(X86_FEATURE_AVX512IFMA);
69 setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
70 setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
71 setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
72 setup_clear_cpu_cap(X86_FEATURE_AVX512DQ);
73 setup_clear_cpu_cap(X86_FEATURE_AVX512BW);
74 setup_clear_cpu_cap(X86_FEATURE_AVX512VL);
75 setup_clear_cpu_cap(X86_FEATURE_MPX);
76 setup_clear_cpu_cap(X86_FEATURE_XGETBV1);
77 setup_clear_cpu_cap(X86_FEATURE_AVX512VBMI);
78 setup_clear_cpu_cap(X86_FEATURE_PKU);
79 setup_clear_cpu_cap(X86_FEATURE_AVX512_4VNNIW);
80 setup_clear_cpu_cap(X86_FEATURE_AVX512_4FMAPS);
81 setup_clear_cpu_cap(X86_FEATURE_AVX512_VPOPCNTDQ);
82}
83
84
85
86
87
88
89int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
90{
91 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
92
93 if (unlikely(feature_name)) {
94 long xfeature_idx, max_idx;
95 u64 xfeatures_print;
96
97
98
99
100
101
102
103 if (xfeatures_missing)
104 xfeatures_print = xfeatures_missing;
105 else
106 xfeatures_print = xfeatures_needed;
107
108 xfeature_idx = fls64(xfeatures_print)-1;
109 max_idx = ARRAY_SIZE(xfeature_names)-1;
110 xfeature_idx = min(xfeature_idx, max_idx);
111
112 *feature_name = xfeature_names[xfeature_idx];
113 }
114
115 if (xfeatures_missing)
116 return 0;
117
118 return 1;
119}
120EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
121
122static int xfeature_is_supervisor(int xfeature_nr)
123{
124
125
126
127
128
129
130
131
132 u32 eax, ebx, ecx, edx;
133
134 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
135 return !!(ecx & 1);
136}
137
138static int xfeature_is_user(int xfeature_nr)
139{
140 return !xfeature_is_supervisor(xfeature_nr);
141}
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158void fpstate_sanitize_xstate(struct fpu *fpu)
159{
160 struct fxregs_state *fx = &fpu->state.fxsave;
161 int feature_bit;
162 u64 xfeatures;
163
164 if (!use_xsaveopt())
165 return;
166
167 xfeatures = fpu->state.xsave.header.xfeatures;
168
169
170
171
172
173 if ((xfeatures & xfeatures_mask) == xfeatures_mask)
174 return;
175
176
177
178
179 if (!(xfeatures & XFEATURE_MASK_FP)) {
180 fx->cwd = 0x37f;
181 fx->swd = 0;
182 fx->twd = 0;
183 fx->fop = 0;
184 fx->rip = 0;
185 fx->rdp = 0;
186 memset(&fx->st_space[0], 0, 128);
187 }
188
189
190
191
192 if (!(xfeatures & XFEATURE_MASK_SSE))
193 memset(&fx->xmm_space[0], 0, 256);
194
195
196
197
198
199 feature_bit = 0x2;
200 xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
201
202
203
204
205
206
207 while (xfeatures) {
208 if (xfeatures & 0x1) {
209 int offset = xstate_comp_offsets[feature_bit];
210 int size = xstate_sizes[feature_bit];
211
212 memcpy((void *)fx + offset,
213 (void *)&init_fpstate.xsave + offset,
214 size);
215 }
216
217 xfeatures >>= 1;
218 feature_bit++;
219 }
220}
221
222
223
224
225
226void fpu__init_cpu_xstate(void)
227{
228 if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask)
229 return;
230
231
232
233
234
235 WARN_ONCE((xfeatures_mask & XFEATURE_MASK_SUPERVISOR),
236 "x86/fpu: XSAVES supervisor states are not yet implemented.\n");
237
238 xfeatures_mask &= ~XFEATURE_MASK_SUPERVISOR;
239
240 cr4_set_bits(X86_CR4_OSXSAVE);
241 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
242}
243
244
245
246
247
248
249static int xfeature_enabled(enum xfeature xfeature)
250{
251 return !!(xfeatures_mask & (1UL << xfeature));
252}
253
254
255
256
257
258static void __init setup_xstate_features(void)
259{
260 u32 eax, ebx, ecx, edx, i;
261
262 unsigned int last_good_offset = offsetof(struct xregs_state,
263 extended_state_area);
264
265
266
267
268
269 xstate_offsets[0] = 0;
270 xstate_sizes[0] = offsetof(struct fxregs_state, xmm_space);
271 xstate_offsets[1] = xstate_sizes[0];
272 xstate_sizes[1] = FIELD_SIZEOF(struct fxregs_state, xmm_space);
273
274 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
275 if (!xfeature_enabled(i))
276 continue;
277
278 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
279
280
281
282
283
284 if (xfeature_is_user(i))
285 xstate_offsets[i] = ebx;
286
287 xstate_sizes[i] = eax;
288
289
290
291
292
293 WARN_ONCE(last_good_offset > xstate_offsets[i],
294 "x86/fpu: misordered xstate at %d\n", last_good_offset);
295 last_good_offset = xstate_offsets[i];
296 }
297}
298
299static void __init print_xstate_feature(u64 xstate_mask)
300{
301 const char *feature_name;
302
303 if (cpu_has_xfeatures(xstate_mask, &feature_name))
304 pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name);
305}
306
307
308
309
310static void __init print_xstate_features(void)
311{
312 print_xstate_feature(XFEATURE_MASK_FP);
313 print_xstate_feature(XFEATURE_MASK_SSE);
314 print_xstate_feature(XFEATURE_MASK_YMM);
315 print_xstate_feature(XFEATURE_MASK_BNDREGS);
316 print_xstate_feature(XFEATURE_MASK_BNDCSR);
317 print_xstate_feature(XFEATURE_MASK_OPMASK);
318 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
319 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
320 print_xstate_feature(XFEATURE_MASK_PKRU);
321}
322
323
324
325
326
327#define CHECK_XFEATURE(nr) do { \
328 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \
329 WARN_ON(nr >= XFEATURE_MAX); \
330} while (0)
331
332
333
334
335
336static int xfeature_is_aligned(int xfeature_nr)
337{
338 u32 eax, ebx, ecx, edx;
339
340 CHECK_XFEATURE(xfeature_nr);
341 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
342
343
344
345
346
347 return !!(ecx & 2);
348}
349
350
351
352
353
354
355static void __init setup_xstate_comp(void)
356{
357 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
358 int i;
359
360
361
362
363
364
365 xstate_comp_offsets[0] = 0;
366 xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
367
368 if (!boot_cpu_has(X86_FEATURE_XSAVES)) {
369 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
370 if (xfeature_enabled(i)) {
371 xstate_comp_offsets[i] = xstate_offsets[i];
372 xstate_comp_sizes[i] = xstate_sizes[i];
373 }
374 }
375 return;
376 }
377
378 xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] =
379 FXSAVE_SIZE + XSAVE_HDR_SIZE;
380
381 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
382 if (xfeature_enabled(i))
383 xstate_comp_sizes[i] = xstate_sizes[i];
384 else
385 xstate_comp_sizes[i] = 0;
386
387 if (i > FIRST_EXTENDED_XFEATURE) {
388 xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
389 + xstate_comp_sizes[i-1];
390
391 if (xfeature_is_aligned(i))
392 xstate_comp_offsets[i] =
393 ALIGN(xstate_comp_offsets[i], 64);
394 }
395 }
396}
397
398
399
400
401static void __init print_xstate_offset_size(void)
402{
403 int i;
404
405 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
406 if (!xfeature_enabled(i))
407 continue;
408 pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n",
409 i, xstate_comp_offsets[i], i, xstate_sizes[i]);
410 }
411}
412
413
414
415
416static void __init setup_init_fpu_buf(void)
417{
418 static int on_boot_cpu __initdata = 1;
419
420 WARN_ON_FPU(!on_boot_cpu);
421 on_boot_cpu = 0;
422
423 if (!boot_cpu_has(X86_FEATURE_XSAVE))
424 return;
425
426 setup_xstate_features();
427 print_xstate_features();
428
429 if (boot_cpu_has(X86_FEATURE_XSAVES))
430 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
431
432
433
434
435 copy_kernel_to_xregs_booting(&init_fpstate.xsave);
436
437
438
439
440
441 copy_xregs_to_kernel_booting(&init_fpstate.xsave);
442}
443
444static int xfeature_uncompacted_offset(int xfeature_nr)
445{
446 u32 eax, ebx, ecx, edx;
447
448
449
450
451
452
453 if (XFEATURE_MASK_SUPERVISOR & (1 << xfeature_nr)) {
454 WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr);
455 return -1;
456 }
457
458 CHECK_XFEATURE(xfeature_nr);
459 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
460 return ebx;
461}
462
463static int xfeature_size(int xfeature_nr)
464{
465 u32 eax, ebx, ecx, edx;
466
467 CHECK_XFEATURE(xfeature_nr);
468 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
469 return eax;
470}
471
472
473
474
475
476
477
478
479
480
481int using_compacted_format(void)
482{
483 return boot_cpu_has(X86_FEATURE_XSAVES);
484}
485
486
487int validate_xstate_header(const struct xstate_header *hdr)
488{
489
490 if (hdr->xfeatures & (~xfeatures_mask | XFEATURE_MASK_SUPERVISOR))
491 return -EINVAL;
492
493
494 if (hdr->xcomp_bv)
495 return -EINVAL;
496
497
498
499
500
501 BUILD_BUG_ON(sizeof(hdr->reserved) != 48);
502
503
504 if (memchr_inv(hdr->reserved, 0, sizeof(hdr->reserved)))
505 return -EINVAL;
506
507 return 0;
508}
509
510static void __xstate_dump_leaves(void)
511{
512 int i;
513 u32 eax, ebx, ecx, edx;
514 static int should_dump = 1;
515
516 if (!should_dump)
517 return;
518 should_dump = 0;
519
520
521
522
523 for (i = 0; i < XFEATURE_MAX + 10; i++) {
524 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
525 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
526 XSTATE_CPUID, i, eax, ebx, ecx, edx);
527 }
528}
529
530#define XSTATE_WARN_ON(x) do { \
531 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \
532 __xstate_dump_leaves(); \
533 } \
534} while (0)
535
536#define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \
537 if ((nr == nr_macro) && \
538 WARN_ONCE(sz != sizeof(__struct), \
539 "%s: struct is %zu bytes, cpu state %d bytes\n", \
540 __stringify(nr_macro), sizeof(__struct), sz)) { \
541 __xstate_dump_leaves(); \
542 } \
543} while (0)
544
545
546
547
548
549
550static void check_xstate_against_struct(int nr)
551{
552
553
554
555 int sz = xfeature_size(nr);
556
557
558
559
560 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct);
561 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state);
562 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state);
563 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state);
564 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
565 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state);
566 XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state);
567
568
569
570
571
572
573 if ((nr < XFEATURE_YMM) ||
574 (nr >= XFEATURE_MAX) ||
575 (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR)) {
576 WARN_ONCE(1, "no structure for xstate: %d\n", nr);
577 XSTATE_WARN_ON(1);
578 }
579}
580
581
582
583
584
585
586static void do_extra_xstate_size_checks(void)
587{
588 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
589 int i;
590
591 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
592 if (!xfeature_enabled(i))
593 continue;
594
595 check_xstate_against_struct(i);
596
597
598
599
600 if (!using_compacted_format())
601 XSTATE_WARN_ON(xfeature_is_supervisor(i));
602
603
604 if (xfeature_is_aligned(i))
605 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64);
606
607
608
609
610
611
612 if (!using_compacted_format())
613 paranoid_xstate_size = xfeature_uncompacted_offset(i);
614
615
616
617
618 paranoid_xstate_size += xfeature_size(i);
619 }
620 XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size);
621}
622
623
624
625
626
627
628
629
630
631
632
633
634
635static unsigned int __init get_xsaves_size(void)
636{
637 unsigned int eax, ebx, ecx, edx;
638
639
640
641
642
643
644
645
646 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
647 return ebx;
648}
649
650static unsigned int __init get_xsave_size(void)
651{
652 unsigned int eax, ebx, ecx, edx;
653
654
655
656
657
658
659
660 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
661 return ebx;
662}
663
664
665
666
667
668static bool is_supported_xstate_size(unsigned int test_xstate_size)
669{
670 if (test_xstate_size <= sizeof(union fpregs_state))
671 return true;
672
673 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n",
674 sizeof(union fpregs_state), test_xstate_size);
675 return false;
676}
677
678static int init_xstate_size(void)
679{
680
681 unsigned int possible_xstate_size;
682 unsigned int xsave_size;
683
684 xsave_size = get_xsave_size();
685
686 if (boot_cpu_has(X86_FEATURE_XSAVES))
687 possible_xstate_size = get_xsaves_size();
688 else
689 possible_xstate_size = xsave_size;
690
691
692 if (!is_supported_xstate_size(possible_xstate_size))
693 return -EINVAL;
694
695
696
697
698
699 fpu_kernel_xstate_size = possible_xstate_size;
700 do_extra_xstate_size_checks();
701
702
703
704
705 fpu_user_xstate_size = xsave_size;
706 return 0;
707}
708
709
710
711
712
713static void fpu__init_disable_system_xstate(void)
714{
715 xfeatures_mask = 0;
716 cr4_clear_bits(X86_CR4_OSXSAVE);
717 fpu__xstate_clear_all_cpu_caps();
718}
719
720
721
722
723
724void __init fpu__init_system_xstate(void)
725{
726 unsigned int eax, ebx, ecx, edx;
727 static int on_boot_cpu __initdata = 1;
728 int err;
729
730 WARN_ON_FPU(!on_boot_cpu);
731 on_boot_cpu = 0;
732
733 if (!boot_cpu_has(X86_FEATURE_FPU)) {
734 pr_info("x86/fpu: No FPU detected\n");
735 return;
736 }
737
738 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
739 pr_info("x86/fpu: x87 FPU will use %s\n",
740 boot_cpu_has(X86_FEATURE_FXSR) ? "FXSAVE" : "FSAVE");
741 return;
742 }
743
744 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
745 WARN_ON_FPU(1);
746 return;
747 }
748
749 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
750 xfeatures_mask = eax + ((u64)edx << 32);
751
752 if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
753
754
755
756
757
758 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
759 goto out_disable;
760 }
761
762 xfeatures_mask &= fpu__get_supported_xfeatures_mask();
763
764
765 fpu__init_cpu_xstate();
766 err = init_xstate_size();
767 if (err)
768 goto out_disable;
769
770
771
772
773
774 update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR);
775
776 fpu__init_prepare_fx_sw_frame();
777 setup_init_fpu_buf();
778 setup_xstate_comp();
779 print_xstate_offset_size();
780
781 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
782 xfeatures_mask,
783 fpu_kernel_xstate_size,
784 boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard");
785 return;
786
787out_disable:
788
789 fpu__init_disable_system_xstate();
790}
791
792
793
794
795void fpu__resume_cpu(void)
796{
797
798
799
800 if (boot_cpu_has(X86_FEATURE_XSAVE))
801 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
802}
803
804
805
806
807
808
809
810
811void *__raw_xsave_addr(struct xregs_state *xsave, int xstate_feature_mask)
812{
813 int feature_nr = fls64(xstate_feature_mask) - 1;
814
815 if (!xfeature_enabled(feature_nr)) {
816 WARN_ON_FPU(1);
817 return NULL;
818 }
819
820 return (void *)xsave + xstate_comp_offsets[feature_nr];
821}
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)
841{
842
843
844
845 if (!boot_cpu_has(X86_FEATURE_XSAVE))
846 return NULL;
847
848
849
850
851
852
853 WARN_ONCE(!(xfeatures_mask & xstate_feature),
854 "get of unsupported state");
855
856
857
858
859
860
861
862
863
864
865
866 if (!(xsave->header.xfeatures & xstate_feature))
867 return NULL;
868
869 return __raw_xsave_addr(xsave, xstate_feature);
870}
871EXPORT_SYMBOL_GPL(get_xsave_addr);
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890const void *get_xsave_field_ptr(int xsave_state)
891{
892 struct fpu *fpu = ¤t->thread.fpu;
893
894 if (!fpu->initialized)
895 return NULL;
896
897
898
899
900 fpu__save(fpu);
901
902 return get_xsave_addr(&fpu->state.xsave, xsave_state);
903}
904
905#ifdef CONFIG_ARCH_HAS_PKEYS
906
907#define NR_VALID_PKRU_BITS (CONFIG_NR_PROTECTION_KEYS * 2)
908#define PKRU_VALID_MASK (NR_VALID_PKRU_BITS - 1)
909
910
911
912
913int arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
914 unsigned long init_val)
915{
916 u32 old_pkru;
917 int pkey_shift = (pkey * PKRU_BITS_PER_PKEY);
918 u32 new_pkru_bits = 0;
919
920
921
922
923
924 if (!boot_cpu_has(X86_FEATURE_OSPKE))
925 return -EINVAL;
926
927
928 if (init_val & PKEY_DISABLE_ACCESS)
929 new_pkru_bits |= PKRU_AD_BIT;
930 if (init_val & PKEY_DISABLE_WRITE)
931 new_pkru_bits |= PKRU_WD_BIT;
932
933
934 new_pkru_bits <<= pkey_shift;
935
936
937 old_pkru = read_pkru();
938 old_pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift);
939
940
941 write_pkru(old_pkru | new_pkru_bits);
942
943 return 0;
944}
945#endif
946
947
948
949
950
951
952
953static inline bool xfeatures_mxcsr_quirk(u64 xfeatures)
954{
955 if (!(xfeatures & (XFEATURE_MASK_SSE|XFEATURE_MASK_YMM)))
956 return false;
957
958 if (xfeatures & XFEATURE_MASK_FP)
959 return false;
960
961 return true;
962}
963
964
965
966
967
968static inline void
969__copy_xstate_to_kernel(void *kbuf, const void *data,
970 unsigned int offset, unsigned int size, unsigned int size_total)
971{
972 if (offset < size_total) {
973 unsigned int copy = min(size, size_total - offset);
974
975 memcpy(kbuf + offset, data, copy);
976 }
977}
978
979
980
981
982
983
984
985
986int copy_xstate_to_kernel(void *kbuf, struct xregs_state *xsave, unsigned int offset_start, unsigned int size_total)
987{
988 unsigned int offset, size;
989 struct xstate_header header;
990 int i;
991
992
993
994
995 if (unlikely(offset_start != 0))
996 return -EFAULT;
997
998
999
1000
1001 memset(&header, 0, sizeof(header));
1002 header.xfeatures = xsave->header.xfeatures;
1003 header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR;
1004
1005
1006
1007
1008 offset = offsetof(struct xregs_state, header);
1009 size = sizeof(header);
1010
1011 __copy_xstate_to_kernel(kbuf, &header, offset, size, size_total);
1012
1013 for (i = 0; i < XFEATURE_MAX; i++) {
1014
1015
1016
1017 if ((header.xfeatures >> i) & 1) {
1018 void *src = __raw_xsave_addr(xsave, 1 << i);
1019
1020 offset = xstate_offsets[i];
1021 size = xstate_sizes[i];
1022
1023
1024 if (offset + size > size_total)
1025 break;
1026
1027 __copy_xstate_to_kernel(kbuf, src, offset, size, size_total);
1028 }
1029
1030 }
1031
1032 if (xfeatures_mxcsr_quirk(header.xfeatures)) {
1033 offset = offsetof(struct fxregs_state, mxcsr);
1034 size = MXCSR_AND_FLAGS_SIZE;
1035 __copy_xstate_to_kernel(kbuf, &xsave->i387.mxcsr, offset, size, size_total);
1036 }
1037
1038
1039
1040
1041 offset = offsetof(struct fxregs_state, sw_reserved);
1042 size = sizeof(xstate_fx_sw_bytes);
1043
1044 __copy_xstate_to_kernel(kbuf, xstate_fx_sw_bytes, offset, size, size_total);
1045
1046 return 0;
1047}
1048
1049static inline int
1050__copy_xstate_to_user(void __user *ubuf, const void *data, unsigned int offset, unsigned int size, unsigned int size_total)
1051{
1052 if (!size)
1053 return 0;
1054
1055 if (offset < size_total) {
1056 unsigned int copy = min(size, size_total - offset);
1057
1058 if (__copy_to_user(ubuf + offset, data, copy))
1059 return -EFAULT;
1060 }
1061 return 0;
1062}
1063
1064
1065
1066
1067
1068
1069
1070int copy_xstate_to_user(void __user *ubuf, struct xregs_state *xsave, unsigned int offset_start, unsigned int size_total)
1071{
1072 unsigned int offset, size;
1073 int ret, i;
1074 struct xstate_header header;
1075
1076
1077
1078
1079 if (unlikely(offset_start != 0))
1080 return -EFAULT;
1081
1082
1083
1084
1085 memset(&header, 0, sizeof(header));
1086 header.xfeatures = xsave->header.xfeatures;
1087 header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR;
1088
1089
1090
1091
1092 offset = offsetof(struct xregs_state, header);
1093 size = sizeof(header);
1094
1095 ret = __copy_xstate_to_user(ubuf, &header, offset, size, size_total);
1096 if (ret)
1097 return ret;
1098
1099 for (i = 0; i < XFEATURE_MAX; i++) {
1100
1101
1102
1103 if ((header.xfeatures >> i) & 1) {
1104 void *src = __raw_xsave_addr(xsave, 1 << i);
1105
1106 offset = xstate_offsets[i];
1107 size = xstate_sizes[i];
1108
1109
1110 if (offset + size > size_total)
1111 break;
1112
1113 ret = __copy_xstate_to_user(ubuf, src, offset, size, size_total);
1114 if (ret)
1115 return ret;
1116 }
1117
1118 }
1119
1120 if (xfeatures_mxcsr_quirk(header.xfeatures)) {
1121 offset = offsetof(struct fxregs_state, mxcsr);
1122 size = MXCSR_AND_FLAGS_SIZE;
1123 __copy_xstate_to_user(ubuf, &xsave->i387.mxcsr, offset, size, size_total);
1124 }
1125
1126
1127
1128
1129 offset = offsetof(struct fxregs_state, sw_reserved);
1130 size = sizeof(xstate_fx_sw_bytes);
1131
1132 ret = __copy_xstate_to_user(ubuf, xstate_fx_sw_bytes, offset, size, size_total);
1133 if (ret)
1134 return ret;
1135
1136 return 0;
1137}
1138
1139
1140
1141
1142
1143int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf)
1144{
1145 unsigned int offset, size;
1146 int i;
1147 struct xstate_header hdr;
1148
1149 offset = offsetof(struct xregs_state, header);
1150 size = sizeof(hdr);
1151
1152 memcpy(&hdr, kbuf + offset, size);
1153
1154 if (validate_xstate_header(&hdr))
1155 return -EINVAL;
1156
1157 for (i = 0; i < XFEATURE_MAX; i++) {
1158 u64 mask = ((u64)1 << i);
1159
1160 if (hdr.xfeatures & mask) {
1161 void *dst = __raw_xsave_addr(xsave, 1 << i);
1162
1163 offset = xstate_offsets[i];
1164 size = xstate_sizes[i];
1165
1166 memcpy(dst, kbuf + offset, size);
1167 }
1168 }
1169
1170 if (xfeatures_mxcsr_quirk(hdr.xfeatures)) {
1171 offset = offsetof(struct fxregs_state, mxcsr);
1172 size = MXCSR_AND_FLAGS_SIZE;
1173 memcpy(&xsave->i387.mxcsr, kbuf + offset, size);
1174 }
1175
1176
1177
1178
1179
1180 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR;
1181
1182
1183
1184
1185 xsave->header.xfeatures |= hdr.xfeatures;
1186
1187 return 0;
1188}
1189
1190
1191
1192
1193
1194
1195
1196int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf)
1197{
1198 unsigned int offset, size;
1199 int i;
1200 struct xstate_header hdr;
1201
1202 offset = offsetof(struct xregs_state, header);
1203 size = sizeof(hdr);
1204
1205 if (__copy_from_user(&hdr, ubuf + offset, size))
1206 return -EFAULT;
1207
1208 if (validate_xstate_header(&hdr))
1209 return -EINVAL;
1210
1211 for (i = 0; i < XFEATURE_MAX; i++) {
1212 u64 mask = ((u64)1 << i);
1213
1214 if (hdr.xfeatures & mask) {
1215 void *dst = __raw_xsave_addr(xsave, 1 << i);
1216
1217 offset = xstate_offsets[i];
1218 size = xstate_sizes[i];
1219
1220 if (__copy_from_user(dst, ubuf + offset, size))
1221 return -EFAULT;
1222 }
1223 }
1224
1225 if (xfeatures_mxcsr_quirk(hdr.xfeatures)) {
1226 offset = offsetof(struct fxregs_state, mxcsr);
1227 size = MXCSR_AND_FLAGS_SIZE;
1228 if (__copy_from_user(&xsave->i387.mxcsr, ubuf + offset, size))
1229 return -EFAULT;
1230 }
1231
1232
1233
1234
1235
1236 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR;
1237
1238
1239
1240
1241 xsave->header.xfeatures |= hdr.xfeatures;
1242
1243 return 0;
1244}
1245