linux/drivers/atm/eni.h
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   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* drivers/atm/eni.h - Efficient Networks ENI155P device driver declarations */
   3 
   4/* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
   5 
   6 
   7#ifndef DRIVER_ATM_ENI_H
   8#define DRIVER_ATM_ENI_H
   9
  10#include <linux/atm.h>
  11#include <linux/atmdev.h>
  12#include <linux/interrupt.h>
  13#include <linux/sonet.h>
  14#include <linux/skbuff.h>
  15#include <linux/time.h>
  16#include <linux/pci.h>
  17#include <linux/spinlock.h>
  18#include <linux/atomic.h>
  19
  20#include "midway.h"
  21
  22
  23#define DEV_LABEL       "eni"
  24
  25#define UBR_BUFFER      (128*1024)      /* UBR buffer size */
  26
  27#define RX_DMA_BUF        8             /* burst and skip a few things */
  28#define TX_DMA_BUF      100             /* should be enough for 64 kB */
  29
  30#define DEFAULT_RX_MULT 300             /* max_sdu*3 */
  31#define DEFAULT_TX_MULT 300             /* max_sdu*3 */
  32
  33#define ENI_ZEROES_SIZE   4             /* need that many DMA-able zero bytes */
  34
  35
  36struct eni_free {
  37        void __iomem *start;            /* counting in bytes */
  38        int order;
  39};
  40
  41struct eni_tx {
  42        void __iomem *send;             /* base, 0 if unused */
  43        int prescaler;                  /* shaping prescaler */
  44        int resolution;                 /* shaping divider */
  45        unsigned long tx_pos;           /* current TX write position */
  46        unsigned long words;            /* size of TX queue */
  47        int index;                      /* TX channel number */
  48        int reserved;                   /* reserved peak cell rate */
  49        int shaping;                    /* shaped peak cell rate */
  50        struct sk_buff_head backlog;    /* queue of waiting TX buffers */
  51};
  52
  53struct eni_vcc {
  54        int (*rx)(struct atm_vcc *vcc); /* RX function, NULL if none */
  55        void __iomem *recv;             /* receive buffer */
  56        unsigned long words;            /* its size in words */
  57        unsigned long descr;            /* next descriptor (RX) */
  58        unsigned long rx_pos;           /* current RX descriptor pos */
  59        struct eni_tx *tx;              /* TXer, NULL if none */
  60        int rxing;                      /* number of pending PDUs */
  61        int servicing;                  /* number of waiting VCs (0 or 1) */
  62        int txing;                      /* number of pending TX bytes */
  63        ktime_t timestamp;              /* for RX timing */
  64        struct atm_vcc *next;           /* next pending RX */
  65        struct sk_buff *last;           /* last PDU being DMAed (used to carry
  66                                           discard information) */
  67};
  68
  69struct eni_dev {
  70        /*-------------------------------- spinlock */
  71        spinlock_t lock;                /* sync with interrupt */
  72        struct tasklet_struct task;     /* tasklet for interrupt work */
  73        u32 events;                     /* pending events */
  74        /*-------------------------------- base pointers into Midway address
  75                                           space */
  76        void __iomem *ioaddr;
  77        void __iomem *phy;              /* PHY interface chip registers */
  78        void __iomem *reg;              /* register base */
  79        void __iomem *ram;              /* RAM base */
  80        void __iomem *vci;              /* VCI table */
  81        void __iomem *rx_dma;           /* RX DMA queue */
  82        void __iomem *tx_dma;           /* TX DMA queue */
  83        void __iomem *service;          /* service list */
  84        /*-------------------------------- TX part */
  85        struct eni_tx tx[NR_CHAN];      /* TX channels */
  86        struct eni_tx *ubr;             /* UBR channel */
  87        struct sk_buff_head tx_queue;   /* PDUs currently being TX DMAed*/
  88        wait_queue_head_t tx_wait;      /* for close */
  89        int tx_bw;                      /* remaining bandwidth */
  90        u32 dma[TX_DMA_BUF*2];          /* DMA request scratch area */
  91        struct eni_zero {               /* aligned "magic" zeroes */
  92                u32 *addr;
  93                dma_addr_t dma;
  94        } zero;
  95        int tx_mult;                    /* buffer size multiplier (percent) */
  96        /*-------------------------------- RX part */
  97        u32 serv_read;                  /* host service read index */
  98        struct atm_vcc *fast,*last_fast;/* queues of VCCs with pending PDUs */
  99        struct atm_vcc *slow,*last_slow;
 100        struct atm_vcc **rx_map;        /* for fast lookups */
 101        struct sk_buff_head rx_queue;   /* PDUs currently being RX-DMAed */
 102        wait_queue_head_t rx_wait;      /* for close */
 103        int rx_mult;                    /* buffer size multiplier (percent) */
 104        /*-------------------------------- statistics */
 105        unsigned long lost;             /* number of lost cells (RX) */
 106        /*-------------------------------- memory management */
 107        unsigned long base_diff;        /* virtual-real base address */
 108        int free_len;                   /* free list length */
 109        struct eni_free *free_list;     /* free list */
 110        int free_list_size;             /* maximum size of free list */
 111        /*-------------------------------- ENI links */
 112        struct atm_dev *more;           /* other ENI devices */
 113        /*-------------------------------- general information */
 114        int mem;                        /* RAM on board (in bytes) */
 115        int asic;                       /* PCI interface type, 0 for FPGA */
 116        unsigned int irq;               /* IRQ */
 117        struct pci_dev *pci_dev;        /* PCI stuff */
 118};
 119
 120
 121#define ENI_DEV(d) ((struct eni_dev *) (d)->dev_data)
 122#define ENI_VCC(d) ((struct eni_vcc *) (d)->dev_data)
 123
 124
 125struct eni_skb_prv {
 126        struct atm_skb_data _;          /* reserved */
 127        unsigned long pos;              /* position of next descriptor */
 128        int size;                       /* PDU size in reassembly buffer */
 129        dma_addr_t paddr;               /* DMA handle */
 130};
 131
 132#define ENI_PRV_SIZE(skb) (((struct eni_skb_prv *) (skb)->cb)->size)
 133#define ENI_PRV_POS(skb) (((struct eni_skb_prv *) (skb)->cb)->pos)
 134#define ENI_PRV_PADDR(skb) (((struct eni_skb_prv *) (skb)->cb)->paddr)
 135
 136#endif
 137