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25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/module.h>
29#include <linux/pci.h>
30#include <linux/reboot.h>
31#include <linux/slab.h>
32#include <linux/bitops.h>
33#include <linux/delay.h>
34#include <linux/debugfs.h>
35#include <linux/seq_file.h>
36
37#include <linux/genhd.h>
38#include <linux/idr.h>
39
40#include "rsxx_priv.h"
41#include "rsxx_cfg.h"
42
43#define NO_LEGACY 0
44#define SYNC_START_TIMEOUT (10 * 60)
45
46MODULE_DESCRIPTION("IBM Flash Adapter 900GB Full Height Device Driver");
47MODULE_AUTHOR("Joshua Morris/Philip Kelleher, IBM");
48MODULE_LICENSE("GPL");
49MODULE_VERSION(DRIVER_VERSION);
50
51static unsigned int force_legacy = NO_LEGACY;
52module_param(force_legacy, uint, 0444);
53MODULE_PARM_DESC(force_legacy, "Force the use of legacy type PCI interrupts");
54
55static unsigned int sync_start = 1;
56module_param(sync_start, uint, 0444);
57MODULE_PARM_DESC(sync_start, "On by Default: Driver load will not complete "
58 "until the card startup has completed.");
59
60static DEFINE_IDA(rsxx_disk_ida);
61static DEFINE_SPINLOCK(rsxx_ida_lock);
62
63
64
65static int rsxx_attr_pci_regs_show(struct seq_file *m, void *p)
66{
67 struct rsxx_cardinfo *card = m->private;
68
69 seq_printf(m, "HWID 0x%08x\n",
70 ioread32(card->regmap + HWID));
71 seq_printf(m, "SCRATCH 0x%08x\n",
72 ioread32(card->regmap + SCRATCH));
73 seq_printf(m, "IER 0x%08x\n",
74 ioread32(card->regmap + IER));
75 seq_printf(m, "IPR 0x%08x\n",
76 ioread32(card->regmap + IPR));
77 seq_printf(m, "CREG_CMD 0x%08x\n",
78 ioread32(card->regmap + CREG_CMD));
79 seq_printf(m, "CREG_ADD 0x%08x\n",
80 ioread32(card->regmap + CREG_ADD));
81 seq_printf(m, "CREG_CNT 0x%08x\n",
82 ioread32(card->regmap + CREG_CNT));
83 seq_printf(m, "CREG_STAT 0x%08x\n",
84 ioread32(card->regmap + CREG_STAT));
85 seq_printf(m, "CREG_DATA0 0x%08x\n",
86 ioread32(card->regmap + CREG_DATA0));
87 seq_printf(m, "CREG_DATA1 0x%08x\n",
88 ioread32(card->regmap + CREG_DATA1));
89 seq_printf(m, "CREG_DATA2 0x%08x\n",
90 ioread32(card->regmap + CREG_DATA2));
91 seq_printf(m, "CREG_DATA3 0x%08x\n",
92 ioread32(card->regmap + CREG_DATA3));
93 seq_printf(m, "CREG_DATA4 0x%08x\n",
94 ioread32(card->regmap + CREG_DATA4));
95 seq_printf(m, "CREG_DATA5 0x%08x\n",
96 ioread32(card->regmap + CREG_DATA5));
97 seq_printf(m, "CREG_DATA6 0x%08x\n",
98 ioread32(card->regmap + CREG_DATA6));
99 seq_printf(m, "CREG_DATA7 0x%08x\n",
100 ioread32(card->regmap + CREG_DATA7));
101 seq_printf(m, "INTR_COAL 0x%08x\n",
102 ioread32(card->regmap + INTR_COAL));
103 seq_printf(m, "HW_ERROR 0x%08x\n",
104 ioread32(card->regmap + HW_ERROR));
105 seq_printf(m, "DEBUG0 0x%08x\n",
106 ioread32(card->regmap + PCI_DEBUG0));
107 seq_printf(m, "DEBUG1 0x%08x\n",
108 ioread32(card->regmap + PCI_DEBUG1));
109 seq_printf(m, "DEBUG2 0x%08x\n",
110 ioread32(card->regmap + PCI_DEBUG2));
111 seq_printf(m, "DEBUG3 0x%08x\n",
112 ioread32(card->regmap + PCI_DEBUG3));
113 seq_printf(m, "DEBUG4 0x%08x\n",
114 ioread32(card->regmap + PCI_DEBUG4));
115 seq_printf(m, "DEBUG5 0x%08x\n",
116 ioread32(card->regmap + PCI_DEBUG5));
117 seq_printf(m, "DEBUG6 0x%08x\n",
118 ioread32(card->regmap + PCI_DEBUG6));
119 seq_printf(m, "DEBUG7 0x%08x\n",
120 ioread32(card->regmap + PCI_DEBUG7));
121 seq_printf(m, "RECONFIG 0x%08x\n",
122 ioread32(card->regmap + PCI_RECONFIG));
123
124 return 0;
125}
126
127static int rsxx_attr_stats_show(struct seq_file *m, void *p)
128{
129 struct rsxx_cardinfo *card = m->private;
130 int i;
131
132 for (i = 0; i < card->n_targets; i++) {
133 seq_printf(m, "Ctrl %d CRC Errors = %d\n",
134 i, card->ctrl[i].stats.crc_errors);
135 seq_printf(m, "Ctrl %d Hard Errors = %d\n",
136 i, card->ctrl[i].stats.hard_errors);
137 seq_printf(m, "Ctrl %d Soft Errors = %d\n",
138 i, card->ctrl[i].stats.soft_errors);
139 seq_printf(m, "Ctrl %d Writes Issued = %d\n",
140 i, card->ctrl[i].stats.writes_issued);
141 seq_printf(m, "Ctrl %d Writes Failed = %d\n",
142 i, card->ctrl[i].stats.writes_failed);
143 seq_printf(m, "Ctrl %d Reads Issued = %d\n",
144 i, card->ctrl[i].stats.reads_issued);
145 seq_printf(m, "Ctrl %d Reads Failed = %d\n",
146 i, card->ctrl[i].stats.reads_failed);
147 seq_printf(m, "Ctrl %d Reads Retried = %d\n",
148 i, card->ctrl[i].stats.reads_retried);
149 seq_printf(m, "Ctrl %d Discards Issued = %d\n",
150 i, card->ctrl[i].stats.discards_issued);
151 seq_printf(m, "Ctrl %d Discards Failed = %d\n",
152 i, card->ctrl[i].stats.discards_failed);
153 seq_printf(m, "Ctrl %d DMA SW Errors = %d\n",
154 i, card->ctrl[i].stats.dma_sw_err);
155 seq_printf(m, "Ctrl %d DMA HW Faults = %d\n",
156 i, card->ctrl[i].stats.dma_hw_fault);
157 seq_printf(m, "Ctrl %d DMAs Cancelled = %d\n",
158 i, card->ctrl[i].stats.dma_cancelled);
159 seq_printf(m, "Ctrl %d SW Queue Depth = %d\n",
160 i, card->ctrl[i].stats.sw_q_depth);
161 seq_printf(m, "Ctrl %d HW Queue Depth = %d\n",
162 i, atomic_read(&card->ctrl[i].stats.hw_q_depth));
163 }
164
165 return 0;
166}
167
168static int rsxx_attr_stats_open(struct inode *inode, struct file *file)
169{
170 return single_open(file, rsxx_attr_stats_show, inode->i_private);
171}
172
173static int rsxx_attr_pci_regs_open(struct inode *inode, struct file *file)
174{
175 return single_open(file, rsxx_attr_pci_regs_show, inode->i_private);
176}
177
178static ssize_t rsxx_cram_read(struct file *fp, char __user *ubuf,
179 size_t cnt, loff_t *ppos)
180{
181 struct rsxx_cardinfo *card = file_inode(fp)->i_private;
182 char *buf;
183 ssize_t st;
184
185 buf = kzalloc(cnt, GFP_KERNEL);
186 if (!buf)
187 return -ENOMEM;
188
189 st = rsxx_creg_read(card, CREG_ADD_CRAM + (u32)*ppos, cnt, buf, 1);
190 if (!st)
191 st = copy_to_user(ubuf, buf, cnt);
192 kfree(buf);
193 if (st)
194 return st;
195 *ppos += cnt;
196 return cnt;
197}
198
199static ssize_t rsxx_cram_write(struct file *fp, const char __user *ubuf,
200 size_t cnt, loff_t *ppos)
201{
202 struct rsxx_cardinfo *card = file_inode(fp)->i_private;
203 char *buf;
204 ssize_t st;
205
206 buf = memdup_user(ubuf, cnt);
207 if (IS_ERR(buf))
208 return PTR_ERR(buf);
209
210 st = rsxx_creg_write(card, CREG_ADD_CRAM + (u32)*ppos, cnt, buf, 1);
211 kfree(buf);
212 if (st)
213 return st;
214 *ppos += cnt;
215 return cnt;
216}
217
218static const struct file_operations debugfs_cram_fops = {
219 .owner = THIS_MODULE,
220 .read = rsxx_cram_read,
221 .write = rsxx_cram_write,
222};
223
224static const struct file_operations debugfs_stats_fops = {
225 .owner = THIS_MODULE,
226 .open = rsxx_attr_stats_open,
227 .read = seq_read,
228 .llseek = seq_lseek,
229 .release = single_release,
230};
231
232static const struct file_operations debugfs_pci_regs_fops = {
233 .owner = THIS_MODULE,
234 .open = rsxx_attr_pci_regs_open,
235 .read = seq_read,
236 .llseek = seq_lseek,
237 .release = single_release,
238};
239
240static void rsxx_debugfs_dev_new(struct rsxx_cardinfo *card)
241{
242 struct dentry *debugfs_stats;
243 struct dentry *debugfs_pci_regs;
244 struct dentry *debugfs_cram;
245
246 card->debugfs_dir = debugfs_create_dir(card->gendisk->disk_name, NULL);
247 if (IS_ERR_OR_NULL(card->debugfs_dir))
248 goto failed_debugfs_dir;
249
250 debugfs_stats = debugfs_create_file("stats", S_IRUGO,
251 card->debugfs_dir, card,
252 &debugfs_stats_fops);
253 if (IS_ERR_OR_NULL(debugfs_stats))
254 goto failed_debugfs_stats;
255
256 debugfs_pci_regs = debugfs_create_file("pci_regs", S_IRUGO,
257 card->debugfs_dir, card,
258 &debugfs_pci_regs_fops);
259 if (IS_ERR_OR_NULL(debugfs_pci_regs))
260 goto failed_debugfs_pci_regs;
261
262 debugfs_cram = debugfs_create_file("cram", S_IRUGO | S_IWUSR,
263 card->debugfs_dir, card,
264 &debugfs_cram_fops);
265 if (IS_ERR_OR_NULL(debugfs_cram))
266 goto failed_debugfs_cram;
267
268 return;
269failed_debugfs_cram:
270 debugfs_remove(debugfs_pci_regs);
271failed_debugfs_pci_regs:
272 debugfs_remove(debugfs_stats);
273failed_debugfs_stats:
274 debugfs_remove(card->debugfs_dir);
275failed_debugfs_dir:
276 card->debugfs_dir = NULL;
277}
278
279
280
281static void rsxx_mask_interrupts(struct rsxx_cardinfo *card)
282{
283 card->isr_mask = 0;
284 card->ier_mask = 0;
285}
286
287static void __enable_intr(unsigned int *mask, unsigned int intr)
288{
289 *mask |= intr;
290}
291
292static void __disable_intr(unsigned int *mask, unsigned int intr)
293{
294 *mask &= ~intr;
295}
296
297
298
299
300
301
302
303
304void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr)
305{
306 if (unlikely(card->halt) ||
307 unlikely(card->eeh_state))
308 return;
309
310 __enable_intr(&card->ier_mask, intr);
311 iowrite32(card->ier_mask, card->regmap + IER);
312}
313
314void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr)
315{
316 if (unlikely(card->eeh_state))
317 return;
318
319 __disable_intr(&card->ier_mask, intr);
320 iowrite32(card->ier_mask, card->regmap + IER);
321}
322
323void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card,
324 unsigned int intr)
325{
326 if (unlikely(card->halt) ||
327 unlikely(card->eeh_state))
328 return;
329
330 __enable_intr(&card->isr_mask, intr);
331 __enable_intr(&card->ier_mask, intr);
332 iowrite32(card->ier_mask, card->regmap + IER);
333}
334void rsxx_disable_ier_and_isr(struct rsxx_cardinfo *card,
335 unsigned int intr)
336{
337 if (unlikely(card->eeh_state))
338 return;
339
340 __disable_intr(&card->isr_mask, intr);
341 __disable_intr(&card->ier_mask, intr);
342 iowrite32(card->ier_mask, card->regmap + IER);
343}
344
345static irqreturn_t rsxx_isr(int irq, void *pdata)
346{
347 struct rsxx_cardinfo *card = pdata;
348 unsigned int isr;
349 int handled = 0;
350 int reread_isr;
351 int i;
352
353 spin_lock(&card->irq_lock);
354
355 do {
356 reread_isr = 0;
357
358 if (unlikely(card->eeh_state))
359 break;
360
361 isr = ioread32(card->regmap + ISR);
362 if (isr == 0xffffffff) {
363
364
365
366
367
368 dev_info(CARD_TO_DEV(card),
369 "ISR = 0xFFFFFFFF, retrying later\n");
370 break;
371 }
372
373 isr &= card->isr_mask;
374 if (!isr)
375 break;
376
377 for (i = 0; i < card->n_targets; i++) {
378 if (isr & CR_INTR_DMA(i)) {
379 if (card->ier_mask & CR_INTR_DMA(i)) {
380 rsxx_disable_ier(card, CR_INTR_DMA(i));
381 reread_isr = 1;
382 }
383 queue_work(card->ctrl[i].done_wq,
384 &card->ctrl[i].dma_done_work);
385 handled++;
386 }
387 }
388
389 if (isr & CR_INTR_CREG) {
390 queue_work(card->creg_ctrl.creg_wq,
391 &card->creg_ctrl.done_work);
392 handled++;
393 }
394
395 if (isr & CR_INTR_EVENT) {
396 queue_work(card->event_wq, &card->event_work);
397 rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
398 handled++;
399 }
400 } while (reread_isr);
401
402 spin_unlock(&card->irq_lock);
403
404 return handled ? IRQ_HANDLED : IRQ_NONE;
405}
406
407
408static const char * const rsxx_card_state_to_str(unsigned int state)
409{
410 static const char * const state_strings[] = {
411 "Unknown", "Shutdown", "Starting", "Formatting",
412 "Uninitialized", "Good", "Shutting Down",
413 "Fault", "Read Only Fault", "dStroying"
414 };
415
416 return state_strings[ffs(state)];
417}
418
419static void card_state_change(struct rsxx_cardinfo *card,
420 unsigned int new_state)
421{
422 int st;
423
424 dev_info(CARD_TO_DEV(card),
425 "card state change detected.(%s -> %s)\n",
426 rsxx_card_state_to_str(card->state),
427 rsxx_card_state_to_str(new_state));
428
429 card->state = new_state;
430
431
432 if (!card->config_valid)
433 return;
434
435 switch (new_state) {
436 case CARD_STATE_RD_ONLY_FAULT:
437 dev_crit(CARD_TO_DEV(card),
438 "Hardware has entered read-only mode!\n");
439
440
441
442
443 case CARD_STATE_GOOD:
444 st = rsxx_get_card_size8(card, &card->size8);
445 if (st)
446 dev_err(CARD_TO_DEV(card),
447 "Failed attaching DMA devices\n");
448
449 if (card->config_valid)
450 set_capacity(card->gendisk, card->size8 >> 9);
451 break;
452
453 case CARD_STATE_FAULT:
454 dev_crit(CARD_TO_DEV(card),
455 "Hardware Fault reported!\n");
456
457
458
459 case CARD_STATE_SHUTDOWN:
460 case CARD_STATE_STARTING:
461 case CARD_STATE_FORMATTING:
462 case CARD_STATE_UNINITIALIZED:
463 case CARD_STATE_SHUTTING_DOWN:
464
465
466
467
468 case CARD_STATE_DSTROYING:
469 set_capacity(card->gendisk, 0);
470 break;
471 }
472}
473
474static void card_event_handler(struct work_struct *work)
475{
476 struct rsxx_cardinfo *card;
477 unsigned int state;
478 unsigned long flags;
479 int st;
480
481 card = container_of(work, struct rsxx_cardinfo, event_work);
482
483 if (unlikely(card->halt))
484 return;
485
486
487
488
489
490
491 spin_lock_irqsave(&card->irq_lock, flags);
492 rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
493 spin_unlock_irqrestore(&card->irq_lock, flags);
494
495 st = rsxx_get_card_state(card, &state);
496 if (st) {
497 dev_info(CARD_TO_DEV(card),
498 "Failed reading state after event.\n");
499 return;
500 }
501
502 if (card->state != state)
503 card_state_change(card, state);
504
505 if (card->creg_ctrl.creg_stats.stat & CREG_STAT_LOG_PENDING)
506 rsxx_read_hw_log(card);
507}
508
509
510static int card_shutdown(struct rsxx_cardinfo *card)
511{
512 unsigned int state;
513 signed long start;
514 const int timeout = msecs_to_jiffies(120000);
515 int st;
516
517
518 start = jiffies;
519 do {
520 st = rsxx_get_card_state(card, &state);
521 if (st)
522 return st;
523 } while (state == CARD_STATE_STARTING &&
524 (jiffies - start < timeout));
525
526 if (state == CARD_STATE_STARTING)
527 return -ETIMEDOUT;
528
529
530 if ((state != CARD_STATE_SHUTTING_DOWN) &&
531 (state != CARD_STATE_SHUTDOWN)) {
532 st = rsxx_issue_card_cmd(card, CARD_CMD_SHUTDOWN);
533 if (st)
534 return st;
535 }
536
537 start = jiffies;
538 do {
539 st = rsxx_get_card_state(card, &state);
540 if (st)
541 return st;
542 } while (state != CARD_STATE_SHUTDOWN &&
543 (jiffies - start < timeout));
544
545 if (state != CARD_STATE_SHUTDOWN)
546 return -ETIMEDOUT;
547
548 return 0;
549}
550
551static int rsxx_eeh_frozen(struct pci_dev *dev)
552{
553 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
554 int i;
555 int st;
556
557 dev_warn(&dev->dev, "IBM Flash Adapter PCI: preparing for slot reset.\n");
558
559 card->eeh_state = 1;
560 rsxx_mask_interrupts(card);
561
562
563
564
565
566
567 wmb();
568
569 pci_disable_device(dev);
570
571 st = rsxx_eeh_save_issued_dmas(card);
572 if (st)
573 return st;
574
575 rsxx_eeh_save_issued_creg(card);
576
577 for (i = 0; i < card->n_targets; i++) {
578 if (card->ctrl[i].status.buf)
579 pci_free_consistent(card->dev, STATUS_BUFFER_SIZE8,
580 card->ctrl[i].status.buf,
581 card->ctrl[i].status.dma_addr);
582 if (card->ctrl[i].cmd.buf)
583 pci_free_consistent(card->dev, COMMAND_BUFFER_SIZE8,
584 card->ctrl[i].cmd.buf,
585 card->ctrl[i].cmd.dma_addr);
586 }
587
588 return 0;
589}
590
591static void rsxx_eeh_failure(struct pci_dev *dev)
592{
593 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
594 int i;
595 int cnt = 0;
596
597 dev_err(&dev->dev, "IBM Flash Adapter PCI: disabling failed card.\n");
598
599 card->eeh_state = 1;
600 card->halt = 1;
601
602 for (i = 0; i < card->n_targets; i++) {
603 spin_lock_bh(&card->ctrl[i].queue_lock);
604 cnt = rsxx_cleanup_dma_queue(&card->ctrl[i],
605 &card->ctrl[i].queue,
606 COMPLETE_DMA);
607 spin_unlock_bh(&card->ctrl[i].queue_lock);
608
609 cnt += rsxx_dma_cancel(&card->ctrl[i]);
610
611 if (cnt)
612 dev_info(CARD_TO_DEV(card),
613 "Freed %d queued DMAs on channel %d\n",
614 cnt, card->ctrl[i].id);
615 }
616}
617
618static int rsxx_eeh_fifo_flush_poll(struct rsxx_cardinfo *card)
619{
620 unsigned int status;
621 int iter = 0;
622
623
624 while (iter++ < 10) {
625 status = ioread32(card->regmap + PCI_RECONFIG);
626
627 if (status & RSXX_FLUSH_BUSY) {
628 ssleep(1);
629 continue;
630 }
631
632 if (status & RSXX_FLUSH_TIMEOUT)
633 dev_warn(CARD_TO_DEV(card), "HW: flash controller timeout\n");
634 return 0;
635 }
636
637
638 return -1;
639}
640
641static pci_ers_result_t rsxx_error_detected(struct pci_dev *dev,
642 enum pci_channel_state error)
643{
644 int st;
645
646 if (dev->revision < RSXX_EEH_SUPPORT)
647 return PCI_ERS_RESULT_NONE;
648
649 if (error == pci_channel_io_perm_failure) {
650 rsxx_eeh_failure(dev);
651 return PCI_ERS_RESULT_DISCONNECT;
652 }
653
654 st = rsxx_eeh_frozen(dev);
655 if (st) {
656 dev_err(&dev->dev, "Slot reset setup failed\n");
657 rsxx_eeh_failure(dev);
658 return PCI_ERS_RESULT_DISCONNECT;
659 }
660
661 return PCI_ERS_RESULT_NEED_RESET;
662}
663
664static pci_ers_result_t rsxx_slot_reset(struct pci_dev *dev)
665{
666 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
667 unsigned long flags;
668 int i;
669 int st;
670
671 dev_warn(&dev->dev,
672 "IBM Flash Adapter PCI: recovering from slot reset.\n");
673
674 st = pci_enable_device(dev);
675 if (st)
676 goto failed_hw_setup;
677
678 pci_set_master(dev);
679
680 st = rsxx_eeh_fifo_flush_poll(card);
681 if (st)
682 goto failed_hw_setup;
683
684 rsxx_dma_queue_reset(card);
685
686 for (i = 0; i < card->n_targets; i++) {
687 st = rsxx_hw_buffers_init(dev, &card->ctrl[i]);
688 if (st)
689 goto failed_hw_buffers_init;
690 }
691
692 if (card->config_valid)
693 rsxx_dma_configure(card);
694
695
696 st = ioread32(card->regmap + ISR);
697
698 card->eeh_state = 0;
699
700 spin_lock_irqsave(&card->irq_lock, flags);
701 if (card->n_targets & RSXX_MAX_TARGETS)
702 rsxx_enable_ier_and_isr(card, CR_INTR_ALL_G);
703 else
704 rsxx_enable_ier_and_isr(card, CR_INTR_ALL_C);
705 spin_unlock_irqrestore(&card->irq_lock, flags);
706
707 rsxx_kick_creg_queue(card);
708
709 for (i = 0; i < card->n_targets; i++) {
710 spin_lock(&card->ctrl[i].queue_lock);
711 if (list_empty(&card->ctrl[i].queue)) {
712 spin_unlock(&card->ctrl[i].queue_lock);
713 continue;
714 }
715 spin_unlock(&card->ctrl[i].queue_lock);
716
717 queue_work(card->ctrl[i].issue_wq,
718 &card->ctrl[i].issue_dma_work);
719 }
720
721 dev_info(&dev->dev, "IBM Flash Adapter PCI: recovery complete.\n");
722
723 return PCI_ERS_RESULT_RECOVERED;
724
725failed_hw_buffers_init:
726 for (i = 0; i < card->n_targets; i++) {
727 if (card->ctrl[i].status.buf)
728 pci_free_consistent(card->dev,
729 STATUS_BUFFER_SIZE8,
730 card->ctrl[i].status.buf,
731 card->ctrl[i].status.dma_addr);
732 if (card->ctrl[i].cmd.buf)
733 pci_free_consistent(card->dev,
734 COMMAND_BUFFER_SIZE8,
735 card->ctrl[i].cmd.buf,
736 card->ctrl[i].cmd.dma_addr);
737 }
738failed_hw_setup:
739 rsxx_eeh_failure(dev);
740 return PCI_ERS_RESULT_DISCONNECT;
741
742}
743
744
745
746
747static int rsxx_compatibility_check(struct rsxx_cardinfo *card)
748{
749 unsigned char pci_rev;
750
751 pci_read_config_byte(card->dev, PCI_REVISION_ID, &pci_rev);
752
753 if (pci_rev > RS70_PCI_REV_SUPPORTED)
754 return -1;
755 return 0;
756}
757
758static int rsxx_pci_probe(struct pci_dev *dev,
759 const struct pci_device_id *id)
760{
761 struct rsxx_cardinfo *card;
762 int st;
763 unsigned int sync_timeout;
764
765 dev_info(&dev->dev, "PCI-Flash SSD discovered\n");
766
767 card = kzalloc(sizeof(*card), GFP_KERNEL);
768 if (!card)
769 return -ENOMEM;
770
771 card->dev = dev;
772 pci_set_drvdata(dev, card);
773
774 do {
775 if (!ida_pre_get(&rsxx_disk_ida, GFP_KERNEL)) {
776 st = -ENOMEM;
777 goto failed_ida_get;
778 }
779
780 spin_lock(&rsxx_ida_lock);
781 st = ida_get_new(&rsxx_disk_ida, &card->disk_id);
782 spin_unlock(&rsxx_ida_lock);
783 } while (st == -EAGAIN);
784
785 if (st)
786 goto failed_ida_get;
787
788 st = pci_enable_device(dev);
789 if (st)
790 goto failed_enable;
791
792 pci_set_master(dev);
793 pci_set_dma_max_seg_size(dev, RSXX_HW_BLK_SIZE);
794
795 st = pci_set_dma_mask(dev, DMA_BIT_MASK(64));
796 if (st) {
797 dev_err(CARD_TO_DEV(card),
798 "No usable DMA configuration,aborting\n");
799 goto failed_dma_mask;
800 }
801
802 st = pci_request_regions(dev, DRIVER_NAME);
803 if (st) {
804 dev_err(CARD_TO_DEV(card),
805 "Failed to request memory region\n");
806 goto failed_request_regions;
807 }
808
809 if (pci_resource_len(dev, 0) == 0) {
810 dev_err(CARD_TO_DEV(card), "BAR0 has length 0!\n");
811 st = -ENOMEM;
812 goto failed_iomap;
813 }
814
815 card->regmap = pci_iomap(dev, 0, 0);
816 if (!card->regmap) {
817 dev_err(CARD_TO_DEV(card), "Failed to map BAR0\n");
818 st = -ENOMEM;
819 goto failed_iomap;
820 }
821
822 spin_lock_init(&card->irq_lock);
823 card->halt = 0;
824 card->eeh_state = 0;
825
826 spin_lock_irq(&card->irq_lock);
827 rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
828 spin_unlock_irq(&card->irq_lock);
829
830 if (!force_legacy) {
831 st = pci_enable_msi(dev);
832 if (st)
833 dev_warn(CARD_TO_DEV(card),
834 "Failed to enable MSI\n");
835 }
836
837 st = request_irq(dev->irq, rsxx_isr, IRQF_SHARED,
838 DRIVER_NAME, card);
839 if (st) {
840 dev_err(CARD_TO_DEV(card),
841 "Failed requesting IRQ%d\n", dev->irq);
842 goto failed_irq;
843 }
844
845
846 st = rsxx_creg_setup(card);
847 if (st) {
848 dev_err(CARD_TO_DEV(card), "Failed to setup creg interface.\n");
849 goto failed_creg_setup;
850 }
851
852 spin_lock_irq(&card->irq_lock);
853 rsxx_enable_ier_and_isr(card, CR_INTR_CREG);
854 spin_unlock_irq(&card->irq_lock);
855
856 st = rsxx_compatibility_check(card);
857 if (st) {
858 dev_warn(CARD_TO_DEV(card),
859 "Incompatible driver detected. Please update the driver.\n");
860 st = -EINVAL;
861 goto failed_compatiblity_check;
862 }
863
864
865 st = rsxx_load_config(card);
866 if (st)
867 dev_err(CARD_TO_DEV(card),
868 "Failed loading card config\n");
869
870
871 st = rsxx_get_num_targets(card, &card->n_targets);
872 if (st)
873 dev_info(CARD_TO_DEV(card),
874 "Failed reading the number of DMA targets\n");
875
876 card->ctrl = kzalloc(card->n_targets * sizeof(*card->ctrl), GFP_KERNEL);
877 if (!card->ctrl) {
878 st = -ENOMEM;
879 goto failed_dma_setup;
880 }
881
882 st = rsxx_dma_setup(card);
883 if (st) {
884 dev_info(CARD_TO_DEV(card),
885 "Failed to setup DMA engine\n");
886 goto failed_dma_setup;
887 }
888
889
890 card->event_wq = create_singlethread_workqueue(DRIVER_NAME"_event");
891 if (!card->event_wq) {
892 dev_err(CARD_TO_DEV(card), "Failed card event setup.\n");
893 goto failed_event_handler;
894 }
895
896 INIT_WORK(&card->event_work, card_event_handler);
897
898 st = rsxx_setup_dev(card);
899 if (st)
900 goto failed_create_dev;
901
902 rsxx_get_card_state(card, &card->state);
903
904 dev_info(CARD_TO_DEV(card),
905 "card state: %s\n",
906 rsxx_card_state_to_str(card->state));
907
908
909
910
911
912
913 spin_lock_irq(&card->irq_lock);
914 rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
915 spin_unlock_irq(&card->irq_lock);
916
917 if (card->state == CARD_STATE_SHUTDOWN) {
918 st = rsxx_issue_card_cmd(card, CARD_CMD_STARTUP);
919 if (st)
920 dev_crit(CARD_TO_DEV(card),
921 "Failed issuing card startup\n");
922 if (sync_start) {
923 sync_timeout = SYNC_START_TIMEOUT;
924
925 dev_info(CARD_TO_DEV(card),
926 "Waiting for card to startup\n");
927
928 do {
929 ssleep(1);
930 sync_timeout--;
931
932 rsxx_get_card_state(card, &card->state);
933 } while (sync_timeout &&
934 (card->state == CARD_STATE_STARTING));
935
936 if (card->state == CARD_STATE_STARTING) {
937 dev_warn(CARD_TO_DEV(card),
938 "Card startup timed out\n");
939 card->size8 = 0;
940 } else {
941 dev_info(CARD_TO_DEV(card),
942 "card state: %s\n",
943 rsxx_card_state_to_str(card->state));
944 st = rsxx_get_card_size8(card, &card->size8);
945 if (st)
946 card->size8 = 0;
947 }
948 }
949 } else if (card->state == CARD_STATE_GOOD ||
950 card->state == CARD_STATE_RD_ONLY_FAULT) {
951 st = rsxx_get_card_size8(card, &card->size8);
952 if (st)
953 card->size8 = 0;
954 }
955
956 rsxx_attach_dev(card);
957
958
959 rsxx_debugfs_dev_new(card);
960
961 return 0;
962
963failed_create_dev:
964 destroy_workqueue(card->event_wq);
965 card->event_wq = NULL;
966failed_event_handler:
967 rsxx_dma_destroy(card);
968failed_dma_setup:
969failed_compatiblity_check:
970 destroy_workqueue(card->creg_ctrl.creg_wq);
971 card->creg_ctrl.creg_wq = NULL;
972failed_creg_setup:
973 spin_lock_irq(&card->irq_lock);
974 rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
975 spin_unlock_irq(&card->irq_lock);
976 free_irq(dev->irq, card);
977 if (!force_legacy)
978 pci_disable_msi(dev);
979failed_irq:
980 pci_iounmap(dev, card->regmap);
981failed_iomap:
982 pci_release_regions(dev);
983failed_request_regions:
984failed_dma_mask:
985 pci_disable_device(dev);
986failed_enable:
987 spin_lock(&rsxx_ida_lock);
988 ida_remove(&rsxx_disk_ida, card->disk_id);
989 spin_unlock(&rsxx_ida_lock);
990failed_ida_get:
991 kfree(card);
992
993 return st;
994}
995
996static void rsxx_pci_remove(struct pci_dev *dev)
997{
998 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
999 unsigned long flags;
1000 int st;
1001 int i;
1002
1003 if (!card)
1004 return;
1005
1006 dev_info(CARD_TO_DEV(card),
1007 "Removing PCI-Flash SSD.\n");
1008
1009 rsxx_detach_dev(card);
1010
1011 for (i = 0; i < card->n_targets; i++) {
1012 spin_lock_irqsave(&card->irq_lock, flags);
1013 rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
1014 spin_unlock_irqrestore(&card->irq_lock, flags);
1015 }
1016
1017 st = card_shutdown(card);
1018 if (st)
1019 dev_crit(CARD_TO_DEV(card), "Shutdown failed!\n");
1020
1021
1022 spin_lock_irqsave(&card->irq_lock, flags);
1023 rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
1024 spin_unlock_irqrestore(&card->irq_lock, flags);
1025
1026 cancel_work_sync(&card->event_work);
1027
1028 rsxx_destroy_dev(card);
1029 rsxx_dma_destroy(card);
1030
1031 spin_lock_irqsave(&card->irq_lock, flags);
1032 rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
1033 spin_unlock_irqrestore(&card->irq_lock, flags);
1034
1035
1036 card->halt = 1;
1037
1038 debugfs_remove_recursive(card->debugfs_dir);
1039
1040 free_irq(dev->irq, card);
1041
1042 if (!force_legacy)
1043 pci_disable_msi(dev);
1044
1045 rsxx_creg_destroy(card);
1046
1047 pci_iounmap(dev, card->regmap);
1048
1049 pci_disable_device(dev);
1050 pci_release_regions(dev);
1051
1052 kfree(card);
1053}
1054
1055static int rsxx_pci_suspend(struct pci_dev *dev, pm_message_t state)
1056{
1057
1058 return -ENOSYS;
1059}
1060
1061static void rsxx_pci_shutdown(struct pci_dev *dev)
1062{
1063 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
1064 unsigned long flags;
1065 int i;
1066
1067 if (!card)
1068 return;
1069
1070 dev_info(CARD_TO_DEV(card), "Shutting down PCI-Flash SSD.\n");
1071
1072 rsxx_detach_dev(card);
1073
1074 for (i = 0; i < card->n_targets; i++) {
1075 spin_lock_irqsave(&card->irq_lock, flags);
1076 rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
1077 spin_unlock_irqrestore(&card->irq_lock, flags);
1078 }
1079
1080 card_shutdown(card);
1081}
1082
1083static const struct pci_error_handlers rsxx_err_handler = {
1084 .error_detected = rsxx_error_detected,
1085 .slot_reset = rsxx_slot_reset,
1086};
1087
1088static const struct pci_device_id rsxx_pci_ids[] = {
1089 {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS70_FLASH)},
1090 {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS80_FLASH)},
1091 {0,},
1092};
1093
1094MODULE_DEVICE_TABLE(pci, rsxx_pci_ids);
1095
1096static struct pci_driver rsxx_pci_driver = {
1097 .name = DRIVER_NAME,
1098 .id_table = rsxx_pci_ids,
1099 .probe = rsxx_pci_probe,
1100 .remove = rsxx_pci_remove,
1101 .suspend = rsxx_pci_suspend,
1102 .shutdown = rsxx_pci_shutdown,
1103 .err_handler = &rsxx_err_handler,
1104};
1105
1106static int __init rsxx_core_init(void)
1107{
1108 int st;
1109
1110 st = rsxx_dev_init();
1111 if (st)
1112 return st;
1113
1114 st = rsxx_dma_init();
1115 if (st)
1116 goto dma_init_failed;
1117
1118 st = rsxx_creg_init();
1119 if (st)
1120 goto creg_init_failed;
1121
1122 return pci_register_driver(&rsxx_pci_driver);
1123
1124creg_init_failed:
1125 rsxx_dma_cleanup();
1126dma_init_failed:
1127 rsxx_dev_cleanup();
1128
1129 return st;
1130}
1131
1132static void __exit rsxx_core_cleanup(void)
1133{
1134 pci_unregister_driver(&rsxx_pci_driver);
1135 rsxx_creg_cleanup();
1136 rsxx_dma_cleanup();
1137 rsxx_dev_cleanup();
1138}
1139
1140module_init(rsxx_core_init);
1141module_exit(rsxx_core_cleanup);
1142
