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24#ifndef __AMDGPU_VCE_H__
25#define __AMDGPU_VCE_H__
26
27#define AMDGPU_MAX_VCE_HANDLES 16
28#define AMDGPU_VCE_FIRMWARE_OFFSET 256
29
30#define AMDGPU_VCE_HARVEST_VCE0 (1 << 0)
31#define AMDGPU_VCE_HARVEST_VCE1 (1 << 1)
32
33struct amdgpu_vce {
34 struct amdgpu_bo *vcpu_bo;
35 uint64_t gpu_addr;
36 void *cpu_addr;
37 void *saved_bo;
38 unsigned fw_version;
39 unsigned fb_version;
40 atomic_t handles[AMDGPU_MAX_VCE_HANDLES];
41 struct drm_file *filp[AMDGPU_MAX_VCE_HANDLES];
42 uint32_t img_size[AMDGPU_MAX_VCE_HANDLES];
43 struct delayed_work idle_work;
44 struct mutex idle_mutex;
45 const struct firmware *fw;
46 struct amdgpu_ring ring[AMDGPU_MAX_VCE_RINGS];
47 struct amdgpu_irq_src irq;
48 unsigned harvest_config;
49 struct amd_sched_entity entity;
50 uint32_t srbm_soft_reset;
51 unsigned num_rings;
52};
53
54int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size);
55int amdgpu_vce_sw_fini(struct amdgpu_device *adev);
56int amdgpu_vce_suspend(struct amdgpu_device *adev);
57int amdgpu_vce_resume(struct amdgpu_device *adev);
58int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
59 struct dma_fence **fence);
60int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
61 bool direct, struct dma_fence **fence);
62void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp);
63int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx);
64int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p, uint32_t ib_idx);
65void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib,
66 unsigned vm_id, bool ctx_switch);
67void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
68 unsigned flags);
69int amdgpu_vce_ring_test_ring(struct amdgpu_ring *ring);
70int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring, long timeout);
71void amdgpu_vce_ring_begin_use(struct amdgpu_ring *ring);
72void amdgpu_vce_ring_end_use(struct amdgpu_ring *ring);
73unsigned amdgpu_vce_ring_get_emit_ib_size(struct amdgpu_ring *ring);
74unsigned amdgpu_vce_ring_get_dma_frame_size(struct amdgpu_ring *ring);
75
76#endif
77