LXR linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c

   1/*
   2 * Copyright 2016 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24#include "gk104.h"
  25#include "changk104.h"
  26
  27const struct nvkm_enum
  28gm107_fifo_fault_engine[] = {
  29        { 0x01, "DISPLAY" },
  30        { 0x02, "CAPTURE" },
  31        { 0x03, "IFB", NULL, NVKM_ENGINE_IFB },
  32        { 0x04, "BAR1", NULL, NVKM_SUBDEV_BAR },
  33        { 0x05, "BAR2", NULL, NVKM_SUBDEV_INSTMEM },
  34        { 0x06, "SCHED" },
  35        { 0x07, "HOST0", NULL, NVKM_ENGINE_FIFO },
  36        { 0x08, "HOST1", NULL, NVKM_ENGINE_FIFO },
  37        { 0x09, "HOST2", NULL, NVKM_ENGINE_FIFO },
  38        { 0x0a, "HOST3", NULL, NVKM_ENGINE_FIFO },
  39        { 0x0b, "HOST4", NULL, NVKM_ENGINE_FIFO },
  40        { 0x0c, "HOST5", NULL, NVKM_ENGINE_FIFO },
  41        { 0x0d, "HOST6", NULL, NVKM_ENGINE_FIFO },
  42        { 0x0e, "HOST7", NULL, NVKM_ENGINE_FIFO },
  43        { 0x0f, "HOSTSR" },
  44        { 0x13, "PERF" },
  45        { 0x17, "PMU" },
  46        { 0x18, "PTP" },
  47        {}
  48};
  49
  50static const struct gk104_fifo_func
  51gm107_fifo = {
  52        .fault.engine = gm107_fifo_fault_engine,
  53        .fault.reason = gk104_fifo_fault_reason,
  54        .fault.hubclient = gk104_fifo_fault_hubclient,
  55        .fault.gpcclient = gk104_fifo_fault_gpcclient,
  56        .chan = {
  57                &gk110_fifo_gpfifo_oclass,
  58                NULL
  59        },
  60};
  61
  62int
  63gm107_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
  64{
  65        return gk104_fifo_new_(&gm107_fifo, device, index, 2048, pfifo);
  66}
  67