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20#include <linux/bitops.h>
21#include <linux/err.h>
22#include <linux/i2c.h>
23#include <linux/init.h>
24#include <linux/jiffies.h>
25#include <linux/hwmon.h>
26#include <linux/module.h>
27#include <linux/mutex.h>
28#include <linux/slab.h>
29
30#define DEVNAME "lm95241"
31
32static const unsigned short normal_i2c[] = {
33 0x19, 0x2a, 0x2b, I2C_CLIENT_END };
34
35
36#define LM95241_REG_R_MAN_ID 0xFE
37#define LM95241_REG_R_CHIP_ID 0xFF
38#define LM95241_REG_R_STATUS 0x02
39#define LM95241_REG_RW_CONFIG 0x03
40#define LM95241_REG_RW_REM_FILTER 0x06
41#define LM95241_REG_RW_TRUTHERM 0x07
42#define LM95241_REG_W_ONE_SHOT 0x0F
43#define LM95241_REG_R_LOCAL_TEMPH 0x10
44#define LM95241_REG_R_REMOTE1_TEMPH 0x11
45#define LM95241_REG_R_REMOTE2_TEMPH 0x12
46#define LM95241_REG_R_LOCAL_TEMPL 0x20
47#define LM95241_REG_R_REMOTE1_TEMPL 0x21
48#define LM95241_REG_R_REMOTE2_TEMPL 0x22
49#define LM95241_REG_RW_REMOTE_MODEL 0x30
50
51
52#define CFG_STOP BIT(6)
53#define CFG_CR0076 0x00
54#define CFG_CR0182 BIT(4)
55#define CFG_CR1000 BIT(5)
56#define CFG_CR2700 (BIT(4) | BIT(5))
57#define CFG_CRMASK (BIT(4) | BIT(5))
58#define R1MS_MASK BIT(0)
59#define R2MS_MASK BIT(2)
60#define R1DF_MASK BIT(1)
61#define R2DF_MASK BIT(2)
62#define R1FE_MASK BIT(0)
63#define R2FE_MASK BIT(2)
64#define R1DM BIT(0)
65#define R2DM BIT(1)
66#define TT1_SHIFT 0
67#define TT2_SHIFT 4
68#define TT_OFF 0
69#define TT_ON 1
70#define TT_MASK 7
71#define NATSEMI_MAN_ID 0x01
72#define LM95231_CHIP_ID 0xA1
73#define LM95241_CHIP_ID 0xA4
74
75static const u8 lm95241_reg_address[] = {
76 LM95241_REG_R_LOCAL_TEMPH,
77 LM95241_REG_R_LOCAL_TEMPL,
78 LM95241_REG_R_REMOTE1_TEMPH,
79 LM95241_REG_R_REMOTE1_TEMPL,
80 LM95241_REG_R_REMOTE2_TEMPH,
81 LM95241_REG_R_REMOTE2_TEMPL
82};
83
84
85struct lm95241_data {
86 struct i2c_client *client;
87 struct mutex update_lock;
88 unsigned long last_updated;
89 unsigned long interval;
90 char valid;
91
92 u8 temp[ARRAY_SIZE(lm95241_reg_address)];
93 u8 status, config, model, trutherm;
94};
95
96
97static int temp_from_reg_signed(u8 val_h, u8 val_l)
98{
99 s16 val_hl = (val_h << 8) | val_l;
100 return val_hl * 1000 / 256;
101}
102
103static int temp_from_reg_unsigned(u8 val_h, u8 val_l)
104{
105 u16 val_hl = (val_h << 8) | val_l;
106 return val_hl * 1000 / 256;
107}
108
109static struct lm95241_data *lm95241_update_device(struct device *dev)
110{
111 struct lm95241_data *data = dev_get_drvdata(dev);
112 struct i2c_client *client = data->client;
113
114 mutex_lock(&data->update_lock);
115
116 if (time_after(jiffies, data->last_updated
117 + msecs_to_jiffies(data->interval)) ||
118 !data->valid) {
119 int i;
120
121 dev_dbg(dev, "Updating lm95241 data.\n");
122 for (i = 0; i < ARRAY_SIZE(lm95241_reg_address); i++)
123 data->temp[i]
124 = i2c_smbus_read_byte_data(client,
125 lm95241_reg_address[i]);
126
127 data->status = i2c_smbus_read_byte_data(client,
128 LM95241_REG_R_STATUS);
129 data->last_updated = jiffies;
130 data->valid = 1;
131 }
132
133 mutex_unlock(&data->update_lock);
134
135 return data;
136}
137
138static int lm95241_read_chip(struct device *dev, u32 attr, int channel,
139 long *val)
140{
141 struct lm95241_data *data = dev_get_drvdata(dev);
142
143 switch (attr) {
144 case hwmon_chip_update_interval:
145 *val = data->interval;
146 return 0;
147 default:
148 return -EOPNOTSUPP;
149 }
150}
151
152static int lm95241_read_temp(struct device *dev, u32 attr, int channel,
153 long *val)
154{
155 struct lm95241_data *data = lm95241_update_device(dev);
156
157 switch (attr) {
158 case hwmon_temp_input:
159 if (!channel || (data->config & BIT(channel - 1)))
160 *val = temp_from_reg_signed(data->temp[channel * 2],
161 data->temp[channel * 2 + 1]);
162 else
163 *val = temp_from_reg_unsigned(data->temp[channel * 2],
164 data->temp[channel * 2 + 1]);
165 return 0;
166 case hwmon_temp_min:
167 if (channel == 1)
168 *val = (data->config & R1DF_MASK) ? -128000 : 0;
169 else
170 *val = (data->config & R2DF_MASK) ? -128000 : 0;
171 return 0;
172 case hwmon_temp_max:
173 if (channel == 1)
174 *val = (data->config & R1DF_MASK) ? 127875 : 255875;
175 else
176 *val = (data->config & R2DF_MASK) ? 127875 : 255875;
177 return 0;
178 case hwmon_temp_type:
179 if (channel == 1)
180 *val = (data->model & R1MS_MASK) ? 1 : 2;
181 else
182 *val = (data->model & R2MS_MASK) ? 1 : 2;
183 return 0;
184 case hwmon_temp_fault:
185 if (channel == 1)
186 *val = !!(data->status & R1DM);
187 else
188 *val = !!(data->status & R2DM);
189 return 0;
190 default:
191 return -EOPNOTSUPP;
192 }
193}
194
195static int lm95241_read(struct device *dev, enum hwmon_sensor_types type,
196 u32 attr, int channel, long *val)
197{
198 switch (type) {
199 case hwmon_chip:
200 return lm95241_read_chip(dev, attr, channel, val);
201 case hwmon_temp:
202 return lm95241_read_temp(dev, attr, channel, val);
203 default:
204 return -EOPNOTSUPP;
205 }
206}
207
208static int lm95241_write_chip(struct device *dev, u32 attr, int channel,
209 long val)
210{
211 struct lm95241_data *data = dev_get_drvdata(dev);
212 int convrate;
213 u8 config;
214 int ret;
215
216 mutex_lock(&data->update_lock);
217
218 switch (attr) {
219 case hwmon_chip_update_interval:
220 config = data->config & ~CFG_CRMASK;
221 if (val < 130) {
222 convrate = 76;
223 config |= CFG_CR0076;
224 } else if (val < 590) {
225 convrate = 182;
226 config |= CFG_CR0182;
227 } else if (val < 1850) {
228 convrate = 1000;
229 config |= CFG_CR1000;
230 } else {
231 convrate = 2700;
232 config |= CFG_CR2700;
233 }
234 data->interval = convrate;
235 data->config = config;
236 ret = i2c_smbus_write_byte_data(data->client,
237 LM95241_REG_RW_CONFIG, config);
238 break;
239 default:
240 ret = -EOPNOTSUPP;
241 break;
242 }
243 mutex_unlock(&data->update_lock);
244 return ret;
245}
246
247static int lm95241_write_temp(struct device *dev, u32 attr, int channel,
248 long val)
249{
250 struct lm95241_data *data = dev_get_drvdata(dev);
251 struct i2c_client *client = data->client;
252 int ret;
253
254 mutex_lock(&data->update_lock);
255
256 switch (attr) {
257 case hwmon_temp_min:
258 if (channel == 1) {
259 if (val < 0)
260 data->config |= R1DF_MASK;
261 else
262 data->config &= ~R1DF_MASK;
263 } else {
264 if (val < 0)
265 data->config |= R2DF_MASK;
266 else
267 data->config &= ~R2DF_MASK;
268 }
269 data->valid = 0;
270 ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG,
271 data->config);
272 break;
273 case hwmon_temp_max:
274 if (channel == 1) {
275 if (val <= 127875)
276 data->config |= R1DF_MASK;
277 else
278 data->config &= ~R1DF_MASK;
279 } else {
280 if (val <= 127875)
281 data->config |= R2DF_MASK;
282 else
283 data->config &= ~R2DF_MASK;
284 }
285 data->valid = 0;
286 ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG,
287 data->config);
288 break;
289 case hwmon_temp_type:
290 if (val != 1 && val != 2) {
291 ret = -EINVAL;
292 break;
293 }
294 if (channel == 1) {
295 data->trutherm &= ~(TT_MASK << TT1_SHIFT);
296 if (val == 1) {
297 data->model |= R1MS_MASK;
298 data->trutherm |= (TT_ON << TT1_SHIFT);
299 } else {
300 data->model &= ~R1MS_MASK;
301 data->trutherm |= (TT_OFF << TT1_SHIFT);
302 }
303 } else {
304 data->trutherm &= ~(TT_MASK << TT2_SHIFT);
305 if (val == 1) {
306 data->model |= R2MS_MASK;
307 data->trutherm |= (TT_ON << TT2_SHIFT);
308 } else {
309 data->model &= ~R2MS_MASK;
310 data->trutherm |= (TT_OFF << TT2_SHIFT);
311 }
312 }
313 ret = i2c_smbus_write_byte_data(client,
314 LM95241_REG_RW_REMOTE_MODEL,
315 data->model);
316 if (ret < 0)
317 break;
318 ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM,
319 data->trutherm);
320 break;
321 default:
322 ret = -EOPNOTSUPP;
323 break;
324 }
325
326 mutex_unlock(&data->update_lock);
327
328 return ret;
329}
330
331static int lm95241_write(struct device *dev, enum hwmon_sensor_types type,
332 u32 attr, int channel, long val)
333{
334 switch (type) {
335 case hwmon_chip:
336 return lm95241_write_chip(dev, attr, channel, val);
337 case hwmon_temp:
338 return lm95241_write_temp(dev, attr, channel, val);
339 default:
340 return -EOPNOTSUPP;
341 }
342}
343
344static umode_t lm95241_is_visible(const void *data,
345 enum hwmon_sensor_types type,
346 u32 attr, int channel)
347{
348 switch (type) {
349 case hwmon_chip:
350 switch (attr) {
351 case hwmon_chip_update_interval:
352 return S_IRUGO | S_IWUSR;
353 }
354 break;
355 case hwmon_temp:
356 switch (attr) {
357 case hwmon_temp_input:
358 return S_IRUGO;
359 case hwmon_temp_fault:
360 return S_IRUGO;
361 case hwmon_temp_min:
362 case hwmon_temp_max:
363 case hwmon_temp_type:
364 return S_IRUGO | S_IWUSR;
365 }
366 break;
367 default:
368 break;
369 }
370 return 0;
371}
372
373
374static int lm95241_detect(struct i2c_client *new_client,
375 struct i2c_board_info *info)
376{
377 struct i2c_adapter *adapter = new_client->adapter;
378 const char *name;
379 int mfg_id, chip_id;
380
381 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
382 return -ENODEV;
383
384 mfg_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_MAN_ID);
385 if (mfg_id != NATSEMI_MAN_ID)
386 return -ENODEV;
387
388 chip_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_CHIP_ID);
389 switch (chip_id) {
390 case LM95231_CHIP_ID:
391 name = "lm95231";
392 break;
393 case LM95241_CHIP_ID:
394 name = "lm95241";
395 break;
396 default:
397 return -ENODEV;
398 }
399
400
401 strlcpy(info->type, name, I2C_NAME_SIZE);
402 return 0;
403}
404
405static void lm95241_init_client(struct i2c_client *client,
406 struct lm95241_data *data)
407{
408 data->interval = 1000;
409 data->config = CFG_CR1000;
410 data->trutherm = (TT_OFF << TT1_SHIFT) | (TT_OFF << TT2_SHIFT);
411
412 i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG, data->config);
413 i2c_smbus_write_byte_data(client, LM95241_REG_RW_REM_FILTER,
414 R1FE_MASK | R2FE_MASK);
415 i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM,
416 data->trutherm);
417 i2c_smbus_write_byte_data(client, LM95241_REG_RW_REMOTE_MODEL,
418 data->model);
419}
420
421static const u32 lm95241_chip_config[] = {
422 HWMON_C_UPDATE_INTERVAL,
423 0
424};
425
426static const struct hwmon_channel_info lm95241_chip = {
427 .type = hwmon_chip,
428 .config = lm95241_chip_config,
429};
430
431static const u32 lm95241_temp_config[] = {
432 HWMON_T_INPUT,
433 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN | HWMON_T_TYPE |
434 HWMON_T_FAULT,
435 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN | HWMON_T_TYPE |
436 HWMON_T_FAULT,
437 0
438};
439
440static const struct hwmon_channel_info lm95241_temp = {
441 .type = hwmon_temp,
442 .config = lm95241_temp_config,
443};
444
445static const struct hwmon_channel_info *lm95241_info[] = {
446 &lm95241_chip,
447 &lm95241_temp,
448 NULL
449};
450
451static const struct hwmon_ops lm95241_hwmon_ops = {
452 .is_visible = lm95241_is_visible,
453 .read = lm95241_read,
454 .write = lm95241_write,
455};
456
457static const struct hwmon_chip_info lm95241_chip_info = {
458 .ops = &lm95241_hwmon_ops,
459 .info = lm95241_info,
460};
461
462static int lm95241_probe(struct i2c_client *client,
463 const struct i2c_device_id *id)
464{
465 struct device *dev = &client->dev;
466 struct lm95241_data *data;
467 struct device *hwmon_dev;
468
469 data = devm_kzalloc(dev, sizeof(struct lm95241_data), GFP_KERNEL);
470 if (!data)
471 return -ENOMEM;
472
473 data->client = client;
474 mutex_init(&data->update_lock);
475
476
477 lm95241_init_client(client, data);
478
479 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
480 data,
481 &lm95241_chip_info,
482 NULL);
483 return PTR_ERR_OR_ZERO(hwmon_dev);
484}
485
486
487static const struct i2c_device_id lm95241_id[] = {
488 { "lm95231", 0 },
489 { "lm95241", 0 },
490 { }
491};
492MODULE_DEVICE_TABLE(i2c, lm95241_id);
493
494static struct i2c_driver lm95241_driver = {
495 .class = I2C_CLASS_HWMON,
496 .driver = {
497 .name = DEVNAME,
498 },
499 .probe = lm95241_probe,
500 .id_table = lm95241_id,
501 .detect = lm95241_detect,
502 .address_list = normal_i2c,
503};
504
505module_i2c_driver(lm95241_driver);
506
507MODULE_AUTHOR("Davide Rizzo <elpa.rizzo@gmail.com>");
508MODULE_DESCRIPTION("LM95231/LM95241 sensor driver");
509MODULE_LICENSE("GPL");
510
